本文整理汇总了C++中device_get_softc函数的典型用法代码示例。如果您正苦于以下问题:C++ device_get_softc函数的具体用法?C++ device_get_softc怎么用?C++ device_get_softc使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了device_get_softc函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: nf10bmac_attach_fdt
static int
nf10bmac_attach_fdt(device_t dev)
{
struct nf10bmac_softc *sc;
int error;
sc = device_get_softc(dev);
sc->nf10bmac_dev = dev;
sc->nf10bmac_unit = device_get_unit(dev);
/*
* FDT lists our resources. For convenience we use three different
* mappings. We need to attach them in the oder specified in .dts:
* LOOP (size 0x1f), TX (0x2f), RX (0x2f), INTR (0xf).
*/
/*
* LOOP memory region (this could be a general control region).
* 0x00: 32/64bit register to enable a Y-"lopback".
*/
sc->nf10bmac_ctrl_rid = 0;
sc->nf10bmac_ctrl_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->nf10bmac_ctrl_rid, RF_ACTIVE);
if (sc->nf10bmac_ctrl_res == NULL) {
device_printf(dev, "failed to map memory for CTRL region\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->nf10bmac_dev, "CTRL region at mem %p-%p\n",
(void *)rman_get_start(sc->nf10bmac_ctrl_res),
(void *)(rman_get_start(sc->nf10bmac_ctrl_res) +
rman_get_size(sc->nf10bmac_ctrl_res)));
/*
* TX and TX metadata FIFO memory region.
* 0x00: 32/64bit FIFO data,
* 0x08: 32/64bit FIFO metadata,
* 0x10: 32/64bit packet length.
*/
sc->nf10bmac_tx_mem_rid = 1;
sc->nf10bmac_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->nf10bmac_tx_mem_rid, RF_ACTIVE);
if (sc->nf10bmac_tx_mem_res == NULL) {
device_printf(dev, "failed to map memory for TX FIFO\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->nf10bmac_dev, "TX FIFO at mem %p-%p\n",
(void *)rman_get_start(sc->nf10bmac_tx_mem_res),
(void *)(rman_get_start(sc->nf10bmac_tx_mem_res) +
rman_get_size(sc->nf10bmac_tx_mem_res)));
/*
* RX and RXC metadata FIFO memory region.
* 0x00: 32/64bit FIFO data,
* 0x08: 32/64bit FIFO metadata,
* 0x10: 32/64bit packet length.
*/
sc->nf10bmac_rx_mem_rid = 2;
sc->nf10bmac_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->nf10bmac_rx_mem_rid, RF_ACTIVE);
if (sc->nf10bmac_rx_mem_res == NULL) {
device_printf(dev, "failed to map memory for RX FIFO\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->nf10bmac_dev, "RX FIFO at mem %p-%p\n",
(void *)rman_get_start(sc->nf10bmac_rx_mem_res),
(void *)(rman_get_start(sc->nf10bmac_rx_mem_res) +
rman_get_size(sc->nf10bmac_rx_mem_res)));
/*
* Interrupt handling registers.
* 0x00: 32/64bit register to clear (and disable) the RX interrupt.
* 0x08: 32/64bit register to enable or disable the RX interrupt.
*/
sc->nf10bmac_intr_rid = 3;
sc->nf10bmac_intr_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->nf10bmac_intr_rid, RF_ACTIVE);
if (sc->nf10bmac_intr_res == NULL) {
device_printf(dev, "failed to map memory for INTR region\n");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->nf10bmac_dev, "INTR region at mem %p-%p\n",
(void *)rman_get_start(sc->nf10bmac_intr_res),
(void *)(rman_get_start(sc->nf10bmac_intr_res) +
rman_get_size(sc->nf10bmac_intr_res)));
/* (Optional) RX and TX IRQ. */
sc->nf10bmac_rx_irq_rid = 0;
sc->nf10bmac_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->nf10bmac_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
error = nf10bmac_attach(dev);
if (error)
//.........这里部分代码省略.........
示例2: ata_macio_attach
static int
ata_macio_attach(device_t dev)
{
struct ata_macio_softc *sc = device_get_softc(dev);
uint32_t timingreg;
struct ata_channel *ch;
int rid, i;
/*
* Allocate resources
*/
rid = 0;
ch = &sc->sc_ch.sc_ch;
sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->sc_mem == NULL) {
device_printf(dev, "could not allocate memory\n");
return (ENXIO);
}
/*
* Set up the resource vectors
*/
for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
ch->r_io[i].res = sc->sc_mem;
ch->r_io[i].offset = i * ATA_MACIO_REGGAP;
}
ch->r_io[ATA_CONTROL].res = sc->sc_mem;
ch->r_io[ATA_CONTROL].offset = ATA_MACIO_ALTOFFSET;
ata_default_registers(dev);
ch->unit = 0;
ch->flags |= ATA_USE_16BIT | ATA_NO_ATAPI_DMA;
ata_generic_hw(dev);
#if USE_DBDMA_IRQ
int dbdma_irq_rid = 1;
struct resource *dbdma_irq;
void *cookie;
#endif
/* Init DMA engine */
sc->sc_ch.dbdma_rid = 1;
sc->sc_ch.dbdma_regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->sc_ch.dbdma_rid, RF_ACTIVE);
ata_dbdma_dmainit(dev);
/* Configure initial timings */
timingreg = bus_read_4(sc->sc_mem, ATA_MACIO_TIMINGREG);
if (sc->rev == 4) {
sc->udmaconf[0] = sc->udmaconf[1] = timingreg & 0x1ff00000;
sc->wdmaconf[0] = sc->wdmaconf[1] = timingreg & 0x001ffc00;
sc->pioconf[0] = sc->pioconf[1] = timingreg & 0x000003ff;
} else {
sc->udmaconf[0] = sc->udmaconf[1] = 0;
sc->wdmaconf[0] = sc->wdmaconf[1] = timingreg & 0xfffff800;
sc->pioconf[0] = sc->pioconf[1] = timingreg & 0x000007ff;
}
#if USE_DBDMA_IRQ
/* Bind to DBDMA interrupt as well */
if ((dbdma_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&dbdma_irq_rid, RF_SHAREABLE | RF_ACTIVE)) != NULL) {
bus_setup_intr(dev, dbdma_irq, ATA_INTR_FLAGS, NULL,
(driver_intr_t *)ata_interrupt, sc,&cookie);
}
#endif
/* Set begin_transaction */
sc->sc_ch.sc_ch.hw.begin_transaction = ata_macio_begin_transaction;
return ata_attach(dev);
}
示例3: sbni_attach_isa
static int
sbni_attach_isa(device_t dev)
{
struct sbni_softc *sc;
struct sbni_flags flags;
int error;
sc = device_get_softc(dev);
sc->dev = dev;
sc->irq_res = bus_alloc_resource_any(
dev, SYS_RES_IRQ, &sc->irq_rid, RF_ACTIVE);
#ifndef SBNI_DUAL_COMPOUND
if (sc->irq_res == NULL) {
device_printf(dev, "irq conflict!\n");
sbni_release_resources(sc);
return (ENOENT);
}
#else /* SBNI_DUAL_COMPOUND */
if (sc->irq_res) {
sbni_add(sc);
} else {
struct sbni_softc *master;
if ((master = connect_to_master(sc)) == 0) {
device_printf(dev, "failed to alloc irq\n");
sbni_release_resources(sc);
return (ENXIO);
} else {
device_printf(dev, "shared irq with %s\n",
master->ifp->if_xname);
}
}
#endif /* SBNI_DUAL_COMPOUND */
*(u_int32_t*)&flags = device_get_flags(dev);
error = sbni_attach(sc, device_get_unit(dev) * 2, flags);
if (error) {
device_printf(dev, "cannot initialize driver\n");
sbni_release_resources(sc);
return (error);
}
if (sc->irq_res) {
error = bus_setup_intr(
dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
NULL, sbni_intr, sc, &sc->irq_handle);
if (error) {
device_printf(dev, "bus_setup_intr\n");
sbni_detach(sc);
sbni_release_resources(sc);
return (error);
}
}
return (0);
}
示例4: twe_attach
/********************************************************************************
* Allocate resources, initialise the controller.
*/
static int
twe_attach(device_t dev)
{
struct twe_softc *sc;
struct sysctl_oid *sysctl_tree;
int rid, error;
debug_called(4);
/*
* Initialise the softc structure.
*/
sc = device_get_softc(dev);
sc->twe_dev = dev;
mtx_init(&sc->twe_io_lock, "twe I/O", NULL, MTX_DEF);
sx_init(&sc->twe_config_lock, "twe config");
/*
* XXX: This sysctl tree must stay at hw.tweX rather than using
* the device_get_sysctl_tree() created by new-bus because
* existing 3rd party binary tools such as tw_cli and 3dm2 use the
* existence of this sysctl node to discover controllers.
*/
sysctl_tree = SYSCTL_ADD_NODE(device_get_sysctl_ctx(dev),
SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
device_get_nameunit(dev), CTLFLAG_RD, 0, "");
if (sysctl_tree == NULL) {
twe_printf(sc, "cannot add sysctl tree node\n");
return (ENXIO);
}
SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(sysctl_tree),
OID_AUTO, "driver_version", CTLFLAG_RD, TWE_DRIVER_VERSION_STRING, 0,
"TWE driver version");
/*
* Force the busmaster enable bit on, in case the BIOS forgot.
*/
pci_enable_busmaster(dev);
/*
* Allocate the PCI register window.
*/
rid = TWE_IO_CONFIG_REG;
if ((sc->twe_io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
RF_ACTIVE)) == NULL) {
twe_printf(sc, "can't allocate register window\n");
twe_free(sc);
return(ENXIO);
}
/*
* Allocate the parent bus DMA tag appropriate for PCI.
*/
if (bus_dma_tag_create(bus_get_dma_tag(dev), /* PCI parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
0, /* flags */
NULL, /* lockfunc */
NULL, /* lockarg */
&sc->twe_parent_dmat)) {
twe_printf(sc, "can't allocate parent DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Allocate and connect our interrupt.
*/
rid = 0;
if ((sc->twe_irq = bus_alloc_resource_any(sc->twe_dev, SYS_RES_IRQ,
&rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
twe_printf(sc, "can't allocate interrupt\n");
twe_free(sc);
return(ENXIO);
}
if (bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE,
NULL, twe_pci_intr, sc, &sc->twe_intr)) {
twe_printf(sc, "can't set up interrupt\n");
twe_free(sc);
return(ENXIO);
}
/*
* Create DMA tag for mapping command's into controller-addressable space.
*/
if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
sizeof(TWE_Command) *
TWE_Q_LENGTH, 1, /* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
//.........这里部分代码省略.........
示例5: at91_attach
static int
at91_attach(device_t dev)
{
struct at91_pmc_clock *clk;
struct at91sam9_softc *sc = device_get_softc(dev);
int i;
struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
sc->sc_st = at91sc->sc_st;
sc->sc_sh = at91sc->sc_sh;
sc->dev = dev;
if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_SYS_BASE,
AT91SAM9260_SYS_SIZE, &sc->sc_sys_sh) != 0)
panic("Enable to map system registers");
if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_DBGU_BASE,
AT91SAM9260_DBGU_SIZE, &sc->sc_dbg_sh) != 0)
panic("Enable to map DBGU registers");
if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_AIC_BASE,
AT91SAM9260_AIC_SIZE, &sc->sc_aic_sh) != 0)
panic("Enable to map system registers");
/* XXX Hack to tell atmelarm about the AIC */
at91sc->sc_aic_sh = sc->sc_aic_sh;
at91sc->sc_irq_system = AT91SAM9260_IRQ_SYSTEM;
for (i = 0; i < 32; i++) {
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
i * 4, i);
/* Priority. */
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
at91_irq_prio[i]);
if (i < 8)
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_EOICR,
1);
}
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SPU, 32);
/* No debug. */
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_DCR, 0);
/* Disable and clear all interrupts. */
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff);
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff);
/* Disable all interrupts for DBGU */
bus_space_write_4(sc->sc_st, sc->sc_dbg_sh, 0x0c, 0xffffffff);
if (bus_space_subregion(sc->sc_st, sc->sc_sh,
AT91SAM9260_MATRIX_BASE, AT91SAM9260_MATRIX_SIZE,
&sc->sc_matrix_sh) != 0)
panic("Enable to map matrix registers");
/* activate NAND*/
i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9260_EBICSA);
bus_space_write_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9260_EBICSA,
i | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* Update USB device port clock info */
clk = at91_pmc_clock_ref("udpck");
clk->pmc_mask = PMC_SCER_UDP_SAM9;
at91_pmc_clock_deref(clk);
/* Update USB host port clock info */
clk = at91_pmc_clock_ref("uhpck");
clk->pmc_mask = PMC_SCER_UHP_SAM9;
at91_pmc_clock_deref(clk);
/* Each SOC has different PLL contraints */
clk = at91_pmc_clock_ref("plla");
clk->pll_min_in = SAM9260_PLL_A_MIN_IN_FREQ; /* 1 MHz */
clk->pll_max_in = SAM9260_PLL_A_MAX_IN_FREQ; /* 32 MHz */
clk->pll_min_out = SAM9260_PLL_A_MIN_OUT_FREQ; /* 80 MHz */
clk->pll_max_out = SAM9260_PLL_A_MAX_OUT_FREQ; /* 240 MHz */
clk->pll_mul_shift = SAM9260_PLL_A_MUL_SHIFT;
clk->pll_mul_mask = SAM9260_PLL_A_MUL_MASK;
clk->pll_div_shift = SAM9260_PLL_A_DIV_SHIFT;
clk->pll_div_mask = SAM9260_PLL_A_DIV_MASK;
clk->set_outb = at91_pll_outa;
at91_pmc_clock_deref(clk);
/*
* Fudge MAX pll in frequence down below 3.0 MHz to ensure
* PMC alogrithm choose the divisor that causes the input clock
* to be near the optimal 2 MHz per datasheet. We know
* we are going to be using this for the USB clock at 96 MHz.
* Causes no extra frequency deviation for all recomended crystal
* values.
*/
clk = at91_pmc_clock_ref("pllb");
clk->pll_min_in = SAM9260_PLL_B_MIN_IN_FREQ; /* 1 MHz */
clk->pll_max_in = SAM9260_PLL_B_MAX_IN_FREQ; /* 5 MHz */
clk->pll_max_in = 2999999; /* ~3 MHz */
clk->pll_min_out = SAM9260_PLL_B_MIN_OUT_FREQ; /* 70 MHz */
clk->pll_max_out = SAM9260_PLL_B_MAX_OUT_FREQ; /* 130 MHz */
clk->pll_mul_shift = SAM9260_PLL_B_MUL_SHIFT;
//.........这里部分代码省略.........
示例6: at91_udp_detach
static int
at91_udp_detach(device_t dev)
{
struct at91_udp_softc *sc = device_get_softc(dev);
device_t bdev;
int err;
if (sc->sc_dci.sc_bus.bdev) {
bdev = sc->sc_dci.sc_bus.bdev;
device_detach(bdev);
device_delete_child(dev, bdev);
}
/* during module unload there are lots of children leftover */
device_delete_all_children(dev);
/* disable Transceiver */
AT91_UDP_WRITE_4(&sc->sc_dci, AT91_UDP_TXVC, AT91_UDP_TXVC_DIS);
/* disable and clear all interrupts */
AT91_UDP_WRITE_4(&sc->sc_dci, AT91_UDP_IDR, 0xFFFFFFFF);
AT91_UDP_WRITE_4(&sc->sc_dci, AT91_UDP_ICR, 0xFFFFFFFF);
/* disable VBUS interrupt */
at91_pio_gpio_set_interrupt(VBUS_BASE, VBUS_MASK, 0);
if (sc->sc_vbus_irq_res && sc->sc_vbus_intr_hdl) {
err = bus_teardown_intr(dev, sc->sc_vbus_irq_res,
sc->sc_vbus_intr_hdl);
sc->sc_vbus_intr_hdl = NULL;
}
if (sc->sc_vbus_irq_res) {
bus_release_resource(dev, SYS_RES_IRQ, 1,
sc->sc_vbus_irq_res);
sc->sc_vbus_irq_res = NULL;
}
if (sc->sc_dci.sc_irq_res && sc->sc_dci.sc_intr_hdl) {
/*
* only call at91_udp_uninit() after at91_udp_init()
*/
at91dci_uninit(&sc->sc_dci);
err = bus_teardown_intr(dev, sc->sc_dci.sc_irq_res,
sc->sc_dci.sc_intr_hdl);
sc->sc_dci.sc_intr_hdl = NULL;
}
if (sc->sc_dci.sc_irq_res) {
bus_release_resource(dev, SYS_RES_IRQ, 0,
sc->sc_dci.sc_irq_res);
sc->sc_dci.sc_irq_res = NULL;
}
if (sc->sc_dci.sc_io_res) {
bus_release_resource(dev, SYS_RES_MEMORY, MEM_RID,
sc->sc_dci.sc_io_res);
sc->sc_dci.sc_io_res = NULL;
}
usb_bus_mem_free_all(&sc->sc_dci.sc_bus, NULL);
/* disable clocks */
at91_pmc_clock_disable(sc->sc_iclk);
at91_pmc_clock_disable(sc->sc_fclk);
at91_pmc_clock_deref(sc->sc_fclk);
at91_pmc_clock_deref(sc->sc_iclk);
return (0);
}
示例7: ehci_pci_attach
static int
ehci_pci_attach(device_t self)
{
ehci_softc_t *sc = device_get_softc(self);
int err;
int rid;
/* initialise some bus fields */
sc->sc_bus.parent = self;
sc->sc_bus.devices = sc->sc_devices;
sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
/* get all DMA memory */
if (usb_bus_mem_alloc_all(&sc->sc_bus,
USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
return (ENOMEM);
}
pci_enable_busmaster(self);
switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) {
case PCI_USB_REV_PRE_1_0:
case PCI_USB_REV_1_0:
case PCI_USB_REV_1_1:
/*
* NOTE: some EHCI USB controllers have the wrong USB
* revision number. It appears those controllers are
* fully compliant so we just ignore this value in
* some common cases.
*/
device_printf(self, "pre-2.0 USB revision (ignored)\n");
/* fallthrough */
case PCI_USB_REV_2_0:
break;
default:
/* Quirk for Parallels Desktop 4.0 */
device_printf(self, "USB revision is unknown. Assuming v2.0.\n");
break;
}
rid = PCI_CBMEM;
sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (!sc->sc_io_res) {
device_printf(self, "Could not map memory\n");
goto error;
}
sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
sc->sc_io_size = rman_get_size(sc->sc_io_res);
rid = 0;
sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
RF_SHAREABLE | RF_ACTIVE);
if (sc->sc_irq_res == NULL) {
device_printf(self, "Could not allocate irq\n");
goto error;
}
sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
if (!sc->sc_bus.bdev) {
device_printf(self, "Could not add USB device\n");
goto error;
}
device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
/*
* ehci_pci_match will never return NULL if ehci_pci_probe
* succeeded
*/
device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
switch (pci_get_vendor(self)) {
case PCI_EHCI_VENDORID_ACERLABS:
sprintf(sc->sc_vendor, "AcerLabs");
break;
case PCI_EHCI_VENDORID_AMD:
sprintf(sc->sc_vendor, "AMD");
break;
case PCI_EHCI_VENDORID_APPLE:
sprintf(sc->sc_vendor, "Apple");
break;
case PCI_EHCI_VENDORID_ATI:
sprintf(sc->sc_vendor, "ATI");
break;
case PCI_EHCI_VENDORID_CMDTECH:
sprintf(sc->sc_vendor, "CMDTECH");
break;
case PCI_EHCI_VENDORID_INTEL:
sprintf(sc->sc_vendor, "Intel");
break;
case PCI_EHCI_VENDORID_NEC:
sprintf(sc->sc_vendor, "NEC");
break;
case PCI_EHCI_VENDORID_OPTI:
sprintf(sc->sc_vendor, "OPTi");
break;
case PCI_EHCI_VENDORID_PHILIPS:
sprintf(sc->sc_vendor, "Philips");
break;
case PCI_EHCI_VENDORID_SIS:
sprintf(sc->sc_vendor, "SiS");
//.........这里部分代码省略.........
示例8: pl310_attach
static int
pl310_attach(device_t dev)
{
struct pl310_softc *sc = device_get_softc(dev);
int rid;
uint32_t cache_id, debug_ctrl;
phandle_t node;
sc->sc_dev = dev;
rid = 0;
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->sc_mem_res == NULL)
panic("%s: Cannot map registers", device_get_name(dev));
/* Allocate an IRQ resource */
rid = 0;
sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
RF_ACTIVE | RF_SHAREABLE);
if (sc->sc_irq_res == NULL) {
device_printf(dev, "cannot allocate IRQ, not using interrupt\n");
}
pl310_softc = sc;
mtx_init(&sc->sc_mtx, "pl310lock", NULL, MTX_SPIN);
cache_id = pl310_read4(sc, PL310_CACHE_ID);
sc->sc_rtl_revision = (cache_id >> CACHE_ID_RELEASE_SHIFT) &
CACHE_ID_RELEASE_MASK;
device_printf(dev, "Part number: 0x%x, release: 0x%x\n",
(cache_id >> CACHE_ID_PARTNUM_SHIFT) & CACHE_ID_PARTNUM_MASK,
(cache_id >> CACHE_ID_RELEASE_SHIFT) & CACHE_ID_RELEASE_MASK);
/*
* Test for "arm,io-coherent" property and disable sync operation if
* platform is I/O coherent. Outer sync operations are not needed
* on coherent platform and may be harmful in certain situations.
*/
node = ofw_bus_get_node(dev);
if (OF_hasprop(node, "arm,io-coherent"))
sc->sc_io_coherent = true;
/*
* If L2 cache is already enabled then something has violated the rules,
* because caches are supposed to be off at kernel entry. The cache
* must be disabled to write the configuration registers without
* triggering an access error (SLVERR), but there's no documented safe
* procedure for disabling the L2 cache in the manual. So we'll try to
* invent one:
* - Use the debug register to force write-through mode and prevent
* linefills (allocation of new lines on read); now anything we do
* will not cause new data to come into the L2 cache.
* - Writeback and invalidate the current contents.
* - Disable the controller.
* - Restore the original debug settings.
*/
if (pl310_read4(sc, PL310_CTRL) & CTRL_ENABLED) {
device_printf(dev, "Warning: L2 Cache should not already be "
"active; trying to de-activate and re-initialize...\n");
sc->sc_enabled = 1;
debug_ctrl = pl310_read4(sc, PL310_DEBUG_CTRL);
platform_pl310_write_debug(sc, debug_ctrl |
DEBUG_CTRL_DISABLE_WRITEBACK | DEBUG_CTRL_DISABLE_LINEFILL);
pl310_set_way_sizes(sc);
pl310_wbinv_all();
platform_pl310_write_ctrl(sc, CTRL_DISABLED);
platform_pl310_write_debug(sc, debug_ctrl);
}
sc->sc_enabled = pl310_enabled;
if (sc->sc_enabled) {
platform_pl310_init(sc);
pl310_set_way_sizes(sc); /* platform init might change these */
pl310_write4(pl310_softc, PL310_INV_WAY, 0xffff);
pl310_wait_background_op(PL310_INV_WAY, 0xffff);
platform_pl310_write_ctrl(sc, CTRL_ENABLED);
device_printf(dev, "L2 Cache enabled: %uKB/%dB %d ways\n",
(g_l2cache_size / 1024), g_l2cache_line_size, g_ways_assoc);
if (bootverbose)
pl310_print_config(sc);
} else {
if (sc->sc_irq_res != NULL) {
sc->sc_ich = malloc(sizeof(*sc->sc_ich), M_DEVBUF, M_WAITOK);
sc->sc_ich->ich_func = pl310_config_intr;
sc->sc_ich->ich_arg = sc;
if (config_intrhook_establish(sc->sc_ich) != 0) {
device_printf(dev,
"config_intrhook_establish failed\n");
free(sc->sc_ich, M_DEVBUF);
return(ENXIO);
}
}
device_printf(dev, "L2 Cache disabled\n");
}
/* Set the l2 functions in the set of cpufuncs */
cpufuncs.cf_l2cache_wbinv_all = pl310_wbinv_all;
cpufuncs.cf_l2cache_wbinv_range = pl310_wbinv_range;
cpufuncs.cf_l2cache_inv_range = pl310_inv_range;
//.........这里部分代码省略.........
示例9: i2c_start
static int
i2c_start(device_t dev, u_char slave, int timeout)
{
struct i2c_softc *sc;
int error;
int reg;
sc = device_get_softc(dev);
DPRINTF("i2c start\n");
mtx_lock(&sc->mutex);
#if 0
DPRINTF("I2CCON == 0x%08x\n", READ1(sc, I2CCON));
DPRINTF("I2CSTAT == 0x%08x\n", READ1(sc, I2CSTAT));
#endif
if (slave & 1) {
slave &= ~(1);
slave <<= 1;
slave |= 1;
} else {
slave <<= 1;
}
error = wait_for_nibb(sc);
if (error) {
mtx_unlock(&sc->mutex);
DPRINTF("cant i2c start: IIC_EBUSERR\n");
return (IIC_EBUSERR);
}
reg = READ1(sc, I2CCON);
reg |= (IRQ_EN | ACKGEN);
WRITE1(sc, I2CCON, reg);
WRITE1(sc, I2CDS, slave);
DELAY(50);
reg = (RXTX_EN);
reg |= I2C_START_STOP;
reg |= (I2CMODE_MT << I2CMODE_S);
WRITE1(sc, I2CSTAT, reg);
error = wait_for_iif(sc);
if (error) {
DPRINTF("cant i2c start: iif error\n");
mtx_unlock(&sc->mutex);
return (error);
}
if (!is_ack(sc)) {
DPRINTF("cant i2c start: no ack\n");
mtx_unlock(&sc->mutex);
return (IIC_ENOACK);
};
mtx_unlock(&sc->mutex);
return (IIC_NOERR);
}
示例10: usie_attach
static int
usie_attach(device_t self)
{
struct usie_softc *sc = device_get_softc(self);
struct usb_attach_arg *uaa = device_get_ivars(self);
struct ifnet *ifp;
struct usb_interface *iface;
struct usb_interface_descriptor *id;
struct usb_device_request req;
int err;
uint16_t fwattr;
uint8_t iface_index;
uint8_t ifidx;
uint8_t start;
device_set_usb_desc(self);
sc->sc_udev = uaa->device;
sc->sc_dev = self;
mtx_init(&sc->sc_mtx, "usie", MTX_NETWORK_LOCK, MTX_DEF);
ucom_ref(&sc->sc_super_ucom);
TASK_INIT(&sc->sc_if_status_task, 0, usie_if_status_cb, sc);
TASK_INIT(&sc->sc_if_sync_task, 0, usie_if_sync_cb, sc);
usb_callout_init_mtx(&sc->sc_if_sync_ch, &sc->sc_mtx, 0);
mtx_lock(&sc->sc_mtx);
/* set power mode to D0 */
req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
req.bRequest = USIE_POWER;
USETW(req.wValue, 0);
USETW(req.wIndex, 0);
USETW(req.wLength, 0);
if (usie_do_request(sc, &req, NULL)) {
mtx_unlock(&sc->sc_mtx);
goto detach;
}
/* read fw attr */
fwattr = 0;
req.bmRequestType = UT_READ_VENDOR_DEVICE;
req.bRequest = USIE_FW_ATTR;
USETW(req.wValue, 0);
USETW(req.wIndex, 0);
USETW(req.wLength, sizeof(fwattr));
if (usie_do_request(sc, &req, &fwattr)) {
mtx_unlock(&sc->sc_mtx);
goto detach;
}
mtx_unlock(&sc->sc_mtx);
/* check DHCP supports */
DPRINTF("fwattr=%x\n", fwattr);
if (!(fwattr & USIE_FW_DHCP)) {
device_printf(self, "DHCP is not supported. A firmware upgrade might be needed.\n");
}
/* find available interfaces */
sc->sc_nucom = 0;
for (ifidx = 0; ifidx < USIE_IFACE_MAX; ifidx++) {
iface = usbd_get_iface(uaa->device, ifidx);
if (iface == NULL)
break;
id = usbd_get_interface_descriptor(iface);
if ((id == NULL) || (id->bInterfaceClass != UICLASS_VENDOR))
continue;
/* setup Direct IP transfer */
if (id->bInterfaceNumber >= 7 && id->bNumEndpoints == 3) {
sc->sc_if_ifnum = id->bInterfaceNumber;
iface_index = ifidx;
DPRINTF("ifnum=%d, ifidx=%d\n",
sc->sc_if_ifnum, ifidx);
err = usbd_transfer_setup(uaa->device,
&iface_index, sc->sc_if_xfer, usie_if_config,
USIE_IF_N_XFER, sc, &sc->sc_mtx);
if (err == 0)
continue;
device_printf(self,
"could not allocate USB transfers on "
"iface_index=%d, err=%s\n",
iface_index, usbd_errstr(err));
goto detach;
}
/* setup ucom */
if (sc->sc_nucom >= USIE_UCOM_MAX)
continue;
usbd_set_parent_iface(uaa->device, ifidx,
uaa->info.bIfaceIndex);
DPRINTF("NumEndpoints=%d bInterfaceNumber=%d\n",
id->bNumEndpoints, id->bInterfaceNumber);
//.........这里部分代码省略.........
示例11: acd_strategy
static void
acd_strategy(struct bio *bp)
{
device_t dev = bp->bio_to->geom->softc;
struct ata_device *atadev = device_get_softc(dev);
struct acd_softc *cdp = device_get_ivars(dev);
struct ata_request *request;
u_int32_t lba, lastlba, count;
int8_t ccb[16];
int track, blocksize;
/* reject all queued entries if media changed */
if (atadev->flags & ATA_D_MEDIA_CHANGED) {
g_io_deliver(bp, EIO);
return;
}
bzero(ccb, sizeof(ccb));
track = bp->bio_to->index;
if (track) {
blocksize = (cdp->toc.tab[track - 1].control & 4) ? 2048 : 2352;
lastlba = ntohl(cdp->toc.tab[track].addr.lba);
lba = bp->bio_offset / blocksize;
lba += ntohl(cdp->toc.tab[track - 1].addr.lba);
}
else {
blocksize = cdp->block_size;
lastlba = cdp->disk_size;
lba = bp->bio_offset / blocksize;
}
count = bp->bio_length / blocksize;
if (bp->bio_cmd == BIO_READ) {
/* if transfer goes beyond range adjust it to be within limits */
if (lba + count > lastlba) {
/* if we are entirely beyond EOM return EOF */
if (lastlba <= lba) {
g_io_deliver(bp, 0);
return;
}
count = lastlba - lba;
}
switch (blocksize) {
case 2048:
ccb[0] = ATAPI_READ_BIG;
break;
case 2352:
ccb[0] = ATAPI_READ_CD;
ccb[9] = 0xf8;
break;
default:
ccb[0] = ATAPI_READ_CD;
ccb[9] = 0x10;
}
}
else
ccb[0] = ATAPI_WRITE_BIG;
ccb[1] = 0;
ccb[2] = lba>>24;
ccb[3] = lba>>16;
ccb[4] = lba>>8;
ccb[5] = lba;
ccb[6] = count>>16;
ccb[7] = count>>8;
ccb[8] = count;
if (!(request = ata_alloc_request())) {
g_io_deliver(bp, ENOMEM);
return;
}
request->dev = dev;
request->bio = bp;
bcopy(ccb, request->u.atapi.ccb, 16);
request->data = bp->bio_data;
request->bytecount = count * blocksize;
request->transfersize = min(request->bytecount, 65534);
request->timeout = (ccb[0] == ATAPI_WRITE_BIG) ? 60 : 30;
request->retries = 2;
request->callback = acd_done;
request->flags = ATA_R_ATAPI;
if (atadev->mode >= ATA_DMA)
request->flags |= ATA_R_DMA;
switch (bp->bio_cmd) {
case BIO_READ:
request->flags |= ATA_R_READ;
break;
case BIO_WRITE:
request->flags |= ATA_R_WRITE;
break;
default:
device_printf(dev, "unknown BIO operation\n");
ata_free_request(request);
g_io_deliver(bp, EIO);
return;
//.........这里部分代码省略.........
示例12: acd_read_toc
static void
acd_read_toc(device_t dev)
{
struct ata_device *atadev = device_get_softc(dev);
struct acd_softc *cdp = device_get_ivars(dev);
struct g_provider *pp;
u_int32_t sizes[2];
int8_t ccb[16];
int track, ntracks, len;
atadev->flags &= ~ATA_D_MEDIA_CHANGED;
bzero(&cdp->toc, sizeof(cdp->toc));
cdp->disk_size = -1; /* hack for GEOM SOS */
if (acd_test_ready(dev))
return;
bzero(ccb, sizeof(ccb));
len = sizeof(struct ioc_toc_header) + sizeof(struct cd_toc_entry);
ccb[0] = ATAPI_READ_TOC;
ccb[7] = len>>8;
ccb[8] = len;
if (ata_atapicmd(dev, ccb, (caddr_t)&cdp->toc, len,
ATA_R_READ | ATA_R_QUIET, 30)) {
bzero(&cdp->toc, sizeof(cdp->toc));
return;
}
ntracks = cdp->toc.hdr.ending_track - cdp->toc.hdr.starting_track + 1;
if (ntracks <= 0 || ntracks > MAXTRK) {
bzero(&cdp->toc, sizeof(cdp->toc));
return;
}
len = sizeof(struct ioc_toc_header)+(ntracks+1)*sizeof(struct cd_toc_entry);
bzero(ccb, sizeof(ccb));
ccb[0] = ATAPI_READ_TOC;
ccb[7] = len>>8;
ccb[8] = len;
if (ata_atapicmd(dev, ccb, (caddr_t)&cdp->toc, len,
ATA_R_READ | ATA_R_QUIET, 30)) {
bzero(&cdp->toc, sizeof(cdp->toc));
return;
}
cdp->toc.hdr.len = ntohs(cdp->toc.hdr.len);
cdp->block_size = (cdp->toc.tab[0].control & 4) ? 2048 : 2352;
acd_set_ioparm(dev);
bzero(ccb, sizeof(ccb));
ccb[0] = ATAPI_READ_CAPACITY;
if (ata_atapicmd(dev, ccb, (caddr_t)sizes, sizeof(sizes),
ATA_R_READ | ATA_R_QUIET, 30)) {
bzero(&cdp->toc, sizeof(cdp->toc));
return;
}
cdp->disk_size = ntohl(sizes[0]) + 1;
for (track = 1; track <= ntracks; track ++) {
if (cdp->pp[track] != NULL)
continue;
pp = g_new_providerf(cdp->gp, "acd%dt%02d", device_get_unit(dev),track);
pp->index = track;
cdp->pp[track] = pp;
g_error_provider(pp, 0);
}
for (; track < MAXTRK; track ++) {
if (cdp->pp[track] == NULL)
continue;
cdp->pp[track]->flags |= G_PF_WITHER;
g_orphan_provider(cdp->pp[track], ENXIO);
cdp->pp[track] = NULL;
}
#ifdef ACD_DEBUG
if (cdp->disk_size && cdp->toc.hdr.ending_track) {
device_printf(dev, "(%d sectors (%d bytes)), %d tracks ",
cdp->disk_size, cdp->block_size,
cdp->toc.hdr.ending_track-cdp->toc.hdr.starting_track+1);
if (cdp->toc.tab[0].control & 4)
printf("%dMB\n", cdp->disk_size * cdp->block_size / 1048576);
else
printf("%d:%d audio\n",
cdp->disk_size / 75 / 60, cdp->disk_size / 75 % 60);
}
#endif
}
示例13: macio_attach
/*
* PCI attach: scan Open Firmware child nodes, and attach these as children
* of the macio bus
*/
static int
macio_attach(device_t dev)
{
struct macio_softc *sc;
struct macio_devinfo *dinfo;
phandle_t root;
phandle_t child;
phandle_t subchild;
device_t cdev;
u_int reg[3];
int error, quirks;
sc = device_get_softc(dev);
root = sc->sc_node = ofw_bus_get_node(dev);
/*
* Locate the device node and it's base address
*/
if (OF_getprop(root, "assigned-addresses",
reg, sizeof(reg)) < sizeof(reg)) {
return (ENXIO);
}
sc->sc_base = reg[2];
sc->sc_size = MACIO_REG_SIZE;
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
sc->sc_mem_rman.rm_descr = "MacIO Device Memory";
error = rman_init(&sc->sc_mem_rman);
if (error) {
device_printf(dev, "rman_init() failed. error = %d\n", error);
return (error);
}
error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size);
if (error) {
device_printf(dev,
"rman_manage_region() failed. error = %d\n", error);
return (error);
}
/*
* Iterate through the sub-devices
*/
for (child = OF_child(root); child != 0; child = OF_peer(child)) {
dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) !=
0) {
free(dinfo, M_MACIO);
continue;
}
quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name);
if ((quirks & MACIO_QUIRK_IGNORE) != 0) {
ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo);
free(dinfo, M_MACIO);
continue;
}
resource_list_init(&dinfo->mdi_resources);
dinfo->mdi_ninterrupts = 0;
macio_add_intr(child, dinfo);
if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0)
macio_add_reg(OF_child(child), dinfo);
else
macio_add_reg(child, dinfo);
if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0)
for (subchild = OF_child(child); subchild != 0;
subchild = OF_peer(subchild))
macio_add_intr(subchild, dinfo);
cdev = device_add_child(dev, NULL, -1);
if (cdev == NULL) {
device_printf(dev, "<%s>: device_add_child failed\n",
dinfo->mdi_obdinfo.obd_name);
resource_list_free(&dinfo->mdi_resources);
ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo);
free(dinfo, M_MACIO);
continue;
}
device_set_ivars(cdev, dinfo);
}
return (bus_generic_attach(dev));
}
示例14: at91_udp_attach
static int
at91_udp_attach(device_t dev)
{
struct at91_udp_softc *sc = device_get_softc(dev);
int err;
int rid;
/* setup AT9100 USB device controller interface softc */
sc->sc_dci.sc_clocks_on = &at91_udp_clocks_on;
sc->sc_dci.sc_clocks_off = &at91_udp_clocks_off;
sc->sc_dci.sc_clocks_arg = sc;
sc->sc_dci.sc_pull_up = &at91_udp_pull_up;
sc->sc_dci.sc_pull_down = &at91_udp_pull_down;
sc->sc_dci.sc_pull_arg = sc;
/* initialise some bus fields */
sc->sc_dci.sc_bus.parent = dev;
sc->sc_dci.sc_bus.devices = sc->sc_dci.sc_devices;
sc->sc_dci.sc_bus.devices_max = AT91_MAX_DEVICES;
/* get all DMA memory */
if (usb_bus_mem_alloc_all(&sc->sc_dci.sc_bus,
USB_GET_DMA_TAG(dev), NULL)) {
return (ENOMEM);
}
/*
* configure VBUS input pin, enable deglitch and enable
* interrupt :
*/
at91_pio_use_gpio(VBUS_BASE, VBUS_MASK);
at91_pio_gpio_input(VBUS_BASE, VBUS_MASK);
at91_pio_gpio_set_deglitch(VBUS_BASE, VBUS_MASK, 1);
at91_pio_gpio_set_interrupt(VBUS_BASE, VBUS_MASK, 1);
/*
* configure PULLUP output pin :
*/
at91_pio_use_gpio(PULLUP_BASE, PULLUP_MASK);
at91_pio_gpio_output(PULLUP_BASE, PULLUP_MASK, 0);
at91_udp_pull_down(sc);
/* wait 10ms for pulldown to stabilise */
usb_pause_mtx(NULL, hz / 100);
sc->sc_iclk = at91_pmc_clock_ref("udc_clk");
sc->sc_fclk = at91_pmc_clock_ref("udpck");
rid = MEM_RID;
sc->sc_dci.sc_io_res =
bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
if (!(sc->sc_dci.sc_io_res)) {
err = ENOMEM;
goto error;
}
sc->sc_dci.sc_io_tag = rman_get_bustag(sc->sc_dci.sc_io_res);
sc->sc_dci.sc_io_hdl = rman_get_bushandle(sc->sc_dci.sc_io_res);
sc->sc_dci.sc_io_size = rman_get_size(sc->sc_dci.sc_io_res);
rid = 0;
sc->sc_dci.sc_irq_res =
bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
if (!(sc->sc_dci.sc_irq_res)) {
goto error;
}
rid = 1;
sc->sc_vbus_irq_res =
bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
if (!(sc->sc_vbus_irq_res)) {
goto error;
}
sc->sc_dci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
if (!(sc->sc_dci.sc_bus.bdev)) {
goto error;
}
device_set_ivars(sc->sc_dci.sc_bus.bdev, &sc->sc_dci.sc_bus);
#if (__FreeBSD_version >= 700031)
err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (driver_intr_t *)at91dci_interrupt, sc, &sc->sc_dci.sc_intr_hdl);
#else
err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
(driver_intr_t *)at91dci_interrupt, sc, &sc->sc_dci.sc_intr_hdl);
#endif
if (err) {
sc->sc_dci.sc_intr_hdl = NULL;
goto error;
}
#if (__FreeBSD_version >= 700031)
err = bus_setup_intr(dev, sc->sc_vbus_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (driver_intr_t *)at91_vbus_poll, sc, &sc->sc_vbus_intr_hdl);
#else
err = bus_setup_intr(dev, sc->sc_vbus_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
(driver_intr_t *)at91_vbus_poll, sc, &sc->sc_vbus_intr_hdl);
#endif
if (err) {
sc->sc_vbus_intr_hdl = NULL;
goto error;
//.........这里部分代码省略.........
示例15: macio_alloc_resource
static struct resource *
macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct macio_softc *sc;
int needactivate;
struct resource *rv;
struct rman *rm;
u_long adjstart, adjend, adjcount;
struct macio_devinfo *dinfo;
struct resource_list_entry *rle;
sc = device_get_softc(bus);
dinfo = device_get_ivars(child);
needactivate = flags & RF_ACTIVE;
flags &= ~RF_ACTIVE;
switch (type) {
case SYS_RES_MEMORY:
case SYS_RES_IOPORT:
rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY,
*rid);
if (rle == NULL) {
device_printf(bus, "no rle for %s memory %d\n",
device_get_nameunit(child), *rid);
return (NULL);
}
if (start < rle->start)
adjstart = rle->start;
else if (start > rle->end)
adjstart = rle->end;
else
adjstart = start;
if (end < rle->start)
adjend = rle->start;
else if (end > rle->end)
adjend = rle->end;
else
adjend = end;
adjcount = adjend - adjstart;
rm = &sc->sc_mem_rman;
break;
case SYS_RES_IRQ:
/* Check for passthrough from subattachments like macgpio */
if (device_get_parent(child) != bus)
return BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
type, rid, start, end, count, flags);
rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ,
*rid);
if (rle == NULL) {
if (dinfo->mdi_ninterrupts >= 6) {
device_printf(bus,
"%s has more than 6 interrupts\n",
device_get_nameunit(child));
return (NULL);
}
resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ,
dinfo->mdi_ninterrupts, start, start, 1);
dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start;
dinfo->mdi_ninterrupts++;
}
return (resource_list_alloc(&dinfo->mdi_resources, bus, child,
type, rid, start, end, count, flags));
default:
device_printf(bus, "unknown resource request from %s\n",
device_get_nameunit(child));
return (NULL);
}
rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags,
child);
if (rv == NULL) {
device_printf(bus,
"failed to reserve resource %#lx - %#lx (%#lx) for %s\n",
adjstart, adjend, adjcount, device_get_nameunit(child));
return (NULL);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv) != 0) {
device_printf(bus,
"failed to activate resource for %s\n",
device_get_nameunit(child));
rman_release_resource(rv);
return (NULL);
}
}
//.........这里部分代码省略.........