本文整理汇总了C++中cpu_logical_map函数的典型用法代码示例。如果您正苦于以下问题:C++ cpu_logical_map函数的具体用法?C++ cpu_logical_map怎么用?C++ cpu_logical_map使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了cpu_logical_map函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: psci_boot_secondary
static int __cpuinit psci_boot_secondary(unsigned int cpu,
struct task_struct *idle)
{
if (psci_ops.cpu_on)
return psci_ops.cpu_on(cpu_logical_map(cpu),
__pa(secondary_startup));
return -ENODEV;
}
示例2: octeon_coreid_for_cpu
static int octeon_coreid_for_cpu(int cpu)
{
#ifdef CONFIG_SMP
return cpu_logical_map(cpu);
#else
return cvmx_get_core_num();
#endif
}
示例3: hs_get_cpu_jump
int hs_get_cpu_jump(int cpu)
{
int offset = hs_smp_reg;
cpu = cpu_logical_map(cpu);
if (cpu > 0)
offset += 0x04 * (cpu - 1);
return readl_relaxed(hs_sctrl_base + offset);
}
示例4: hs_set_cpu_jump
void hs_set_cpu_jump(int cpu, void *jump_addr)
{
int offset = hs_smp_reg;
cpu = cpu_logical_map(cpu);
if (cpu > 0)
offset += 0x04 * (cpu - 1);
writel_relaxed(virt_to_phys(jump_addr), hs_sctrl_base + offset);
}
示例5: is_mpidr_duplicate
/*
* Duplicate MPIDRs are a recipe for disaster. Scan all initialized
* entries and check for duplicates. If any is found just ignore the
* cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
* matching valid MPIDR values.
*/
static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
{
unsigned int i;
for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
if (cpu_logical_map(i) == hwid)
return true;
return false;
}
示例6: octeon_send_ipi_single
/**
* Cause the function described by call_data to be executed on the passed
* cpu. When the function has finished, increment the finished field of
* call_data.
*/
void octeon_send_ipi_single(int cpu, unsigned int action)
{
int coreid = cpu_logical_map(cpu);
/*
pr_info("SMP: Mailbox send cpu=%d, coreid=%d, action=%u\n", cpu,
coreid, action);
*/
cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action);
}
示例7: smp_clear_cpu_maps
void __init
smp_clear_cpu_maps (void)
{
cpumask_clear(&cpu_possible_map);
cpumask_clear(&cpu_online_map);
cpumask_set_cpu(0, &cpu_online_map);
cpumask_set_cpu(0, &cpu_possible_map);
cpu_logical_map(0) = READ_SYSREG(MPIDR_EL1) & MPIDR_HWID_MASK;
}
示例8: nlm_send_ipi_single
void nlm_send_ipi_single(int logical_cpu, unsigned int action)
{
int cpu = cpu_logical_map(logical_cpu);
if (action & SMP_CALL_FUNCTION)
nlm_pic_send_ipi(nlm_pic_base, cpu, IRQ_IPI_SMP_FUNCTION, 0);
if (action & SMP_RESCHEDULE_YOURSELF)
nlm_pic_send_ipi(nlm_pic_base, cpu, IRQ_IPI_SMP_RESCHEDULE, 0);
}
示例9: cpu_to_pcpu
static void cpu_to_pcpu(unsigned int cpu,
unsigned int *pcpu, unsigned int *pcluster)
{
unsigned int mpidr;
mpidr = cpu_logical_map(cpu);
*pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
*pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
}
示例10: emev2_smp_prepare_cpus
static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
{
int cpu = cpu_logical_map(0);
scu_enable(scu_base);
/* enable cache coherency on CPU0 */
modify_scu_cpu_psr(0, 3 << (cpu * 8));
}
示例11: boot_secondary
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int ret;
int flag = 0;
unsigned long timeout;
pr_debug("Starting secondary CPU %d\n", cpu);
preset_lpj = loops_per_jiffy;
if (cpu > 0 && cpu < ARRAY_SIZE(cold_boot_flags))
flag = cold_boot_flags[cpu];
else
__WARN();
if (per_cpu(cold_boot_done, cpu) == false) {
init_cpu_debug_counter_for_cold_boot();
ret = scm_set_boot_addr((void *)
virt_to_phys(msm_secondary_startup),
flag);
if (ret == 0)
release_secondary(cpu);
else
printk(KERN_DEBUG "Failed to set secondary core boot "
"address\n");
per_cpu(cold_boot_done, cpu) = true;
}
spin_lock(&boot_lock);
/*
* The secondary processor is waiting to be released from
* the holding pen - release it, then wait for it to flag
* that it has been released by resetting pen_release.
*
* Note that "pen_release" is the hardware CPU ID, whereas
* "cpu" is Linux's internal ID.
*/
write_pen_release(cpu_logical_map(cpu));
gic_raise_softirq(cpumask_of(cpu), 1);
timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) {
smp_rmb();
if (pen_release == -1)
break;
udelay(10);
}
spin_unlock(&boot_lock);
return pen_release != -1 ? -ENOSYS : 0;
}
示例12: imx_enable_cpu
void imx_enable_cpu(int cpu, bool enable)
{
u32 mask, val;
cpu = cpu_logical_map(cpu);
mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
val = readl_relaxed(src_base + SRC_SCR);
val = enable ? val | mask : val & ~mask;
writel_relaxed(val, src_base + SRC_SCR);
}
示例13: tegra_cpu_kill
int tegra_cpu_kill(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
return 1;
}
示例14: tegra_cpu_kill
int tegra_cpu_kill(unsigned cpu)
{
cpu = cpu_logical_map(cpu);
/* Clock gate the CPU */
tegra_wait_cpu_in_reset(cpu);
tegra_disable_cpu_clock(cpu);
return 1;
}
示例15: unmask_loongson_irq
static inline void unmask_loongson_irq(struct irq_data *d)
{
/* Workaround: UART IRQ may deliver to any core */
if (d->irq == LOONGSON_UART_IRQ) {
int cpu = smp_processor_id();
int node_id = cpu_logical_map(cpu) / loongson_sysconf.cores_per_node;
int core_id = cpu_logical_map(cpu) % loongson_sysconf.cores_per_node;
u64 intenset_addr = smp_group[node_id] |
(u64)(&LOONGSON_INT_ROUTER_INTENSET);
u64 introuter_lpc_addr = smp_group[node_id] |
(u64)(&LOONGSON_INT_ROUTER_LPC);
*(volatile u32 *)intenset_addr = 1 << 10;
*(volatile u8 *)introuter_lpc_addr = 0x10 + (1<<core_id);
}
set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
irq_enable_hazard();
}