C++ cpu_irq_save函数代码示例

static void udd_ctrl_send_zlp_out(void)
{
	irqflags_t flags;

	udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP;
	// No action is necessary to accept OUT ZLP
	// because the buffer of control endpoint is already free

	// To detect a protocol error, enable NAK interrupt on data IN phase
	flags = cpu_irq_save();
	udd_ack_nak_in(0);
	udd_enable_nak_in_interrupt(0);
	cpu_irq_restore(flags);
}

void udd_disable(void)
{
	irqflags_t flags;
	flags = cpu_irq_save();
	// Disable USB pad
	otg_disable();
	otg_disable_pad();
	sysclk_disable_usb();
	udd_sleep_mode(false);
#ifndef UDD_NO_SLEEP_MGR
	sleepmgr_unlock_mode(USBC_SLEEP_MODE_USB_SUSPEND);
#endif
	cpu_irq_restore(flags);
}

iram_size_t uhi_cdc_write_buf(uint8_t port, const void* buf, iram_size_t size)
{
	irqflags_t flags;
	uhi_cdc_port_t *ptr_port;
	uhi_cdc_line_t *line;
	uhi_cdc_buf_t *cdc_buf;
	iram_size_t copy_nb;

	// Select port
	ptr_port = uhi_cdc_get_port(port);
	if (ptr_port == NULL) {
		return false;
	}
	line = &ptr_port->line_tx;

	if (9 == ptr_port->conf.bDataBits) {
		size *=2;
	}

uhi_cdc_write_buf_loop_wait:
	// Check available space
	cdc_buf = &line->buffer[line->buf_sel];
	while (line->buffer_size == cdc_buf->nb) {
		if (NULL == uhi_cdc_get_port(port)) {
			return 0;
		}
		goto uhi_cdc_write_buf_loop_wait;
	}

	// Write value
	flags = cpu_irq_save();
	cdc_buf = &line->buffer[line->buf_sel];
	copy_nb = line->buffer_size - cdc_buf->nb;
	if (copy_nb>size) {
		copy_nb = size;
	}
	memcpy(&cdc_buf->ptr[cdc_buf->nb], buf, copy_nb);
	cdc_buf->nb += copy_nb;
	cpu_irq_restore(flags);

	// Update buffer pointer
	buf = (uint8_t*)buf + copy_nb;
	size -= copy_nb;

	if (size) {
		goto uhi_cdc_write_buf_loop_wait;
	}

	return 0;
}

void udd_enable(void)
{
	irqflags_t flags;

	flags = cpu_irq_save();

#if SAMG55
	matrix_set_usb_device();
#endif

	// Enable USB hardware
	udd_enable_periph_ck();
	sysclk_enable_usb();
	// Cortex, uses NVIC, no need to register IRQ handler
	NVIC_SetPriority((IRQn_Type) ID_UDP, UDD_USB_INT_LEVEL);
	NVIC_EnableIRQ((IRQn_Type) ID_UDP);

	// Reset internal variables
#if (0!=USB_DEVICE_MAX_EP)
	udd_ep_job_table_reset();
#endif

	// Always authorize asynchronous USB interrupts to exit of sleep mode
	pmc_set_fast_startup_input(PMC_FSMR_USBAL);

#ifndef UDD_NO_SLEEP_MGR
	// Initialize the sleep mode authorized for the USB suspend mode
	udd_b_idle = false;
	sleepmgr_lock_mode(UDP_SLEEP_MODE_USB_SUSPEND);
#endif

#if UDD_VBUS_IO
	/* Initialize VBus monitor */
	udd_vbus_init(udd_vbus_handler);
	udd_vbus_monitor_sleep_mode(true);
	/* Force Vbus interrupt when Vbus is always high
	 * This is possible due to a short timing between a Host mode stop/start.
	 */
	if (Is_udd_vbus_high()) {
		udd_vbus_handler(USB_VBUS_PIO_ID, USB_VBUS_PIO_MASK);
	}
#else
#  ifndef USB_DEVICE_ATTACH_AUTO_DISABLE
	udd_attach();
#  endif
#endif

	cpu_irq_restore(flags);
}

// Returns the number of times the timer has ticked (1000 Hz)
uint32_t getSystemTime(void) {
	uint32_t temp;
	irqflags_t irq_state;
	
	// Save and disable interrupts:
	irq_state = cpu_irq_save();

	// Get the system time:
	temp = system_time;
	
	// Restore the state of the interrupts:
	cpu_irq_restore(irq_state);
	
	return temp;
}

iram_size_t udi_cdc_multi_get_nb_received_data(uint8_t port)
{
	irqflags_t flags;
	uint16_t pos;
	iram_size_t nb_received;

#if UDI_CDC_PORT_NB == 1 // To optimize code
	port = 0;
#endif
	flags = cpu_irq_save();
	pos = udi_cdc_rx_pos[port];
	nb_received = udi_cdc_rx_buf_nb[port][udi_cdc_rx_buf_sel[port]] - pos;
	cpu_irq_restore(flags);
	return nb_received;
}

static void udd_ctrl_send_zlp_in(void)
{
	irqflags_t flags;

	udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP;
	// Validate and send empty IN packet on control endpoint
	flags = cpu_irq_save();
	// Send ZLP on IN endpoint
	udd_ack_in_send(0);
	udd_enable_in_send_interrupt(0);
	// To detect a protocol error, enable nak interrupt on data OUT phase
	udd_ack_nak_out(0);
	udd_enable_nak_out_interrupt(0);
	cpu_irq_restore(flags);
}

void dfll_enable_open_loop(const struct dfll_config *cfg,
		unsigned int dfll_id)
{
	irqflags_t flags;

	/* First, enable the DFLL, then configure it */
	flags = cpu_irq_save();
	AVR32_SCIF.unlock =
			( AVR32_SCIF_UNLOCK_KEY_VALUE << AVR32_SCIF_UNLOCK_KEY_OFFSET) |
			AVR32_SCIF_DFLL0CONF;
	AVR32_SCIF.dfll0conf = 1U << AVR32_SCIF_DFLL0CONF_EN;
	cpu_irq_restore(flags);
	dfll_write_reg(DFLL0CONF, cfg->conf | (1U << AVR32_SCIF_DFLL0CONF_EN));
	dfll_write_reg(DFLL0SSG, cfg->ssg);
}

/**
 * Record a trace event
 * @param event
 * @param data
 */
void hf_trace(uint8_t event, uint8_t data) {
    irqflags_t irq;

    irq = cpu_irq_save();
    t_head->event = event;
    t_head->data = data;
    /* in 250nsec increments */
    t_head->time = tc_read_count(&TCC0);

    if (++t_head >= &trace_records[TRACE_RECORDS])
    t_head = trace_records;
    /* marker */
    t_head->event = 255;
    cpu_irq_restore(irq);
}

static void udd_reset_ep_ctrl(void)
{
	irqflags_t flags;

	// Reset USB address to 0
	udd_enable_address();
	udd_configure_address(0);
	// Alloc and configure control endpoint in OUT direction
	udd_configure_endpoint(0, USB_EP_TYPE_CONTROL, 0);
	udd_enable_endpoint(0);

	flags = cpu_irq_save();
	udd_enable_endpoint_interrupt(0);
	cpu_irq_restore(flags);
}

void udd_disable(void)
{
	irqflags_t flags;
	flags = cpu_irq_save();
	udd_detach_device();
	// Disable interface
	USB_CTRLA = 0;
	USB_CTRLB = 0;
	sysclk_disable_usb();
	udd_sleep_mode(false);
#ifndef UDD_NO_SLEEP_MGR
	sleepmgr_unlock_mode(USBC_SLEEP_MODE_USB_SUSPEND);
#endif
	cpu_irq_restore(flags);
}

void osc_priv_enable_osc32(void)
{
	irqflags_t flags;

	flags = cpu_irq_save();
	AVR32_SCIF.unlock = 0xaa000000 | AVR32_SCIF_OSCCTRL32;
	AVR32_SCIF.oscctrl32 =
			(OSC32_STARTUP_VALUE << AVR32_SCIF_OSCCTRL32_STARTUP)
			| (OSC32_MODE_VALUE << AVR32_SCIF_OSCCTRL32_MODE)
			| (1U << AVR32_SCIF_OSCCTRL32_EN32K)
			| (1U << AVR32_SCIF_OSCCTRL32_EN1K)
			| (BOARD_OSC32_PINSEL << AVR32_SCIF_OSCCTRL32_PINSEL)
			| (1U << AVR32_SCIF_OSCCTRL32_OSC32EN);
	cpu_irq_restore(flags);
}

/**
 * \internal
 * \brief Disable a maskable module clock.
 * \param bus_id Bus index, given by the \c AVR32_PM_CLK_GRP_xxx definitions.
 * \param module_index Index of the module to be disabled. This is the
 * bit number in the corresponding xxxMASK register.
 */
void sysclk_priv_disable_module(unsigned int bus_id, unsigned int module_index)
{
	irqflags_t flags;
	uint32_t   mask;

	flags = cpu_irq_save();

	/* Disable the clock */
	mask = *(&AVR32_PM.cpumask + bus_id);
	mask &= ~(1U << module_index);
	AVR32_PM.unlock = 0xaa000020 + (4 * bus_id);
	*(&AVR32_PM.cpumask + bus_id) = mask;

	cpu_irq_restore(flags);
}

/**
 * \brief Get current time
 *
 * \return Current time value
 *
 * \note Due to errate, this can return old values shortly after waking up from
 * sleep.
 */
uint32_t rtc_get_time(void)
{
	irqflags_t flags;
	uint16_t   count_high;
	uint16_t   count_low;

	flags = cpu_irq_save();
	count_high = rtc_data.counter_high;
	count_low = RTC.CNT;
	// Test for possible pending increase of high count value
	if ((count_low == 0) && (RTC.INTFLAGS & RTC_OVFIF_bm))
		count_high++;
	cpu_irq_restore(flags);
	return ((uint32_t)count_high << 16) | count_low;
}

static bool udi_cdc_rx_start(uint8_t port)
{
	irqflags_t flags;
	uint8_t buf_sel_trans;
	udd_ep_id_t ep;

#if UDI_CDC_PORT_NB == 1 // To optimize code
	port = 0;
#endif

	flags = cpu_irq_save();
	buf_sel_trans = udi_cdc_rx_buf_sel[port];
	if (udi_cdc_rx_trans_ongoing[port] ||
		(udi_cdc_rx_pos[port] < udi_cdc_rx_buf_nb[port][buf_sel_trans])) {
		// Transfer already on-going or current buffer no empty
		cpu_irq_restore(flags);
		return false;
	}

	// Change current buffer
	udi_cdc_rx_pos[port] = 0;
	udi_cdc_rx_buf_sel[port] = (buf_sel_trans==0)?1:0;

	// Start transfer on RX
	udi_cdc_rx_trans_ongoing[port] = true;
	cpu_irq_restore(flags);

	if (udi_cdc_multi_is_rx_ready(port)) {
		UDI_CDC_RX_NOTIFY(port);
	}
	// Send the buffer with enable of short packet
	switch (port) {
#define UDI_CDC_PORT_TO_DATA_EP_OUT(index, unused) \
	case index: \
		ep = UDI_CDC_DATA_EP_OUT_##index; \
		break;
	MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_PORT_TO_DATA_EP_OUT, ~)
#undef UDI_CDC_PORT_TO_DATA_EP_OUT
	default:
		ep = UDI_CDC_DATA_EP_OUT_0;
		break;
	}
	return udd_ep_run(ep,
			true,
			udi_cdc_rx_buf[port][buf_sel_trans],
			UDI_CDC_RX_BUFFERS,
			udi_cdc_data_received);
}