本文整理汇总了C++中clps_readl函数的典型用法代码示例。如果您正苦于以下问题：C++ clps_readl函数的具体用法？C++ clps_readl怎么用？C++ clps_readl使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了clps_readl函数的15个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: int1_unmask
static void int1_unmask(struct irq_data *d)
{
u32 intmr1;
intmr1 = clps_readl(INTMR1);
intmr1 |= 1 << d->irq;
clps_writel(intmr1, INTMR1);
}示例2: int3_unmask
static void int3_unmask(struct irq_data *d)
{
u32 intmr3;
intmr3 = clps_readl(INTMR3);
intmr3 |= 1 << (d->irq - 32);
clps_writel(intmr3, INTMR3);
}示例3: int2_unmask
static void int2_unmask(struct irq_data *d)
{
u32 intmr2;
intmr2 = clps_readl(INTMR2);
intmr2 |= 1 << (d->irq - 16);
clps_writel(intmr2, INTMR2);
}示例4: int2_mask
static void int2_mask(unsigned int irq)
{
u32 intmr2;
intmr2 = clps_readl(INTMR2);
intmr2 &= ~(1 << (irq - 16));
clps_writel(intmr2, INTMR2);
}示例5: int1_mask
static void int1_mask(unsigned int irq)
{
u32 intmr1;
intmr1 = clps_readl(INTMR1);
intmr1 &= ~(1 << irq);
clps_writel(intmr1, INTMR1);
}示例6: setup_cs43l42
int setup_cs43l42(void)
{
volatile long u;
volatile char port_d;
printk("cs43l42: init dac\n");
port_d = clps_readb(PDDR) & ~(SCL | SDA);
/* enable codec_en# */
reset_cs43l42();
/* make SDA & SCL outputs */
make_scl_sda_outputs();
/*
* enable the two wire serial interface on the CS43L42
* by setting the CP_EN bit (bit 0) of register 1
*/
cs43l42_i2c_write(ADDR_CS43L42, CS43L42_PWRCTL, 0xd2);
/* set the data format to left justified */
cs43l42_i2c_write(ADDR_CS43L42, 0x0b, 0x02);
/* power on the DAC */
cs43l42_i2c_write(ADDR_CS43L42, CS43L42_PWRCTL, 0xd0);
/* delay while the DAC initializes */
for(u = 0; u < 15; u++)
udelay(5);
cs43l42_i2c_write(ADDR_CS43L42, 2, 0xf1);
cs43l42_i2c_write(ADDR_CS43L42, 3, 0xf1);
#if 0
cs43l42_dump_regs();
printk("syscon1 %08x\n", clps_readl(SYSCON1));
printk("syscon2 %08x\n", clps_readl(SYSCON2));
printk("syscon3 %08x\n", clps_readl(SYSCON3));
#endif
/* restore original port D value */
port_d |= clps_readb(PDDR);
clps_writeb(port_d, PDDR);
printk("cs43l42: init dac complete\n");
return 0;
}示例7: clps711x_timer_init
static void __init clps711x_timer_init(void)
{
struct timespec tv;
unsigned int syscon;
syscon = clps_readl(SYSCON1);
syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
clps_writel(syscon, SYSCON1);
clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
tv.tv_nsec = 0;
tv.tv_sec = clps_readl(RTCDR);
do_settimeofday(&tv);
}示例8: unmask_irq_int2
static void unmask_irq_int2(unsigned int irq)
{
u32 intmr2;
intmr2 = clps_readl(INTMR2);
intmr2 |= 1 << (irq - 16);
clps_writel(intmr2, INTMR2);
}示例9: unmask_irq_int1
static void unmask_irq_int1(unsigned int irq)
{
u32 intmr1;
intmr1 = clps_readl(INTMR1);
intmr1 |= 1 << irq;
clps_writel(intmr1, INTMR1);
}示例10: uart_clps711x_shutdown
static void uart_clps711x_shutdown(struct uart_port *port)
{
/* Free the interrupts */
devm_free_irq(port->dev, TX_IRQ(port), port);
devm_free_irq(port->dev, RX_IRQ(port), port);
/* Disable the port */
clps_writel(clps_readl(SYSCON(port)) & ~SYSCON_UARTEN, SYSCON(port));
}示例11: guide_a07_hw_init
MACHINE_END
static int guide_a07_hw_init(void)
{
/* in cs[1] (the FPGA), set zero wait states, clkenb, and sqaen */
u32 memcfg1 = 0xfc << 8;
memcfg1 |= clps_readl(MEMCFG1);
clps_writel(memcfg1, MEMCFG1);
return 0;
}示例12: clps711xuart_break_ctl
static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
{
unsigned int ubrlcr;
ubrlcr = clps_readl(UBRLCR(port));
if (break_state == -1)
ubrlcr |= UBRLCR_BREAK;
else
ubrlcr &= ~UBRLCR_BREAK;
clps_writel(ubrlcr, UBRLCR(port));
}示例13: ep7211_close
static int ep7211_close(struct sir_dev *dev)
{
unsigned int syscon;
/* Turn off the SIR encoder. */
syscon = clps_readl(SYSCON1);
syscon &= ~SYSCON1_SIREN;
clps_writel(syscon, SYSCON1);
return 0;
}示例14: uart_clps711x_console_write
static void uart_clps711x_console_write(struct console *co, const char *c,
unsigned n)
{
struct clps711x_port *s = (struct clps711x_port *)co->data;
struct uart_port *port = &s->port[co->index];
u32 syscon;
/* Ensure that the port is enabled */
syscon = clps_readl(SYSCON(port));
clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
uart_console_write(port, c, n, uart_clps711x_console_putchar);
/* Wait for transmitter to become empty */
while (clps_readl(SYSFLG(port)) & SYSFLG_UBUSY)
barrier();
/* Restore the uart state */
clps_writel(syscon, SYSCON(port));
}示例15: uart_clps711x_int_rx
static irqreturn_t uart_clps711x_int_rx(int irq, void *dev_id)
{
struct uart_port *port = dev_id;
struct tty_struct *tty = tty_port_tty_get(&port->state->port);
unsigned int status, ch, flg;
if (!tty)
return IRQ_HANDLED;
for (;;) {
status = clps_readl(SYSFLG(port));
if (status & SYSFLG_URXFE)
break;
ch = clps_readw(UARTDR(port));
status = ch & (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR);
ch &= 0xff;
port->icount.rx++;
flg = TTY_NORMAL;
if (unlikely(status)) {
if (status & UARTDR_PARERR)
port->icount.parity++;
else if (status & UARTDR_FRMERR)
port->icount.frame++;
else if (status & UARTDR_OVERR)
port->icount.overrun++;
status &= port->read_status_mask;
if (status & UARTDR_PARERR)
flg = TTY_PARITY;
else if (status & UARTDR_FRMERR)
flg = TTY_FRAME;
else if (status & UARTDR_OVERR)
flg = TTY_OVERRUN;
}
if (uart_handle_sysrq_char(port, ch))
continue;
if (status & port->ignore_status_mask)
continue;
uart_insert_char(port, status, UARTDR_OVERR, ch, flg);
}
tty_flip_buffer_push(tty);
tty_kref_put(tty);
return IRQ_HANDLED;
}