本文整理汇总了C++中Vec_PtrPush函数的典型用法代码示例。如果您正苦于以下问题:C++ Vec_PtrPush函数的具体用法?C++ Vec_PtrPush怎么用?C++ Vec_PtrPush使用的例子?那么, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了Vec_PtrPush函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: Ivy_ManAddMemory
/**Function*************************************************************
Synopsis [Allocates additional memory for the nodes.]
Description [Allocates IVY_PAGE_SIZE nodes. Aligns memory by 32 bytes.
Records the pointer to the AIG manager in the -1 entry.]
SideEffects []
SeeAlso []
***********************************************************************/
void Ivy_ManAddMemory( Ivy_Man_t * p )
{
char * pMemory;
int i, nBytes;
int EntrySizeMax = 128;
assert( sizeof(Ivy_Obj_t) <= EntrySizeMax );
assert( p->pListFree == NULL );
// assert( (Ivy_ManObjNum(p) & IVY_PAGE_MASK) == 0 );
// allocate new memory page
nBytes = sizeof(Ivy_Obj_t) * (1<<IVY_PAGE_SIZE) + EntrySizeMax;
pMemory = ALLOC( char, nBytes );
Vec_PtrPush( p->vChunks, pMemory );
// align memory at the 32-byte boundary
pMemory = pMemory + EntrySizeMax - (((int)pMemory) & (EntrySizeMax-1));
// remember the manager in the first entry
Vec_PtrPush( p->vPages, pMemory );
// break the memory down into nodes
p->pListFree = (Ivy_Obj_t *)pMemory;
for ( i = 1; i <= IVY_PAGE_MASK; i++ )
{
*((char **)pMemory) = pMemory + sizeof(Ivy_Obj_t);
pMemory += sizeof(Ivy_Obj_t);
}
*((char **)pMemory) = NULL;
}
示例2: Llb_ManDumpReached
/**Function*************************************************************
Synopsis [Writes reached state BDD into a BLIF file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Llb_ManDumpReached( DdManager * ddG, DdNode * bReached, char * pModel, char * pFileName )
{
FILE * pFile;
Vec_Ptr_t * vNamesIn, * vNamesOut;
char * pName;
int i, nDigits;
// reorder the BDD
Cudd_ReduceHeap( ddG, CUDD_REORDER_SYMM_SIFT, 1 );
// create input names
nDigits = Extra_Base10Log( Cudd_ReadSize(ddG) );
vNamesIn = Vec_PtrAlloc( Cudd_ReadSize(ddG) );
for ( i = 0; i < Cudd_ReadSize(ddG); i++ )
{
pName = Llb_ManGetDummyName( "ff", i, nDigits );
Vec_PtrPush( vNamesIn, Extra_UtilStrsav(pName) );
}
// create output names
vNamesOut = Vec_PtrAlloc( 1 );
Vec_PtrPush( vNamesOut, Extra_UtilStrsav("Reached") );
// write the file
pFile = fopen( pFileName, "wb" );
Cudd_DumpBlif( ddG, 1, &bReached, (char **)Vec_PtrArray(vNamesIn), (char **)Vec_PtrArray(vNamesOut), pModel, pFile, 0 );
fclose( pFile );
// cleanup
Vec_PtrForEachEntry( char *, vNamesIn, pName, i )
ABC_FREE( pName );
Vec_PtrForEachEntry( char *, vNamesOut, pName, i )
ABC_FREE( pName );
Vec_PtrFree( vNamesIn );
Vec_PtrFree( vNamesOut );
}
示例3: Llb_ImgSupports
/**Function*************************************************************
Synopsis [Computes supports of the partitions.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Llb_ImgSupports( Aig_Man_t * p, Vec_Ptr_t * vDdMans, Vec_Int_t * vStart, Vec_Int_t * vStop, int fAddPis, int fVerbose )
{
Vec_Ptr_t * vSupps;
Vec_Int_t * vOne;
Aig_Obj_t * pObj;
DdManager * dd;
DdNode * bSupp, * bTemp;
int i, Entry, nSize;
nSize = Cudd_ReadSize( (DdManager *)Vec_PtrEntry( vDdMans, 0 ) );
vSupps = Vec_PtrAlloc( 100 );
// create initial
vOne = Vec_IntStart( nSize );
Vec_IntForEachEntry( vStart, Entry, i )
Vec_IntWriteEntry( vOne, Entry, 1 );
Vec_PtrPush( vSupps, vOne );
// create intermediate
Vec_PtrForEachEntry( DdManager *, vDdMans, dd, i )
{
vOne = Vec_IntStart( nSize );
bSupp = Cudd_Support( dd, dd->bFunc ); Cudd_Ref( bSupp );
for ( bTemp = bSupp; bTemp != Cudd_ReadOne(dd); bTemp = cuddT(bTemp) )
Vec_IntWriteEntry( vOne, bTemp->index, 1 );
Cudd_RecursiveDeref( dd, bSupp );
Vec_PtrPush( vSupps, vOne );
}
示例4: Io_ReadBlifGetTokens
/**Function*************************************************************
Synopsis [Gets the tokens taking into account the line breaks.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Io_ReadBlifGetTokens( Io_ReadBlif_t * p )
{
Vec_Ptr_t * vTokens;
char * pLastToken;
int i;
// get rid of the old tokens
if ( p->vNewTokens->nSize > 0 )
{
for ( i = 0; i < p->vNewTokens->nSize; i++ )
ABC_FREE( p->vNewTokens->pArray[i] );
p->vNewTokens->nSize = 0;
}
// get the new tokens
vTokens = (Vec_Ptr_t *)Extra_FileReaderGetTokens(p->pReader);
if ( vTokens == NULL )
return vTokens;
// check if there is a transfer to another line
pLastToken = (char *)vTokens->pArray[vTokens->nSize - 1];
if ( pLastToken[ strlen(pLastToken)-1 ] != '\\' )
return vTokens;
// remove the slash
pLastToken[ strlen(pLastToken)-1 ] = 0;
if ( pLastToken[0] == 0 )
vTokens->nSize--;
// load them into the new array
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav((char *)vTokens->pArray[i]) );
// load as long as there is the line break
while ( 1 )
{
// get the new tokens
vTokens = (Vec_Ptr_t *)Extra_FileReaderGetTokens(p->pReader);
if ( vTokens->nSize == 0 )
return p->vNewTokens;
// check if there is a transfer to another line
pLastToken = (char *)vTokens->pArray[vTokens->nSize - 1];
if ( pLastToken[ strlen(pLastToken)-1 ] == '\\' )
{
// remove the slash
pLastToken[ strlen(pLastToken)-1 ] = 0;
if ( pLastToken[0] == 0 )
vTokens->nSize--;
// load them into the new array
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav((char *)vTokens->pArray[i]) );
continue;
}
// otherwise, load them and break
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav((char *)vTokens->pArray[i]) );
break;
}
return p->vNewTokens;
}
示例5: Io_ReadBlifReorderFormalNames
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifReorderFormalNames( Vec_Ptr_t * vTokens, Mio_Gate_t * pGate )
{
Mio_Pin_t * pGatePin;
char * pName, * pNamePin;
int i, k, nSize, Length;
nSize = Vec_PtrSize(vTokens);
if ( nSize - 3 != Mio_GateReadInputs(pGate) )
return 0;
// check if the names are in order
for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ )
{
pNamePin = Mio_PinReadName(pGatePin);
Length = strlen(pNamePin);
pName = (char *)Vec_PtrEntry(vTokens, i+2);
if ( !strncmp( pNamePin, pName, Length ) && pName[Length] == '=' )
continue;
break;
}
if ( i == nSize - 3 )
return 1;
// reorder the pins
for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ )
{
pNamePin = Mio_PinReadName(pGatePin);
Length = strlen(pNamePin);
for ( k = 2; k < nSize; k++ )
{
pName = (char *)Vec_PtrEntry(vTokens, k);
if ( !strncmp( pNamePin, pName, Length ) && pName[Length] == '=' )
{
Vec_PtrPush( vTokens, pName );
break;
}
}
}
pNamePin = Mio_GateReadOutName(pGate);
Length = strlen(pNamePin);
for ( k = 2; k < nSize; k++ )
{
pName = (char *)Vec_PtrEntry(vTokens, k);
if ( !strncmp( pNamePin, pName, Length ) && pName[Length] == '=' )
{
Vec_PtrPush( vTokens, pName );
break;
}
}
if ( Vec_PtrSize(vTokens) - nSize != nSize - 2 )
return 0;
Vec_PtrForEachEntryStart( char *, vTokens, pName, k, nSize )
Vec_PtrWriteEntry( vTokens, k - nSize + 2, pName );
Vec_PtrShrink( vTokens, nSize );
return 1;
}
示例6: Abc_NtkMiterSatCreateInt
/**Function*************************************************************
Synopsis [Sets up the SAT sat_solver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode, * pFanin, * pNodeC, * pNodeT, * pNodeE;
Vec_Ptr_t * vNodes, * vSuper;
Vec_Int_t * vVars;
int i, k, fUseMuxes = 1;
// int fOrderCiVarsFirst = 0;
int RetValue = 0;
assert( Abc_NtkIsStrash(pNtk) );
// clean the CI node pointers
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->pCopy = NULL;
// start the data structures
vNodes = Vec_PtrAlloc( 1000 ); // the nodes corresponding to vars in the sat_solver
vSuper = Vec_PtrAlloc( 100 ); // the nodes belonging to the given implication supergate
vVars = Vec_IntAlloc( 100 ); // the temporary array for variables in the clause
// add the clause for the constant node
pNode = Abc_AigConst1(pNtk);
pNode->fMarkA = 1;
pNode->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)vNodes->nSize;
Vec_PtrPush( vNodes, pNode );
Abc_NtkClauseTriv( pSat, pNode, vVars );
/*
// add the PI variables first
Abc_NtkForEachCi( pNtk, pNode, i )
{
pNode->fMarkA = 1;
pNode->pCopy = (Abc_Obj_t *)vNodes->nSize;
Vec_PtrPush( vNodes, pNode );
}
*/
// collect the nodes that need clauses and top-level assignments
Vec_PtrClear( vSuper );
Abc_NtkForEachCo( pNtk, pNode, i )
{
// get the fanin
pFanin = Abc_ObjFanin0(pNode);
// create the node's variable
if ( pFanin->fMarkA == 0 )
{
pFanin->fMarkA = 1;
pFanin->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)vNodes->nSize;
Vec_PtrPush( vNodes, pFanin );
}
// add the trivial clause
Vec_PtrPush( vSuper, Abc_ObjChild0(pNode) );
}
示例7: Dar_NewChoiceSynthesis
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description [Takes AIG manager, consumes it, and produces GIA manager.]
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Dar_NewChoiceSynthesis( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fLightSynth, int fVerbose )
//alias resyn "b; rw; rwz; b; rwz; b"
//alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
{
Vec_Ptr_t * vGias;
Gia_Man_t * pGia, * pTemp;
int i;
if ( fUpdateLevel && Dar_NewChoiceSynthesisGuard(pAig) )
{
if ( fVerbose )
printf( "Warning: Due to high fanout count of some nodes, level updating is disabled.\n" );
fUpdateLevel = 0;
}
vGias = Vec_PtrAlloc( 3 );
pGia = Gia_ManFromAig(pAig);
Vec_PtrPush( vGias, pGia );
pAig = Dar_NewCompress( pAig, fBalance, fUpdateLevel, fPower, fVerbose );
pGia = Gia_ManFromAig(pAig);
Vec_PtrPush( vGias, pGia );
//Aig_ManPrintStats( pAig );
pAig = Dar_NewCompress2( pAig, fBalance, fUpdateLevel, 1, fPower, fLightSynth, fVerbose );
pGia = Gia_ManFromAig(pAig);
Vec_PtrPush( vGias, pGia );
//Aig_ManPrintStats( pAig );
Aig_ManStop( pAig );
// swap around the first and the last
pTemp = (Gia_Man_t *)Vec_PtrPop( vGias );
Vec_PtrPush( vGias, Vec_PtrEntry(vGias,0) );
Vec_PtrWriteEntry( vGias, 0, pTemp );
// Aig_Man_t * pAig;
// int i;
// printf( "Choicing will be performed with %d AIGs:\n", Vec_PtrSize(p->vAigs) );
// Vec_PtrForEachEntry( Aig_Man_t *, p->vAigs, pAig, i )
// Aig_ManPrintStats( pAig );
// derive the miter
pGia = Gia_ManChoiceMiter( vGias );
// cleanup
Vec_PtrForEachEntry( Gia_Man_t *, vGias, pTemp, i )
Gia_ManStop( pTemp );
Vec_PtrFree( vGias );
return pGia;
}
示例8: Mig_CollectNodes
// NOTE: leaves won't be collected
// nodes will be collected in dfs order
void Mig_CollectNodes( Mig_Man_t * pMan, Mig_Obj_t * pNode, Vec_Ptr_t * vNodes )
{
Mig_ObjSetTravIdCurrent( pMan, pNode );
if( Mig_ObjIsPi(pNode) || Mig_ObjIsConst(pNode) )
{
Vec_PtrPush( vNodes, pNode );
return;
}
assert( Mig_ObjIsNode(pNode) );
if( !Mig_ObjIsTravIdCurrent( pMan, Mig_Regular(pNode->pFanin0) ) ) Mig_CollectNodes( pMan, Mig_Regular(pNode->pFanin0), vNodes );
if( !Mig_ObjIsTravIdCurrent( pMan, Mig_Regular(pNode->pFanin1) ) ) Mig_CollectNodes( pMan, Mig_Regular(pNode->pFanin1), vNodes );
if( !Mig_ObjIsTravIdCurrent( pMan, Mig_Regular(pNode->pFanin2) ) ) Mig_CollectNodes( pMan, Mig_Regular(pNode->pFanin2), vNodes );
Vec_PtrPush( vNodes, pNode );
}
示例9: Abc_NtkAigToSeq
/**Function*************************************************************
Synopsis [Converts combinational AIG with latches into sequential AIG.]
Description [The const/PI/PO nodes are duplicated. The internal
nodes are duplicated in the topological order. The dangling nodes
are not duplicated. The choice nodes are duplicated.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pFaninNew;
Vec_Int_t * vInitValues;
Abc_InitType_t Init;
int i, k, RetValue;
// make sure it is an AIG without self-feeding latches
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkIsDfsOrdered(pNtk) );
if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtk) )
printf( "Modified %d self-feeding latches. The result will not verify.\n", RetValue );
assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 );
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG, 1 );
// duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
// map the constant nodes
Abc_NtkCleanCopy( pNtk );
Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// copy all objects, except the latches and constant
Vec_PtrFill( pNtkNew->vObjs, Abc_NtkObjNumMax(pNtk), NULL );
Vec_PtrWriteEntry( pNtkNew->vObjs, 0, Abc_AigConst1(pNtk)->pCopy );
Abc_NtkForEachObj( pNtk, pObj, i )
{
if ( i == 0 || Abc_ObjIsLatch(pObj) )
continue;
pObj->pCopy = Abc_ObjAlloc( pNtkNew, pObj->Type );
pObj->pCopy->Id = pObj->Id; // the ID is the same for both
pObj->pCopy->fPhase = pObj->fPhase; // used to work with choices
pObj->pCopy->Level = pObj->Level; // used for upper bound on clock cycle
Vec_PtrWriteEntry( pNtkNew->vObjs, pObj->pCopy->Id, pObj->pCopy );
pNtkNew->nObjs++;
}
pNtkNew->nObjCounts[ABC_OBJ_NODE] = pNtk->nObjCounts[ABC_OBJ_NODE];
// create PI/PO and their names
Abc_NtkForEachPi( pNtk, pObj, i )
{
Vec_PtrPush( pNtkNew->vPis, pObj->pCopy );
Vec_PtrPush( pNtkNew->vCis, pObj->pCopy );
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
}
示例10: Abc_SclReadSurface
/**Function*************************************************************
Synopsis [Reading library from file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static void Abc_SclReadSurface( Vec_Str_t * vOut, int * pPos, SC_Surface * p )
{
Vec_Flt_t * vVec;
int i, j;
for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
Vec_FltPush( p->vIndex0, Vec_StrGetF(vOut, pPos) );
for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
Vec_FltPush( p->vIndex1, Vec_StrGetF(vOut, pPos) );
for ( i = 0; i < Vec_FltSize(p->vIndex0); i++ )
{
vVec = Vec_FltAlloc( Vec_FltSize(p->vIndex1) );
Vec_PtrPush( p->vData, vVec );
for ( j = 0; j < Vec_FltSize(p->vIndex1); j++ )
Vec_FltPush( vVec, Vec_StrGetF(vOut, pPos) );
}
for ( i = 0; i < 3; i++ )
p->approx[0][i] = Vec_StrGetF( vOut, pPos );
for ( i = 0; i < 4; i++ )
p->approx[1][i] = Vec_StrGetF( vOut, pPos );
for ( i = 0; i < 6; i++ )
p->approx[2][i] = Vec_StrGetF( vOut, pPos );
}
示例11: Rwr_ManAddNode
/**Function*************************************************************
Synopsis [Adds one node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Rwr_Node_t * Rwr_ManAddNode( Rwr_Man_t * p, Rwr_Node_t * p0, Rwr_Node_t * p1, int fExor, int Level, int Volume )
{
Rwr_Node_t * pNew;
unsigned uTruth;
// compute truth table, leve, volume
p->nConsidered++;
if ( fExor )
uTruth = (p0->uTruth ^ p1->uTruth);
else
uTruth = (Rwr_IsComplement(p0)? ~Rwr_Regular(p0)->uTruth : Rwr_Regular(p0)->uTruth) &
(Rwr_IsComplement(p1)? ~Rwr_Regular(p1)->uTruth : Rwr_Regular(p1)->uTruth) & 0xFFFF;
// create the new node
pNew = (Rwr_Node_t *)Extra_MmFixedEntryFetch( p->pMmNode );
pNew->Id = p->vForest->nSize;
pNew->TravId = 0;
pNew->uTruth = uTruth;
pNew->Level = Level;
pNew->Volume = Volume;
pNew->fUsed = 0;
pNew->fExor = fExor;
pNew->p0 = p0;
pNew->p1 = p1;
pNew->pNext = NULL;
Vec_PtrPush( p->vForest, pNew );
// do not add if the node is not essential
if ( uTruth != p->puCanons[uTruth] )
return pNew;
// add to the list
p->nAdded++;
if ( p->pTable[uTruth] == NULL )
p->nClasses++;
Rwr_ListAddToTail( p->pTable + uTruth, pNew );
return pNew;
}
示例12: Hop_ManDfs_rec
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Collects internal nodes in the DFS order.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Hop_ManDfs_rec( Hop_Obj_t * pObj, Vec_Ptr_t * vNodes )
{
assert( !Hop_IsComplement(pObj) );
if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
return;
Hop_ManDfs_rec( Hop_ObjFanin0(pObj), vNodes );
Hop_ManDfs_rec( Hop_ObjFanin1(pObj), vNodes );
assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
Hop_ObjSetMarkA(pObj);
Vec_PtrPush( vNodes, pObj );
}
示例13: Ver_FormulaParserTopOper
/**Function*************************************************************
Synopsis [Performs the operation on the top entries in the stack.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Obj_t * Ver_FormulaParserTopOper( Hop_Man_t * pMan, Vec_Ptr_t * vStackFn, int Oper )
{
Hop_Obj_t * bArg0, * bArg1, * bArg2, * bFunc;
// perform the given operation
bArg2 = (Hop_Obj_t *)Vec_PtrPop( vStackFn );
bArg1 = (Hop_Obj_t *)Vec_PtrPop( vStackFn );
if ( Oper == VER_PARSE_OPER_AND )
bFunc = Hop_And( pMan, bArg1, bArg2 );
else if ( Oper == VER_PARSE_OPER_XOR )
bFunc = Hop_Exor( pMan, bArg1, bArg2 );
else if ( Oper == VER_PARSE_OPER_OR )
bFunc = Hop_Or( pMan, bArg1, bArg2 );
else if ( Oper == VER_PARSE_OPER_EQU )
bFunc = Hop_Not( Hop_Exor( pMan, bArg1, bArg2 ) );
else if ( Oper == VER_PARSE_OPER_MUX )
{
bArg0 = (Hop_Obj_t *)Vec_PtrPop( vStackFn );
// bFunc = Cudd_bddIte( dd, bArg0, bArg1, bArg2 ); Cudd_Ref( bFunc );
bFunc = Hop_Mux( pMan, bArg0, bArg1, bArg2 );
// Cudd_RecursiveDeref( dd, bArg0 );
// Cudd_Deref( bFunc );
}
else
return NULL;
// Cudd_Ref( bFunc );
// Cudd_RecursiveDeref( dd, bArg1 );
// Cudd_RecursiveDeref( dd, bArg2 );
Vec_PtrPush( vStackFn, bFunc );
return bFunc;
}
示例14: Abc_NtkCollectSupergate_rec
/**Function*************************************************************
Synopsis [Returns the array of nodes to be combined into one multi-input AND-gate.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkCollectSupergate_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vSuper, int fFirst, int fStopAtMux )
{
int RetValue1, RetValue2, i;
// check if the node is visited
if ( Abc_ObjRegular(pNode)->fMarkB )
{
// check if the node occurs in the same polarity
for ( i = 0; i < vSuper->nSize; i++ )
if ( vSuper->pArray[i] == pNode )
return 1;
// check if the node is present in the opposite polarity
for ( i = 0; i < vSuper->nSize; i++ )
if ( vSuper->pArray[i] == Abc_ObjNot(pNode) )
return -1;
assert( 0 );
return 0;
}
// if the new node is complemented or a PI, another gate begins
if ( !fFirst )
if ( Abc_ObjIsComplement(pNode) || !Abc_ObjIsNode(pNode) || Abc_ObjFanoutNum(pNode) > 1 || (fStopAtMux && Abc_NodeIsMuxType(pNode)) )
{
Vec_PtrPush( vSuper, pNode );
Abc_ObjRegular(pNode)->fMarkB = 1;
return 0;
}
assert( !Abc_ObjIsComplement(pNode) );
assert( Abc_ObjIsNode(pNode) );
// go through the branches
RetValue1 = Abc_NtkCollectSupergate_rec( Abc_ObjChild0(pNode), vSuper, 0, fStopAtMux );
RetValue2 = Abc_NtkCollectSupergate_rec( Abc_ObjChild1(pNode), vSuper, 0, fStopAtMux );
if ( RetValue1 == -1 || RetValue2 == -1 )
return -1;
// return 1 if at least one branch has a duplicate
return RetValue1 || RetValue2;
}
示例15: Nwk_ObjCollectFanins
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Collects fanins of the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Nwk_ObjCollectFanins( Nwk_Obj_t * pNode, Vec_Ptr_t * vNodes )
{
Nwk_Obj_t * pFanin;
int i;
Vec_PtrClear(vNodes);
Nwk_ObjForEachFanin( pNode, pFanin, i )
Vec_PtrPush( vNodes, pFanin );
}