本文整理汇总了C++中Vec_PtrAlloc函数的典型用法代码示例。如果您正苦于以下问题：C++ Vec_PtrAlloc函数的具体用法？C++ Vec_PtrAlloc怎么用？C++ Vec_PtrAlloc使用的例子？那么, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了Vec_PtrAlloc函数的15个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: Llb_ManDumpReached
/**Function*************************************************************
Synopsis [Writes reached state BDD into a BLIF file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Llb_ManDumpReached( DdManager * ddG, DdNode * bReached, char * pModel, char * pFileName )
{
FILE * pFile;
Vec_Ptr_t * vNamesIn, * vNamesOut;
char * pName;
int i, nDigits;
// reorder the BDD
Cudd_ReduceHeap( ddG, CUDD_REORDER_SYMM_SIFT, 1 );
// create input names
nDigits = Extra_Base10Log( Cudd_ReadSize(ddG) );
vNamesIn = Vec_PtrAlloc( Cudd_ReadSize(ddG) );
for ( i = 0; i < Cudd_ReadSize(ddG); i++ )
{
pName = Llb_ManGetDummyName( "ff", i, nDigits );
Vec_PtrPush( vNamesIn, Extra_UtilStrsav(pName) );
}
// create output names
vNamesOut = Vec_PtrAlloc( 1 );
Vec_PtrPush( vNamesOut, Extra_UtilStrsav("Reached") );
// write the file
pFile = fopen( pFileName, "wb" );
Cudd_DumpBlif( ddG, 1, &bReached, (char **)Vec_PtrArray(vNamesIn), (char **)Vec_PtrArray(vNamesOut), pModel, pFile, 0 );
fclose( pFile );
// cleanup
Vec_PtrForEachEntry( char *, vNamesIn, pName, i )
ABC_FREE( pName );
Vec_PtrForEachEntry( char *, vNamesOut, pName, i )
ABC_FREE( pName );
Vec_PtrFree( vNamesIn );
Vec_PtrFree( vNamesOut );
}示例2: Abc_FrameAllocate
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Frame_t * Abc_FrameAllocate()
{
Abc_Frame_t * p;
extern void define_cube_size( int n );
extern void set_espresso_flags();
// allocate and clean
p = ABC_CALLOC( Abc_Frame_t, 1 );
// get version
p->sVersion = Abc_UtilsGetVersion( p );
// set streams
p->Err = stderr;
p->Out = stdout;
p->Hst = NULL;
p->Status = -1;
p->nFrames = -1;
// set the starting step
p->nSteps = 1;
p->fBatchMode = 0;
// networks to be used by choice
p->vStore = Vec_PtrAlloc( 16 );
p->vAbcObjIds = Vec_IntAlloc( 0 );
// initialize decomposition manager
// define_cube_size(20);
// set_espresso_flags();
// initialize the trace manager
// Abc_HManStart();
p->vPlugInComBinPairs = Vec_PtrAlloc( 100 );
return p;
}示例3: Ivy_ManStart
/**Function*************************************************************
Synopsis [Starts the AIG manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ivy_Man_t * Ivy_ManStart()
{
Ivy_Man_t * p;
// start the manager
p = ALLOC( Ivy_Man_t, 1 );
memset( p, 0, sizeof(Ivy_Man_t) );
// perform initializations
p->Ghost.Id = -1;
p->nTravIds = 1;
p->fCatchExor = 1;
// allocate arrays for nodes
p->vPis = Vec_PtrAlloc( 100 );
p->vPos = Vec_PtrAlloc( 100 );
p->vBufs = Vec_PtrAlloc( 100 );
p->vObjs = Vec_PtrAlloc( 100 );
// prepare the internal memory manager
Ivy_ManStartMemory( p );
// create the constant node
p->pConst1 = Ivy_ManFetchMemory( p );
p->pConst1->fPhase = 1;
Vec_PtrPush( p->vObjs, p->pConst1 );
p->nCreated = 1;
// start the table
p->nTableSize = 10007;
p->pTable = ALLOC( int, p->nTableSize );
memset( p->pTable, 0, sizeof(int) * p->nTableSize );
return p;
}示例4: Aig_ManStart
/**Function*************************************************************
Synopsis [Starts the AIG manager.]
Description [The argument of this procedure is a soft limit on the
the number of nodes, or 0 if the limit is unknown.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Aig_ManStart( int nNodesMax )
{
Aig_Man_t * p;
if ( nNodesMax <= 0 )
nNodesMax = 10007;
// start the manager
p = ALLOC( Aig_Man_t, 1 );
memset( p, 0, sizeof(Aig_Man_t) );
// perform initializations
p->nTravIds = 1;
p->fCatchExor = 0;
// allocate arrays for nodes
p->vPis = Vec_PtrAlloc( 100 );
p->vPos = Vec_PtrAlloc( 100 );
p->vObjs = Vec_PtrAlloc( 1000 );
p->vBufs = Vec_PtrAlloc( 100 );
// prepare the internal memory manager
p->pMemObjs = Aig_MmFixedStart( sizeof(Aig_Obj_t), nNodesMax );
// create the constant node
p->pConst1 = Aig_ManFetchMemory( p );
p->pConst1->Type = AIG_OBJ_CONST1;
p->pConst1->fPhase = 1;
p->nObjs[AIG_OBJ_CONST1]++;
// start the table
p->nTableSize = Aig_PrimeCudd( nNodesMax );
p->pTable = ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
return p;
}示例5: Hop_ManStart
/**Function*************************************************************
Synopsis [Starts the AIG manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Hop_Man_t * Hop_ManStart()
{
Hop_Man_t * p;
// start the manager
p = ALLOC( Hop_Man_t, 1 );
memset( p, 0, sizeof(Hop_Man_t) );
// perform initializations
p->nTravIds = 1;
p->fRefCount = 1;
p->fCatchExor = 0;
// allocate arrays for nodes
p->vPis = Vec_PtrAlloc( 100 );
p->vPos = Vec_PtrAlloc( 100 );
// prepare the internal memory manager
Hop_ManStartMemory( p );
// create the constant node
p->pConst1 = Hop_ManFetchMemory( p );
p->pConst1->Type = AIG_CONST1;
p->pConst1->fPhase = 1;
p->nCreated = 1;
// start the table
// p->nTableSize = 107;
p->nTableSize = 10007;
p->pTable = ALLOC( Hop_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Hop_Obj_t *) * p->nTableSize );
return p;
}示例6: Part_ManStart
/**Function*************************************************************
Synopsis [Start the memory manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Part_Man_t * Part_ManStart( int nChunkSize, int nStepSize )
{
Part_Man_t * p;
p = ALLOC( Part_Man_t, 1 );
memset( p, 0, sizeof(Part_Man_t) );
p->nChunkSize = nChunkSize;
p->nStepSize = nStepSize;
p->vMemory = Vec_PtrAlloc( 1000 );
p->vFree = Vec_PtrAlloc( 1000 );
return p;
}示例7: Abc_NtkMiterSatCreateInt
/**Function*************************************************************
Synopsis [Sets up the SAT sat_solver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode, * pFanin, * pNodeC, * pNodeT, * pNodeE;
Vec_Ptr_t * vNodes, * vSuper;
Vec_Int_t * vVars;
int i, k, fUseMuxes = 1;
// int fOrderCiVarsFirst = 0;
int RetValue = 0;
assert( Abc_NtkIsStrash(pNtk) );
// clean the CI node pointers
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->pCopy = NULL;
// start the data structures
vNodes = Vec_PtrAlloc( 1000 ); // the nodes corresponding to vars in the sat_solver
vSuper = Vec_PtrAlloc( 100 ); // the nodes belonging to the given implication supergate
vVars = Vec_IntAlloc( 100 ); // the temporary array for variables in the clause
// add the clause for the constant node
pNode = Abc_AigConst1(pNtk);
pNode->fMarkA = 1;
pNode->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)vNodes->nSize;
Vec_PtrPush( vNodes, pNode );
Abc_NtkClauseTriv( pSat, pNode, vVars );
/*
// add the PI variables first
Abc_NtkForEachCi( pNtk, pNode, i )
{
pNode->fMarkA = 1;
pNode->pCopy = (Abc_Obj_t *)vNodes->nSize;
Vec_PtrPush( vNodes, pNode );
}
*/
// collect the nodes that need clauses and top-level assignments
Vec_PtrClear( vSuper );
Abc_NtkForEachCo( pNtk, pNode, i )
{
// get the fanin
pFanin = Abc_ObjFanin0(pNode);
// create the node's variable
if ( pFanin->fMarkA == 0 )
{
pFanin->fMarkA = 1;
pFanin->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)vNodes->nSize;
Vec_PtrPush( vNodes, pFanin );
}
// add the trivial clause
Vec_PtrPush( vSuper, Abc_ObjChild0(pNode) );
}示例8: Rwr_ManStart
/**Function*************************************************************
Synopsis [Starts rewriting manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Rwr_Man_t * Rwr_ManStart( bool fPrecompute )
{
Dec_Man_t * pManDec;
Rwr_Man_t * p;
int clk = clock();
clk = clock();
p = ALLOC( Rwr_Man_t, 1 );
memset( p, 0, sizeof(Rwr_Man_t) );
p->nFuncs = (1<<16);
pManDec = Abc_FrameReadManDec();
p->puCanons = pManDec->puCanons;
p->pPhases = pManDec->pPhases;
p->pPerms = pManDec->pPerms;
p->pMap = pManDec->pMap;
// initialize practical NPN classes
p->pPractical = Rwr_ManGetPractical( p );
// create the table
p->pTable = ALLOC( Rwr_Node_t *, p->nFuncs );
memset( p->pTable, 0, sizeof(Rwr_Node_t *) * p->nFuncs );
// create the elementary nodes
p->pMmNode = Extra_MmFixedStart( sizeof(Rwr_Node_t) );
p->vForest = Vec_PtrAlloc( 100 );
Rwr_ManAddVar( p, 0x0000, fPrecompute ); // constant 0
Rwr_ManAddVar( p, 0xAAAA, fPrecompute ); // var A
Rwr_ManAddVar( p, 0xCCCC, fPrecompute ); // var B
Rwr_ManAddVar( p, 0xF0F0, fPrecompute ); // var C
Rwr_ManAddVar( p, 0xFF00, fPrecompute ); // var D
p->nClasses = 5;
// other stuff
p->nTravIds = 1;
p->pPerms4 = Extra_Permutations( 4 );
p->vLevNums = Vec_IntAlloc( 50 );
p->vFanins = Vec_PtrAlloc( 50 );
p->vFaninsCur = Vec_PtrAlloc( 50 );
p->vNodesTemp = Vec_PtrAlloc( 50 );
if ( fPrecompute )
{ // precompute subgraphs
Rwr_ManPrecompute( p );
// Rwr_ManPrint( p );
Rwr_ManWriteToArray( p );
}
else
{ // load saved subgraphs
Rwr_ManLoadFromArray( p, 0 );
// Rwr_ManPrint( p );
Rwr_ManPreprocess( p );
}
p->timeStart = clock() - clk;
return p;
}示例9: Dch_ClassesStart
/**Function*************************************************************
Synopsis [Starts representation of equivalence classes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Dch_Cla_t * Dch_ClassesStart( Aig_Man_t * pAig )
{
Dch_Cla_t * p;
p = ABC_ALLOC( Dch_Cla_t, 1 );
memset( p, 0, sizeof(Dch_Cla_t) );
p->pAig = pAig;
p->pId2Class = ABC_CALLOC( Aig_Obj_t **, Aig_ManObjNumMax(pAig) );
p->pClassSizes = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
p->vClassOld = Vec_PtrAlloc( 100 );
p->vClassNew = Vec_PtrAlloc( 100 );
assert( pAig->pReprs == NULL );
Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
return p;
}示例10: If_ManImproveExpand
/**Function*************************************************************
Synopsis [Performs area recovery for each node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void If_ManImproveExpand( If_Man_t * p, int nLimit )
{
Vec_Ptr_t * vFront, * vFrontOld, * vVisited;
If_Obj_t * pObj;
int i;
vFront = Vec_PtrAlloc( nLimit );
vFrontOld = Vec_PtrAlloc( nLimit );
vVisited = Vec_PtrAlloc( 100 );
// iterate through all nodes in the topological order
If_ManForEachNode( p, pObj, i )
If_ManImproveNodeExpand( p, pObj, nLimit, vFront, vFrontOld, vVisited );
Vec_PtrFree( vFront );
Vec_PtrFree( vFrontOld );
Vec_PtrFree( vVisited );
}示例11: Abc_MfsWinMarkTfi
/**Function*************************************************************
Synopsis [Marks and collects the TFI cone of the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Abc_MfsWinMarkTfi( Abc_Obj_t * pNode )
{
Vec_Ptr_t * vCone;
vCone = Vec_PtrAlloc( 100 );
Abc_MfsWinMarkTfi_rec( pNode, vCone );
return vCone;
}示例12: Bus_ManStart
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Bus_Man_t * Bus_ManStart( Abc_Ntk_t * pNtk, SC_Lib * pLib, SC_BusPars * pPars )
{
Bus_Man_t * p;
p = ABC_CALLOC( Bus_Man_t, 1 );
p->pPars = pPars;
p->pNtk = pNtk;
p->pLib = pLib;
p->pInv = Abc_SclFindInvertor(pLib, pPars->fAddBufs)->pRepr->pPrev;//->pAve;
if ( pPars->fUseWireLoads )
{
if ( pNtk->pWLoadUsed == NULL )
{
p->pWLoadUsed = Abc_SclFindWireLoadModel( pLib, Abc_SclGetTotalArea(pNtk) );
pNtk->pWLoadUsed = Abc_UtilStrsav( p->pWLoadUsed->pName );
}
else
p->pWLoadUsed = Abc_SclFetchWireLoadModel( pLib, pNtk->pWLoadUsed );
}
if ( p->pWLoadUsed )
p->vWireCaps = Abc_SclFindWireCaps( p->pWLoadUsed );
p->vFanouts = Vec_PtrAlloc( 100 );
p->vCins = Vec_FltAlloc( 2*Abc_NtkObjNumMax(pNtk) + 1000 );
p->vETimes = Vec_FltAlloc( 2*Abc_NtkObjNumMax(pNtk) + 1000 );
p->vLoads = Vec_FltAlloc( 2*Abc_NtkObjNumMax(pNtk) + 1000 );
p->vDepts = Vec_FltAlloc( 2*Abc_NtkObjNumMax(pNtk) + 1000 );
Vec_FltFill( p->vCins, Abc_NtkObjNumMax(pNtk), 0 );
Vec_FltFill( p->vETimes, Abc_NtkObjNumMax(pNtk), 0 );
Vec_FltFill( p->vLoads, Abc_NtkObjNumMax(pNtk), 0 );
Vec_FltFill( p->vDepts, Abc_NtkObjNumMax(pNtk), 0 );
pNtk->pBSMan = p;
return p;
}示例13: Aig_ManFindImplications
/**Function*************************************************************
Synopsis [Returns the nodes whose values are implied by pNode.]
Description [Attention! Both pNode and results can be complemented!
Also important: Currently, this procedure only does backward propagation.
In general, it may find more implications if forward propagation is enabled.]
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Aig_ManFindImplications( Aig_Man_t * p, Aig_Obj_t * pNode )
{
Vec_Ptr_t * vImplics;
vImplics = Vec_PtrAlloc( 100 );
Aig_ManFindImplications_rec( pNode, vImplics );
return vImplics;
}示例14: Io_ReadBlifNetworkSubcircuit
/**Function*************************************************************
Synopsis [Creates a multi-input multi-output box in the hierarchical design.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifNetworkSubcircuit( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
{
Abc_Obj_t * pBox;
Vec_Ptr_t * vNames;
char * pName;
int i;
// create a new node and add it to the network
if ( vTokens->nSize < 3 )
{
p->LineCur = Extra_FileReaderGetLineNumber(p->pReader, 0);
sprintf( p->sError, "The .subcircuit line has less than three tokens." );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// store the names of formal/actual inputs/outputs of the box
vNames = Vec_PtrAlloc( 10 );
Vec_PtrForEachEntryStart( char *, vTokens, pName, i, 1 )
// Vec_PtrPush( vNames, Abc_NtkRegisterName(p->pNtkCur, pName) );
Vec_PtrPush( vNames, Extra_UtilStrsav(pName) ); // memory leak!!!
// create a new box and add it to the network
pBox = Abc_NtkCreateBlackbox( p->pNtkCur );
// set the pointer to the node names
Abc_ObjSetData( pBox, vNames );
// remember the line of the file
pBox->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)Extra_FileReaderGetLineNumber(p->pReader, 0);
return 0;
}示例15: Dar_BalanceBuildSuperTop
/**Function*************************************************************
Synopsis [Builds implication supergate.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Obj_t * Dar_BalanceBuildSuperTop( Aig_Man_t * p, Vec_Ptr_t * vSuper, Aig_Type_t Type, int fUpdateLevel, int nLutSize )
{
Vec_Ptr_t * vSubset;
Aig_Obj_t * pObj;
int i, nBaseSizeAll, nBaseSize;
assert( vSuper->nSize > 1 );
// sort the new nodes by level in the decreasing order
Vec_PtrSort( vSuper, (int (*)(void))Aig_NodeCompareLevelsDecrease );
// add one LUT at a time
while ( Vec_PtrSize(vSuper) > 1 )
{
// isolate the group of nodes with nLutSize inputs
nBaseSizeAll = 0;
vSubset = Vec_PtrAlloc( nLutSize );
Vec_PtrForEachEntryReverse( Aig_Obj_t *, vSuper, pObj, i )
{
nBaseSize = Aig_BaseSize( p, pObj, nLutSize );
if ( nBaseSizeAll + nBaseSize > nLutSize && Vec_PtrSize(vSubset) > 1 )
break;
nBaseSizeAll += nBaseSize;
Vec_PtrPush( vSubset, pObj );
}
// remove them from vSuper
Vec_PtrShrink( vSuper, Vec_PtrSize(vSuper) - Vec_PtrSize(vSubset) );
// create the new supergate
pObj = Dar_BalanceBuildSuper( p, vSubset, Type, fUpdateLevel );
Vec_PtrFree( vSubset );
// add the new output
Dar_BalancePushUniqueOrderByLevel( vSuper, pObj, Type == AIG_OBJ_EXOR );
}