C++ VMSTATE_UINT32函数代码示例

    replay_fetch_data_kind();

    return 0;
}

static const VMStateDescription vmstate_replay = {
    .name = "replay",
    .version_id = 1,
    .minimum_version_id = 1,
    .pre_save = replay_pre_save,
    .post_load = replay_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_INT64_ARRAY(cached_clock, ReplayState, REPLAY_CLOCK_COUNT),
        VMSTATE_UINT64(current_step, ReplayState),
        VMSTATE_INT32(instructions_count, ReplayState),
        VMSTATE_UINT32(data_kind, ReplayState),
        VMSTATE_UINT32(has_unread_data, ReplayState),
        VMSTATE_UINT64(file_offset, ReplayState),
        VMSTATE_UINT64(block_request_id, ReplayState),
        VMSTATE_END_OF_LIST()
    },
};

void replay_vmstate_register(void)
{
    vmstate_register(NULL, 0, &vmstate_replay, &replay_state);
}

void replay_vmstate_init(void)
{
    if (replay_snapshot) {

    s->mfa_secsel_ctrl = 0;
    s->mfa_tersel_ctrl = 0;
    s->mfa_quatsel_ctrl = 0;
    s->mfa_debugsel_ctrl = 0;
    s->mfa_altsel_ctrl = 0;
    s->mfa_pullup_ctrl = 0;
}

static const VMStateDescription vmstate_ox820_sysctrl_mfa = {
    .name = "ox820-sysctrl-mfa",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_UINT32(mfa_secsel_ctrl, ox820_sysctrl_mfa_state),
        VMSTATE_UINT32(mfa_tersel_ctrl, ox820_sysctrl_mfa_state),
        VMSTATE_UINT32(mfa_quatsel_ctrl, ox820_sysctrl_mfa_state),
        VMSTATE_UINT32(mfa_debugsel_ctrl, ox820_sysctrl_mfa_state),
        VMSTATE_UINT32(mfa_altsel_ctrl, ox820_sysctrl_mfa_state),
        VMSTATE_UINT32(mfa_pullup_ctrl, ox820_sysctrl_mfa_state),
        VMSTATE_END_OF_LIST()
    }
};

static int ox820_sysctrl_mfa_init(SysBusDevice *dev)
{
    ox820_sysctrl_mfa_state *s = FROM_SYSBUS(ox820_sysctrl_mfa_state, dev);

    memory_region_init_io(&s->iomem0, &ox820_sysctrl_mfa0_ops, s, "ox820-sysctrl-mfa", 0x4);
    memory_region_init_io(&s->iomem1, &ox820_sysctrl_mfa1_ops, s, "ox820-sysctrl-mfa", 0x4);

        tb->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, timerblock_tick, tb);
        sysbus_init_irq(dev, &tb->irq);
        memory_region_init_io(&tb->iomem, OBJECT(s), &timerblock_ops, tb,
                              "arm_mptimer_timerblock", 0x20);
        sysbus_init_mmio(dev, &tb->iomem);
    }

    return 0;
}

static const VMStateDescription vmstate_timerblock = {
    .name = "arm_mptimer_timerblock",
    .version_id = 2,
    .minimum_version_id = 2,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(count, TimerBlock),
        VMSTATE_UINT32(load, TimerBlock),
        VMSTATE_UINT32(control, TimerBlock),
        VMSTATE_UINT32(status, TimerBlock),
        VMSTATE_INT64(tick, TimerBlock),
        VMSTATE_TIMER(timer, TimerBlock),
        VMSTATE_END_OF_LIST()
    }
};

static const VMStateDescription vmstate_arm_mptimer = {
    .name = "arm_mptimer",
    .version_id = 2,
    .minimum_version_id = 2,
    .fields = (VMStateField[]) {
        VMSTATE_STRUCT_VARRAY_UINT32(timerblock, ARMMPTimerState, num_cpu,

    .name = "fpscr",
    .get = get_fpscr,
    .put = put_fpscr,
};

static const VMStateDescription vmstate_vfp = {
    .name = "cpu/vfp",
    .version_id = 3,
    .minimum_version_id = 3,
    .fields = (VMStateField[]) {
        VMSTATE_FLOAT64_ARRAY(env.vfp.regs, ARMCPU, 64),
        /* The xregs array is a little awkward because element 1 (FPSCR)
         * requires a specific accessor, so we have to split it up in
         * the vmstate:
         */
        VMSTATE_UINT32(env.vfp.xregs[0], ARMCPU),
        VMSTATE_UINT32_SUB_ARRAY(env.vfp.xregs, ARMCPU, 2, 14),
        {
            .name = "fpscr",
            .version_id = 0,
            .size = sizeof(uint32_t),
            .info = &vmstate_fpscr,
            .flags = VMS_SINGLE,
            .offset = 0,
        },
        VMSTATE_END_OF_LIST()
    }
};

static bool iwmmxt_needed(void *opaque)
{

static bool altivec_needed(void *opaque)
{
    PowerPCCPU *cpu = opaque;

    return (cpu->env.insns_flags & PPC_ALTIVEC);
}

static const VMStateDescription vmstate_altivec = {
    .name = "cpu/altivec",
    .version_id = 1,
    .minimum_version_id = 1,
    .needed = altivec_needed,
    .fields = (VMStateField[]) {
        VMSTATE_AVR_ARRAY(env.avr, PowerPCCPU, 32),
        VMSTATE_UINT32(env.vscr, PowerPCCPU),
        VMSTATE_END_OF_LIST()
    },
};

static bool vsx_needed(void *opaque)
{
    PowerPCCPU *cpu = opaque;

    return (cpu->env.insns_flags2 & PPC2_VSX);
}

static const VMStateDescription vmstate_vsx = {
    .name = "cpu/vsx",
    .version_id = 1,
    .minimum_version_id = 1,

};

const VMStateDescription vmstate_ich9_pm = {
    .name = "ich9_pm",
    .version_id = 1,
    .minimum_version_id = 1,
    .post_load = ich9_pm_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
        VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
        VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
        VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
        VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
        VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
        VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
        VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
        VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
        VMSTATE_END_OF_LIST()
    },
    .subsections = (VMStateSubsection[]) {
        {
            .vmsd = &vmstate_memhp_state,
            .needed = vmstate_test_use_memhp,
        },
        VMSTATE_END_OF_LIST()
    }
};

static void pm_reset(void *opaque)
{
    ICH9LPCPMRegs *pm = opaque;

    uint32_t cmd_a;
    uint32_t cmd_b;
    int32_t buffer_size;
    int32_t offset;
    int32_t pad;
    int32_t fifo_used;
    int32_t len;
    uint8_t data[2048];
} LAN9118Packet;

static const VMStateDescription vmstate_lan9118_packet = {
    .name = "lan9118_packet",
    .version_id = 1,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(state, LAN9118Packet),
        VMSTATE_UINT32(cmd_a, LAN9118Packet),
        VMSTATE_UINT32(cmd_b, LAN9118Packet),
        VMSTATE_INT32(buffer_size, LAN9118Packet),
        VMSTATE_INT32(offset, LAN9118Packet),
        VMSTATE_INT32(pad, LAN9118Packet),
        VMSTATE_INT32(fifo_used, LAN9118Packet),
        VMSTATE_INT32(len, LAN9118Packet),
        VMSTATE_UINT8_ARRAY(data, LAN9118Packet, 2048),
        VMSTATE_END_OF_LIST()
    }
};

typedef struct {
    SysBusDevice busdev;
    NICState *nic;

        error_setg(errp, "can't use already busy memdev: %s", path);
        g_free(path);
    } else {
        qdev_prop_allow_set_link_before_realize(obj, name, val, errp);
    }
}

static const VMStateDescription ivshmem_plain_vmsd = {
    .name = TYPE_IVSHMEM_PLAIN,
    .version_id = 0,
    .minimum_version_id = 0,
    .pre_load = ivshmem_pre_load,
    .post_load = ivshmem_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
        VMSTATE_UINT32(intrstatus, IVShmemState),
        VMSTATE_UINT32(intrmask, IVShmemState),
        VMSTATE_END_OF_LIST()
    },
};

static Property ivshmem_plain_properties[] = {
    DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
    DEFINE_PROP_END_OF_LIST(),
};

static void ivshmem_plain_init(Object *obj)
{
    IVShmemState *s = IVSHMEM_PLAIN(obj);

    object_property_add_link(obj, "memdev", TYPE_MEMORY_BACKEND,

    uint32_t pmcr1;

    /* Frequencies precalculated on register changes */
    uint32_t pll_refclk_freq;
    uint32_t mcu_clk_freq;
    uint32_t hsp_clk_freq;
    uint32_t ipg_clk_freq;
} IMXCCMState;

static const VMStateDescription vmstate_imx_ccm = {
    .name = "imx-ccm",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(ccmr, IMXCCMState),
        VMSTATE_UINT32(pdr0, IMXCCMState),
        VMSTATE_UINT32(pdr1, IMXCCMState),
        VMSTATE_UINT32(mpctl, IMXCCMState),
        VMSTATE_UINT32(spctl, IMXCCMState),
        VMSTATE_UINT32_ARRAY(cgr, IMXCCMState, 3),
        VMSTATE_UINT32(pmcr0, IMXCCMState),
        VMSTATE_UINT32(pmcr1, IMXCCMState),
        VMSTATE_UINT32(pll_refclk_freq, IMXCCMState),
    },
    .post_load = imx_ccm_post_load,
};

/* CCMR */
#define CCMR_FPME (1<<0)
#define CCMR_MPE  (1<<3)

    uint32_t sys_cfgstat;
    uint32_t sys_clcd;
    uint32_t mb_clock[6];
    uint32_t *db_clock;
    uint32_t db_num_vsensors;
    uint32_t *db_voltage;
    uint32_t db_num_clocks;
    uint32_t *db_clock_reset;
} arm_sysctl_state;

static const VMStateDescription vmstate_arm_sysctl = {
    .name = "realview_sysctl",
    .version_id = 4,
    .minimum_version_id = 1,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(leds, arm_sysctl_state),
        VMSTATE_UINT16(lockval, arm_sysctl_state),
        VMSTATE_UINT32(cfgdata1, arm_sysctl_state),
        VMSTATE_UINT32(cfgdata2, arm_sysctl_state),
        VMSTATE_UINT32(flags, arm_sysctl_state),
        VMSTATE_UINT32(nvflags, arm_sysctl_state),
        VMSTATE_UINT32(resetlevel, arm_sysctl_state),
        VMSTATE_UINT32_V(sys_mci, arm_sysctl_state, 2),
        VMSTATE_UINT32_V(sys_cfgdata, arm_sysctl_state, 2),
        VMSTATE_UINT32_V(sys_cfgctrl, arm_sysctl_state, 2),
        VMSTATE_UINT32_V(sys_cfgstat, arm_sysctl_state, 2),
        VMSTATE_UINT32_V(sys_clcd, arm_sysctl_state, 3),
        VMSTATE_UINT32_ARRAY_V(mb_clock, arm_sysctl_state, 6, 4),
        VMSTATE_VARRAY_UINT32(db_clock, arm_sysctl_state, db_num_clocks,
                              4, vmstate_info_uint32, uint32_t),
        VMSTATE_END_OF_LIST()

    DEFINE_PROP_UINT8("spansion-cr2nv", Flash, spansion_cr2nv, 0x8),
    DEFINE_PROP_UINT8("spansion-cr3nv", Flash, spansion_cr3nv, 0x2),
    DEFINE_PROP_UINT8("spansion-cr4nv", Flash, spansion_cr4nv, 0x10),
    DEFINE_PROP_DRIVE("drive", Flash, blk),
    DEFINE_PROP_END_OF_LIST(),
};

static const VMStateDescription vmstate_m25p80 = {
    .name = "m25p80",
    .version_id = 0,
    .minimum_version_id = 0,
    .pre_save = m25p80_pre_save,
    .fields = (VMStateField[]) {
        VMSTATE_UINT8(state, Flash),
        VMSTATE_UINT8_ARRAY(data, Flash, 16),
        VMSTATE_UINT32(len, Flash),
        VMSTATE_UINT32(pos, Flash),
        VMSTATE_UINT8(needed_bytes, Flash),
        VMSTATE_UINT8(cmd_in_progress, Flash),
        VMSTATE_UINT32(cur_addr, Flash),
        VMSTATE_BOOL(write_enable, Flash),
        VMSTATE_BOOL(reset_enable, Flash),
        VMSTATE_UINT8(ear, Flash),
        VMSTATE_BOOL(four_bytes_address_mode, Flash),
        VMSTATE_UINT32(nonvolatile_cfg, Flash),
        VMSTATE_UINT32(volatile_cfg, Flash),
        VMSTATE_UINT32(enh_volatile_cfg, Flash),
        VMSTATE_BOOL(quad_enable, Flash),
        VMSTATE_UINT8(spansion_cr1nv, Flash),
        VMSTATE_UINT8(spansion_cr2nv, Flash),
        VMSTATE_UINT8(spansion_cr3nv, Flash),

    s->chr = qemu_char_get_next_serial();
    if (s->chr) {
        qemu_chr_add_handlers(s->chr, juart_can_rx, juart_rx, juart_event, s);
    }

    return 0;
}

static const VMStateDescription vmstate_lm32_juart = {
    .name = "lm32-juart",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_UINT32(jtx, LM32JuartState),
        VMSTATE_UINT32(jrx, LM32JuartState),
        VMSTATE_END_OF_LIST()
    }
};

static void lm32_juart_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);

    k->init = lm32_juart_init;
    dc->reset = juart_reset;
    dc->vmsd = &vmstate_lm32_juart;
}

        scon->write_errors += errors;
    }
    data->header.flags = SCLP_EVENT_BUFFER_ACCEPTED;

    return SCLP_RC_NORMAL_COMPLETION;
}

/* functions for live migration */

static const VMStateDescription vmstate_sclplmconsole = {
    .name = "sclplmconsole",
    .version_id = 0,
    .minimum_version_id = 0,
    .fields = (VMStateField[]) {
        VMSTATE_BOOL(event.event_pending, SCLPConsoleLM),
        VMSTATE_UINT32(write_errors, SCLPConsoleLM),
        VMSTATE_UINT32(length, SCLPConsoleLM),
        VMSTATE_UINT8_ARRAY(buf, SCLPConsoleLM, SIZE_CONSOLE_BUFFER),
        VMSTATE_END_OF_LIST()
     }
};

/* qemu object creation and initialization functions */

/* tell character layer our call-back functions */

static int console_init(SCLPEvent *event)
{
    static bool console_available;

    SCLPConsoleLM *scon = SCLPLM_CONSOLE(event);

    timer_regs = cpu_register_io_memory(timer_read_fn, timer_write_fn, s,
                                        DEVICE_NATIVE_ENDIAN);
    sysbus_init_mmio(dev, R_MAX * 4, timer_regs);

    return 0;
}

static const VMStateDescription vmstate_lm32_timer = {
    .name = "lm32-timer",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_PTIMER(ptimer, LM32TimerState),
        VMSTATE_UINT32(freq_hz, LM32TimerState),
        VMSTATE_UINT32_ARRAY(regs, LM32TimerState, R_MAX),
        VMSTATE_END_OF_LIST()
    }
};

static SysBusDeviceInfo lm32_timer_info = {
    .init = lm32_timer_init,
    .qdev.name  = "lm32-timer",
    .qdev.size  = sizeof(LM32TimerState),
    .qdev.vmsd  = &vmstate_lm32_timer,
    .qdev.reset = timer_reset,
    .qdev.props = (Property[]) {
        DEFINE_PROP_UINT32(
            "frequency", LM32TimerState, freq_hz, DEFAULT_FREQUENCY
        ),

#include "cpu.h"
#include "exec/exec-all.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "qemu/timer.h"

#include "migration/cpu.h"

#ifdef TARGET_SPARC64
static const VMStateDescription vmstate_cpu_timer = {
    .name = "cpu_timer",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32(frequency, CPUTimer),
        VMSTATE_UINT32(disabled, CPUTimer),
        VMSTATE_UINT64(disabled_mask, CPUTimer),
        VMSTATE_UINT32(npt, CPUTimer),
        VMSTATE_UINT64(npt_mask, CPUTimer),
        VMSTATE_INT64(clock_offset, CPUTimer),
        VMSTATE_TIMER_PTR(qtimer, CPUTimer),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_CPU_TIMER(_f, _s)                             \
    VMSTATE_STRUCT_POINTER(_f, _s, vmstate_cpu_timer, CPUTimer)

static const VMStateDescription vmstate_trap_state = {
    .name = "trap_state",