本文整理汇总了C++中VCDRES_MSG_LOW函数的典型用法代码示例。如果您正苦于以下问题:C++ VCDRES_MSG_LOW函数的具体用法?C++ VCDRES_MSG_LOW怎么用?C++ VCDRES_MSG_LOW使用的例子?那么, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了VCDRES_MSG_LOW函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: res_trk_power_down
u32 res_trk_power_down(void)
{
VCDRES_MSG_LOW("clk_regime_rail_disable");
res_trk_pmem_unmap(&resource_context.firmware_addr);
#ifdef CONFIG_MSM_BUS_SCALING
msm_bus_scale_client_update_request(resource_context.pcl, 0);
msm_bus_scale_unregister_client(resource_context.pcl);
#endif
VCDRES_MSG_MED("res_trk_power_down():: Calling "
"res_trk_shutdown_vidc()\n");
return res_trk_shutdown_vidc();
}
示例2: res_trk_disable_clocks
u32 res_trk_disable_clocks(void)
{
VCDRES_MSG_LOW("in res_trk_disable_clocks()\n");
mutex_lock(&resource_context.lock);
if (clock_enabled == 1) {
mutex_unlock(&resource_context.lock);
return true;
}
if (!resource_context.clock_enabled) {
mutex_unlock(&resource_context.lock);
return false;
}
VCDRES_MSG_LOW("Disabling IRQ in %s()\n", __func__);
disable_irq_nosync(resource_context.irq_num);
VCDRES_MSG_LOW("%s(): Disabling the clocks ...\n", __func__);
resource_context.clock_enabled = 0;
clk_disable(resource_context.vcodec_clk);
mutex_unlock(&resource_context.lock);
return true;
}
示例3: res_trk_set_perf_level
u32 res_trk_set_perf_level(u32 req_perf_lvl, u32 *pn_set_perf_lvl,
struct vcd_dev_ctxt *dev_ctxt)
{
u32 vidc_freq = 0;
if (!pn_set_perf_lvl || !dev_ctxt) {
VCDRES_MSG_ERROR("%s(): NULL pointer! dev_ctxt(%p)\n",
__func__, dev_ctxt);
return false;
}
VCDRES_MSG_LOW("%s(), req_perf_lvl = %d", __func__, req_perf_lvl);
#ifdef CONFIG_MSM_BUS_SCALING
if (!res_trk_update_bus_perf_level(dev_ctxt, req_perf_lvl) < 0) {
VCDRES_MSG_ERROR("%s(): update buf perf level failed\n",
__func__);
return false;
}
#endif
if (dev_ctxt->reqd_perf_lvl + dev_ctxt->curr_perf_lvl == 0)
req_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
if (req_perf_lvl <= RESTRK_1080P_VGA_PERF_LEVEL) {
vidc_freq = vidc_clk_table[0];
*pn_set_perf_lvl = RESTRK_1080P_VGA_PERF_LEVEL;
} else if (req_perf_lvl <= RESTRK_1080P_720P_PERF_LEVEL) {
vidc_freq = vidc_clk_table[1];
*pn_set_perf_lvl = RESTRK_1080P_720P_PERF_LEVEL;
} else {
vidc_freq = vidc_clk_table[2];
*pn_set_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
}
resource_context.perf_level = *pn_set_perf_lvl;
VCDRES_MSG_MED("VIDC: vidc_freq = %u, req_perf_lvl = %u\n",
vidc_freq, req_perf_lvl);
#ifdef USE_RES_TRACKER
if (req_perf_lvl != RESTRK_1080P_MIN_PERF_LEVEL) {
VCDRES_MSG_MED("%s(): Setting vidc freq to %u\n",
__func__, vidc_freq);
if (!res_trk_sel_clk_rate(vidc_freq)) {
VCDRES_MSG_ERROR("%s(): res_trk_sel_clk_rate FAILED\n",
__func__);
*pn_set_perf_lvl = 0;
return false;
}
}
#endif
VCDRES_MSG_MED("%s() set perl level : %d", __func__, *pn_set_perf_lvl);
return true;
}
示例4: res_trk_disable_clocks
u32 res_trk_disable_clocks(void)
{
VCDRES_MSG_LOW("clk_regime_msm_disable");
VCDRES_MSG_HIGH("in res_trk_disable_clocks()\n");
mutex_lock(&resource_context.lock);
if (!resource_context.clock_enabled) {
mutex_unlock(&resource_context.lock);
return FALSE;
}
VCDRES_MSG_LOW("Disabling IRQ in %s()\n", __func__);
disable_irq_nosync(resource_context.irq_num);
VCDRES_MSG_LOW("%s(): Disabling the clocks ...\n", __func__);
resource_context.clock_enabled = 0;
clk_disable(resource_context.hclk);
clk_disable(resource_context.hclk_div2);
clk_disable(resource_context.pclk);
mutex_unlock(&resource_context.lock);
return TRUE;
}
示例5: res_trk_power_down
u32 res_trk_power_down(void)
{
VCDRES_MSG_LOW("clk_regime_rail_disable");
#ifdef AXI_CLK_SCALING
VCDRES_MSG_MED("\n res_trk_power_down()::"
"Calling AXI remove requirement\n");
pm_qos_remove_requirement(PM_QOS_SYSTEM_BUS_FREQ,
MSM_AXI_QOS_NAME);
#endif
#ifdef USE_RES_TRACKER
VCDRES_MSG_MED("\n res_trk_power_down():: Calling "
"vid_c_disable_pwr_rail()\n");
return vid_c_disable_pwr_rail();
#endif
return TRUE;
}
示例6: res_trk_set_perf_level
u32 res_trk_set_perf_level(u32 req_perf_lvl, u32 *pn_set_perf_lvl,
struct vcd_clnt_ctxt *cctxt)
{
u32 vidc_freq = 0;
if (!pn_set_perf_lvl) {
VCDRES_MSG_ERROR("%s(): pn_perf_lvl is NULL\n",
__func__);
return false;
}
VCDRES_MSG_LOW("%s(), req_perf_lvl = %d", __func__, req_perf_lvl);
if (cctxt) {
if (req_perf_lvl <= RESTRK_1080P_VGA_PERF_LEVEL) {
vidc_freq = vidc_clk_table[0];
*pn_set_perf_lvl = RESTRK_1080P_VGA_PERF_LEVEL;
} else if (req_perf_lvl <= RESTRK_1080P_720P_PERF_LEVEL) {
vidc_freq = vidc_clk_table[1];
*pn_set_perf_lvl = RESTRK_1080P_720P_PERF_LEVEL;
} else {
vidc_freq = vidc_clk_table[2];
*pn_set_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
}
resource_context.perf_level = *pn_set_perf_lvl;
VCDRES_MSG_HIGH("\n VIDC: vidc_freq = %u, req_perf_lvl = %u",
vidc_freq, req_perf_lvl);
} else {
VCDRES_MSG_HIGH("%s() WARNING:: cctxt is NULL", __func__);
return true;
}
#ifdef USE_RES_TRACKER
if (req_perf_lvl != RESTRK_1080P_MIN_PERF_LEVEL) {
VCDRES_MSG_HIGH("\n %s(): Setting vidc freq to %u",
__func__, vidc_freq);
if (!res_trk_sel_clk_rate(vidc_freq)) {
VCDRES_MSG_ERROR("%s(): res_trk_sel_clk_rate FAILED\n",
__func__);
*pn_set_perf_lvl = 0;
return false;
}
}
#endif
VCDRES_MSG_HIGH("%s() set perl level : %d", __func__, *pn_set_perf_lvl);
return true;
}
示例7: res_trk_shutdown_vidc
static u32 res_trk_shutdown_vidc(void)
{
mutex_lock(&resource_context.lock);
if (resource_context.clock_enabled) {
mutex_unlock(&resource_context.lock);
VCDRES_MSG_LOW("\n Calling CLK disable in Power Down\n");
res_trk_disable_clocks();
mutex_lock(&resource_context.lock);
}
res_trk_put_clk();
if (resource_context.footswitch) {
if (regulator_disable(resource_context.footswitch))
VCDRES_MSG_ERROR("Regulator disable failed\n");
regulator_put(resource_context.footswitch);
resource_context.footswitch = NULL;
}
if (pm_runtime_put(resource_context.device) < 0)
VCDRES_MSG_ERROR("Error : pm_runtime_put failed");
mutex_unlock(&resource_context.lock);
return true;
}
示例8: res_trk_get_curr_perf_level
u32 res_trk_get_curr_perf_level(u32 *pn_perf_lvl)
{
unsigned long freq;
if (!pn_perf_lvl) {
VCDRES_MSG_ERROR("%s(): pn_perf_lvl is NULL\n",
__func__);
return false;
}
VCDRES_MSG_LOW("clk_regime_msm_get_clk_freq_hz");
if (!res_trk_get_clk_rate(&freq)) {
VCDRES_MSG_ERROR("%s(): res_trk_get_clk_rate FAILED\n",
__func__);
*pn_perf_lvl = 0;
return false;
}
*pn_perf_lvl = resource_context.perf_level;
VCDRES_MSG_MED("%s(): freq = %lu, *pn_perf_lvl = %u", __func__,
freq, *pn_perf_lvl);
return true;
}
示例9: res_trk_disable_pwr_rail
static u32 res_trk_disable_pwr_rail(void)
{
int rc = -1;
mutex_lock(&resource_context.lock);
if (resource_context.clock_enabled) {
mutex_unlock(&resource_context.lock);
VCDRES_MSG_LOW("\n Calling CLK disable in Power Down\n");
res_trk_disable_clocks();
mutex_lock(&resource_context.lock);
}
if (!resource_context.rail_enabled) {
mutex_unlock(&resource_context.lock);
return false;
}
resource_context.rail_enabled = 0;
rc = clk_reset(resource_context.pclk, CLK_RESET_ASSERT);
if (rc) {
VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
mutex_unlock(&resource_context.lock);
return false;
}
msleep(20);
rc = internal_pwr_rail_ctl(PWR_RAIL_MFC_CLK, 0);
if (rc) {
VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
mutex_unlock(&resource_context.lock);
return false;
}
clk_put(resource_context.hclk_div2);
clk_put(resource_context.hclk);
clk_put(resource_context.pclk);
mutex_unlock(&resource_context.lock);
return true;
}
示例10: res_trk_get_curr_perf_level
u32 res_trk_get_curr_perf_level(u32 *pn_perf_lvl)
{
unsigned long n_freq;
if (!pn_perf_lvl) {
VCDRES_MSG_ERROR("%s(): pn_perf_lvl is NULL\n",
__func__);
return FALSE;
}
VCDRES_MSG_LOW("clk_regime_msm_get_clk_freq_hz");
if (!vid_c_get_clk_rate(&n_freq)) {
VCDRES_MSG_ERROR("%s(): vid_c_get_clk_rate FAILED\n",
__func__);
*pn_perf_lvl = 0;
return FALSE;
}
*pn_perf_lvl = res_trk_convert_freq_to_perf_lvl((u64) n_freq);
VCDRES_MSG_MED("%s(): n_freq = %lu, *pn_perf_lvl = %u", __func__,
n_freq, *pn_perf_lvl);
return TRUE;
}
示例11: res_trk_disable_pwr_rail
static u32 res_trk_disable_pwr_rail(void)
{
mutex_lock(&resource_context.lock);
if (clock_enabled == 1) {
mutex_unlock(&resource_context.lock);
return true;
}
if (resource_context.clock_enabled) {
mutex_unlock(&resource_context.lock);
VCDRES_MSG_LOW("\n Calling CLK disable in Power Down\n");
res_trk_disable_clocks();
mutex_lock(&resource_context.lock);
}
clk_put(resource_context.vcodec_clk);
/*TODO: Power rail functions needs to added here*/
if (!resource_context.rail_enabled) {
mutex_unlock(&resource_context.lock);
return false;
}
resource_context.rail_enabled = 0;
mutex_unlock(&resource_context.lock);
return true;
}
示例12: res_trk_set_perf_level
u32 res_trk_set_perf_level(u32 req_perf_lvl, u32 *pn_set_perf_lvl,
struct vcd_dev_ctxt *dev_ctxt)
{
u32 vidc_freq = 0;
if (!pn_set_perf_lvl || !dev_ctxt) {
VCDRES_MSG_ERROR("%s(): NULL pointer! dev_ctxt(%p)\n",
__func__, dev_ctxt);
return false;
}
if (dev_ctxt->turbo_mode_set &&
(req_perf_lvl < RESTRK_1080P_TURBO_PERF_LEVEL)) {
VCDRES_MSG_MED("%s(): TURBO MODE!!\n", __func__);
return true;
}
VCDRES_MSG_LOW("%s(), req_perf_lvl = %d", __func__, req_perf_lvl);
if (resource_context.vidc_platform_data->disable_turbo
&& req_perf_lvl > RESTRK_1080P_MAX_PERF_LEVEL) {
VCDRES_MSG_ERROR("%s(): Turbo not supported! dev_ctxt(%p)\n",
__func__, dev_ctxt);
}
#ifdef CONFIG_MSM_BUS_SCALING
if (!res_trk_update_bus_perf_level(dev_ctxt, req_perf_lvl) < 0) {
VCDRES_MSG_ERROR("%s(): update buf perf level failed\n",
__func__);
return false;
}
#endif
if (dev_ctxt->reqd_perf_lvl + dev_ctxt->curr_perf_lvl == 0)
req_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
if (req_perf_lvl <= RESTRK_1080P_VGA_PERF_LEVEL) {
vidc_freq = vidc_clk_table[0];
*pn_set_perf_lvl = RESTRK_1080P_VGA_PERF_LEVEL;
} else if (req_perf_lvl <= RESTRK_1080P_720P_PERF_LEVEL) {
vidc_freq = vidc_clk_table[1];
*pn_set_perf_lvl = RESTRK_1080P_720P_PERF_LEVEL;
} else if (req_perf_lvl <= RESTRK_1080P_MAX_PERF_LEVEL) {
vidc_freq = vidc_clk_table[2];
*pn_set_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
} else {
vidc_freq = vidc_clk_table[4];
*pn_set_perf_lvl = RESTRK_1080P_TURBO_PERF_LEVEL;
}
if (resource_context.vidc_platform_data->disable_turbo &&
*pn_set_perf_lvl == RESTRK_1080P_TURBO_PERF_LEVEL) {
VCDRES_MSG_ERROR("Warning: Turbo mode not supported "
" falling back to 1080p clocks\n");
vidc_freq = vidc_clk_table[2];
*pn_set_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
}
resource_context.perf_level = *pn_set_perf_lvl;
VCDRES_MSG_MED("VIDC: vidc_freq = %u, req_perf_lvl = %u\n",
vidc_freq, req_perf_lvl);
#ifdef USE_RES_TRACKER
if (req_perf_lvl != RESTRK_1080P_MIN_PERF_LEVEL) {
VCDRES_MSG_MED("%s(): Setting vidc freq to %u\n",
__func__, vidc_freq);
if (!res_trk_sel_clk_rate(vidc_freq)) {
if (vidc_freq == vidc_clk_table[4]) {
if (res_trk_sel_clk_rate(vidc_clk_table[3]))
goto ret;
}
VCDRES_MSG_ERROR("%s(): res_trk_sel_clk_rate FAILED\n",
__func__);
*pn_set_perf_lvl = 0;
return false;
}
}
#endif
ret: VCDRES_MSG_MED("%s() set perl level : %d", __func__, *pn_set_perf_lvl);
return true;
}
示例13: VCDRES_MSG_LOW
static struct ion_client *res_trk_create_ion_client(void){
struct ion_client *video_client;
VCDRES_MSG_LOW("%s", __func__);
video_client = msm_ion_client_create(-1, "video_client");
return video_client;
}
示例14: res_trk_set_perf_level
u32 res_trk_set_perf_level(u32 n_req_perf_lvl, u32 *pn_set_perf_lvl,
struct vcd_clnt_ctxt_type_t *p_cctxt)
{
u32 axi_freq = 0, mfc_freq = 0, calc_mfc_freq = 0;
int rc = -1;
if (!pn_set_perf_lvl) {
VCDRES_MSG_ERROR("%s(): pn_perf_lvl is NULL\n",
__func__);
return FALSE;
}
VCDRES_MSG_LOW("%s(), n_req_perf_lvl = %d", __func__, n_req_perf_lvl);
if (p_cctxt) {
calc_mfc_freq = res_trk_convert_perf_lvl_to_freq(
(u64)n_req_perf_lvl);
if (calc_mfc_freq < VCD_RESTRK_MIN_FREQ_POINT)
calc_mfc_freq = VCD_RESTRK_MIN_FREQ_POINT;
else if (calc_mfc_freq > VCD_RESTRK_MAX_FREQ_POINT)
calc_mfc_freq = VCD_RESTRK_MAX_FREQ_POINT;
if (!p_cctxt->b_decoding) {
if (n_req_perf_lvl >= VGA_PERF_LEVEL) {
mfc_freq = mfc_clk_freq_table[2];
axi_freq = axi_clk_freq_table_enc[1];
} else {
mfc_freq = mfc_clk_freq_table[0];
axi_freq = axi_clk_freq_table_enc[0];
}
VCDRES_MSG_HIGH("\n ENCODER: axi_freq = %u"
", mfc_freq = %u, calc_mfc_freq = %u,"
" n_req_perf_lvl = %u", axi_freq,
mfc_freq, calc_mfc_freq,
n_req_perf_lvl);
} else {
if (n_req_perf_lvl <= QVGA_PERF_LEVEL) {
mfc_freq = mfc_clk_freq_table[0];
axi_freq = axi_clk_freq_table_dec[0];
} else {
axi_freq = axi_clk_freq_table_dec[0];
if (n_req_perf_lvl <= VGA_PERF_LEVEL)
mfc_freq = mfc_clk_freq_table[0];
else if (n_req_perf_lvl <= WVGA_PERF_LEVEL)
mfc_freq = mfc_clk_freq_table[1];
else {
mfc_freq = mfc_clk_freq_table[2];
axi_freq = axi_clk_freq_table_dec[1];
}
}
VCDRES_MSG_HIGH("\n DECODER: axi_freq = %u"
", mfc_freq = %u, calc_mfc_freq = %u,"
" n_req_perf_lvl = %u", axi_freq,
mfc_freq, calc_mfc_freq,
n_req_perf_lvl);
}
} else {
VCDRES_MSG_HIGH("%s() WARNING:: p_cctxt is NULL", __func__);
return TRUE;
}
#ifdef AXI_CLK_SCALING
if (n_req_perf_lvl != VCD_RESTRK_MIN_PERF_LEVEL) {
VCDRES_MSG_HIGH("\n %s(): Setting AXI freq to %u",
__func__, axi_freq);
rc = pm_qos_update_requirement(PM_QOS_SYSTEM_BUS_FREQ,
MSM_AXI_QOS_NAME, axi_freq);
if (rc < 0) {
VCDRES_MSG_ERROR("\n Update AXI bus QOS fails,"
"rc = %d\n", rc);
return FALSE;
}
}
#endif
#ifdef USE_RES_TRACKER
if (n_req_perf_lvl != VCD_RESTRK_MIN_PERF_LEVEL) {
VCDRES_MSG_HIGH("\n %s(): Setting MFC freq to %u",
__func__, mfc_freq);
if (!vid_c_sel_clk_rate(mfc_freq)) {
VCDRES_MSG_ERROR("%s(): vid_c_sel_clk_rate FAILED\n",
__func__);
*pn_set_perf_lvl = 0;
return FALSE;
}
}
#endif
*pn_set_perf_lvl =
res_trk_convert_freq_to_perf_lvl((u64) mfc_freq);
return TRUE;
}
示例15: res_trk_enable_pwr_rail
static u32 res_trk_enable_pwr_rail(void)
{
mutex_lock(&resource_context.lock);
if (!resource_context.rail_enabled) {
int rc = -1;
rc = internal_pwr_rail_mode(PWR_RAIL_MFC_CLK,
PWR_RAIL_CTL_MANUAL);
if (rc) {
VCDRES_MSG_ERROR("%s(): internal_pwr_rail_mode \
failed %d\n", __func__, rc);
mutex_unlock(&resource_context.lock);
return false;
}
VCDRES_MSG_LOW("%s(): internal_pwr_rail_mode Success %d\n",
__func__, rc);
resource_context.pclk = clk_get(resource_context.device,
"mfc_pclk");
if (IS_ERR(resource_context.pclk)) {
VCDRES_MSG_ERROR("%s(): mfc_pclk get failed\n"
, __func__);
mutex_unlock(&resource_context.lock);
return false;
}
resource_context.hclk = clk_get(resource_context.device,
"mfc_clk");
if (IS_ERR(resource_context.hclk)) {
VCDRES_MSG_ERROR("%s(): mfc_clk get failed\n"
, __func__);
clk_put(resource_context.pclk);
mutex_unlock(&resource_context.lock);
return false;
}
resource_context.hclk_div2 =
clk_get(resource_context.device, "mfc_div2_clk");
if (IS_ERR(resource_context.pclk)) {
VCDRES_MSG_ERROR("%s(): mfc_div2_clk get failed\n"
, __func__);
clk_put(resource_context.pclk);
clk_put(resource_context.hclk);
mutex_unlock(&resource_context.lock);
return false;
}
rc = internal_pwr_rail_ctl(PWR_RAIL_MFC_CLK, 1);
if (rc) {
VCDRES_MSG_ERROR("\n internal_pwr_rail_ctl failed %d\n"
, rc);
mutex_unlock(&resource_context.lock);
return false;
}
VCDRES_MSG_LOW("%s(): internal_pwr_rail_ctl Success %d\n"
, __func__, rc);
msleep(20);
rc = clk_reset(resource_context.pclk, CLK_RESET_DEASSERT);
if (rc) {
VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
mutex_unlock(&resource_context.lock);
return false;
}
msleep(20);
}