C++ UNLOCK_HARDWARE函数代码示例

static void r200WaitForFrameCompletion( r200ContextPtr rmesa )
{
   drm_radeon_sarea_t *sarea = rmesa->sarea;

   if (rmesa->do_irqs) {
      if (r200GetLastFrame(rmesa) < sarea->last_frame) {
	 if (!rmesa->irqsEmitted) {
	    while (r200GetLastFrame (rmesa) < sarea->last_frame)
	       ;
	 }
	 else {
	    UNLOCK_HARDWARE( rmesa ); 
	    r200WaitIrq( rmesa );	
	    LOCK_HARDWARE( rmesa ); 
	 }
	 rmesa->irqsEmitted = 10;
      }

      if (rmesa->irqsEmitted) {
	 r200EmitIrqLocked( rmesa );
	 rmesa->irqsEmitted--;
      }
   } 
   else {
      while (r200GetLastFrame (rmesa) < sarea->last_frame) {
	 UNLOCK_HARDWARE( rmesa ); 
	 if (rmesa->do_usleeps) 
	    DO_USLEEP( 1 );
	 LOCK_HARDWARE( rmesa ); 
      }
   }
}

int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint face )
{
   const int numLevels = t->base.lastLevel - t->base.firstLevel + 1;

   if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) {
      fprintf( stderr, "%s( %p, %p ) sz=%d lvls=%d-%d\n", __FUNCTION__,
	       (void *)rmesa->glCtx, (void *)t->base.tObj, t->base.totalSize,
	       t->base.firstLevel, t->base.lastLevel );
   }

   if ( !t || t->base.totalSize == 0 )
      return 0;

   LOCK_HARDWARE( rmesa );

   if ( t->base.memBlock == NULL ) {
      int heap;

      heap = driAllocateTexture( rmesa->texture_heaps, rmesa->nr_heaps,
				 (driTextureObject *) t );
      if ( heap == -1 ) {
	 UNLOCK_HARDWARE( rmesa );
	 return -1;
      }

      /* Set the base offset of the texture image */
      t->bufAddr = rmesa->radeonScreen->texOffset[heap] 
	   + t->base.memBlock->ofs;
      t->pp_txoffset = t->bufAddr;


      /* Mark this texobj as dirty on all units:
       */
      t->dirty_state = TEX_ALL;
   }


   /* Let the world know we've used this memory recently.
    */
   driUpdateTextureLRU( (driTextureObject *) t );
   UNLOCK_HARDWARE( rmesa );


   /* Upload any images that are new */
   if (t->base.dirty_images[face]) {
      int i;
      for ( i = 0 ; i < numLevels ; i++ ) {
         if ( (t->base.dirty_images[face] & (1 << (i+t->base.firstLevel))) != 0 ) {
            uploadSubImage( rmesa, t, i, 0, 0, t->image[face][i].width,
			    t->image[face][i].height, face );
         }
      }
      t->base.dirty_images[face] = 0;
   }

   return 0;
}

static void do_draw_pix( GLcontext *ctx,
			 GLint x, GLint y, GLsizei width, GLsizei height,
			 GLint pitch,
			 const void *pixels,
			 GLuint dest )
{
   intelContextPtr intel = INTEL_CONTEXT(ctx);
   __DRIdrawablePrivate *dPriv = intel->driDrawable;
   drm_clip_rect_t *box = dPriv->pClipRects;
   int nbox = dPriv->numClipRects;
   int i;
   int src_offset = intelAgpOffsetFromVirtual( intel, pixels);
   int src_pitch = pitch;

   assert(src_offset != ~0);  /* should be caught earlier */

   if (INTEL_DEBUG & DEBUG_PIXEL)
      fprintf(stderr, "%s\n", __FUNCTION__);

   intelFlush( &intel->ctx );
   LOCK_HARDWARE( intel );
   if (ctx->DrawBuffer)
   {
      y -= height;			/* cope with pixel zoom */
   
      if (!clip_pixelrect(ctx, ctx->DrawBuffer,
			  &x, &y, &width, &height)) {
	 UNLOCK_HARDWARE( intel );
	 return;
      }

      y = dPriv->h - y - height; 	/* convert from gl to hardware coords */
      x += dPriv->x;
      y += dPriv->y;

      for (i = 0 ; i < nbox ; i++ )
      {
	 GLint bx, by, bw, bh;
	 if (intersect_region(box + i, x, y, width, height,
			      &bx, &by, &bw, &bh)) {
            intelEmitCopyBlitLocked( intel,
                                     intel->intelScreen->cpp,
                                     src_pitch, src_offset,
                                     intel->intelScreen->front.pitch,
                                     intel->drawRegion->offset,
                                     bx - x, by - y,
                                     bx, by,
                                     bw, bh );
         }
      }
   }
   UNLOCK_HARDWARE( intel );
   intelFinish( &intel->ctx );
}

static void mgaWaitForFrameCompletion( mgaContextPtr mmesa )
{
    if ( mgaWaitFence( mmesa, mmesa->last_frame_fence, NULL ) == ENOSYS ) {
	unsigned wait = 0;
	GLuint last_frame;
	GLuint last_wrap;


	LOCK_HARDWARE( mmesa );
	last_frame = mmesa->sarea->last_frame.head;
	last_wrap = mmesa->sarea->last_frame.wrap;

	/* The DMA routines in the kernel track a couple values in the SAREA
	 * that we use here.  The number of times that the primary DMA buffer
	 * has "wrapped" around is tracked in last_wrap.  In addition, the
	 * wrap count and the buffer position at the end of the last frame are
	 * stored in last_frame.wrap and last_frame.head.
	 * 
	 * By comparing the wrap counts and the current DMA pointer value
	 * (read directly from the hardware) to last_frame.head, we can
	 * determine when the graphics processor has processed all of the
	 * commands for the last frame.
	 * 
	 * In this case "last frame" means the frame of the *previous* swap-
	 * buffers call.  This is done to prevent queuing a second buffer swap
	 * before the previous swap is executed.
	 */
	while ( 1 ) {
	    if ( last_wrap < mmesa->sarea->last_wrap ||
		 ( last_wrap == mmesa->sarea->last_wrap &&
		   last_frame <= (MGA_READ( MGAREG_PRIMADDRESS ) -
				  mmesa->primary_offset) ) ) {
		break;
	    }
	    if ( 0 ) {
		wait++;
		fprintf( stderr, "   last: head=0x%06x wrap=%d\n",
			 last_frame, last_wrap );
		fprintf( stderr, "   head: head=0x%06lx wrap=%d\n",
			 (long)(MGA_READ( MGAREG_PRIMADDRESS ) - mmesa->primary_offset),
			 mmesa->sarea->last_wrap );
	    }
	    UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH );

	    UNLOCK_HARDWARE( mmesa );
	    DO_USLEEP( 1 );
	    LOCK_HARDWARE( mmesa );
	}
	if ( wait )
	  fprintf( stderr, "\n" );

	UNLOCK_HARDWARE( mmesa );
    }
}

/*
 * Initialize texture memory.
 * We take care of one or both TMU's here.
 */
void
tdfxTMInit(tdfxContextPtr fxMesa)
{
    if (!fxMesa->glCtx->Shared->DriverData) {
        const char *extensions;
        struct tdfxSharedState *shared = CALLOC_STRUCT(tdfxSharedState);
        if (!shared)
           return;

        LOCK_HARDWARE(fxMesa);
        extensions = fxMesa->Glide.grGetString(GR_EXTENSION);
        UNLOCK_HARDWARE(fxMesa);
        if (strstr(extensions, "TEXUMA")) {
            FxU32 start, end;
            shared->umaTexMemory = GL_TRUE;
            LOCK_HARDWARE(fxMesa);
            fxMesa->Glide.grEnable(GR_TEXTURE_UMA_EXT);
            start = fxMesa->Glide.grTexMinAddress(0);
            end = fxMesa->Glide.grTexMaxAddress(0);
            UNLOCK_HARDWARE(fxMesa);
            shared->totalTexMem[0] = end - start;
            shared->totalTexMem[1] = 0;
            shared->freeTexMem[0] = end - start;
            shared->freeTexMem[1] = 0;
            shared->tmFree[0] = NewRangeNode(fxMesa, start, end);
            shared->tmFree[1] = NULL;
            /*printf("UMA tex memory: %d\n", (int) (end - start));*/
        }
        else {
            const int numTMUs = fxMesa->haveTwoTMUs ? 2 : 1;
            int tmu;
            shared->umaTexMemory = GL_FALSE;
            LOCK_HARDWARE(fxMesa);
            for (tmu = 0; tmu < numTMUs; tmu++) {
                FxU32 start = fxMesa->Glide.grTexMinAddress(tmu);
                FxU32 end = fxMesa->Glide.grTexMaxAddress(tmu);
                shared->totalTexMem[tmu] = end - start;
                shared->freeTexMem[tmu] = end - start;
                shared->tmFree[tmu] = NewRangeNode(fxMesa, start, end);
                /*printf("Split tex memory: %d\n", (int) (end - start));*/
            }
            UNLOCK_HARDWARE(fxMesa);
        }

        shared->tmPool = NULL;
        fxMesa->glCtx->Shared->DriverData = shared;
        /*printf("Texture memory init UMA: %d\n", shared->umaTexMemory);*/
    }
}

static void sisRunPipeline( GLcontext *ctx )
{
   sisContextPtr smesa = SIS_CONTEXT( ctx );

   LOCK_HARDWARE();
   sisUpdateHWState( ctx );

   if (smesa->AGPCmdModeEnabled) {
      AGP_WritePtr = (GLfloat *)smesa->AGPCmdBufBase + *smesa->pAGPCmdBufNext;
      AGP_StartPtr = AGP_WritePtr;
      AGP_ReadPtr = (GLfloat *)((long)MMIO_READ(REG_3D_AGPCmBase) -
         (long)smesa->AGPCmdBufAddr + (long)smesa->AGPCmdBufBase);
      sisUpdateAGP( smesa );
   }

   if (!smesa->Fallback && smesa->NewGLState) {
      if (smesa->NewGLState & _SIS_NEW_VERTEX_STATE)
	 sisChooseVertexState( ctx );

      if (smesa->NewGLState & (_SIS_NEW_RENDER_STATE | _NEW_TEXTURE))
	 sisChooseRenderState( ctx );

      smesa->NewGLState = 0;
   }

   _tnl_run_pipeline( ctx );

   if (smesa->AGPCmdModeEnabled)
      sisFireVertsAGP( smesa );
   else
      mEndPrimitive();
   UNLOCK_HARDWARE();
}

void sisSpanRenderFinish( GLcontext *ctx )
{
   sisContextPtr smesa = SIS_CONTEXT(ctx);

   _swrast_flush( ctx );
   UNLOCK_HARDWARE();
}

/* Upload data to a rectangular sub-region.  Lots of choices how to do this:
 *
 * - memcpy by span to current destination
 * - upload data as new buffer and blit
 *
 * Currently always memcpy.
 */
void
intel_region_data(struct intel_context *intel,
                  struct intel_region *dst,
                  GLuint dst_offset,
                  GLuint dstx, GLuint dsty,
                  const void *src, GLuint src_pitch,
                  GLuint srcx, GLuint srcy, GLuint width, GLuint height)
{
   _DBG("%s\n", __FUNCTION__);

   if (intel == NULL)
      return;

   if (dst->pbo) {
      if (dstx == 0 &&
          dsty == 0 && width == dst->pitch && height == dst->height)
         intel_region_release_pbo(intel, dst);
      else
         intel_region_cow(intel, dst);
   }

   LOCK_HARDWARE(intel);
   _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
                   dst->cpp,
                   dst->pitch,
                   dstx, dsty, width, height, src, src_pitch, srcx, srcy);

   intel_region_unmap(intel, dst);
   UNLOCK_HARDWARE(intel);
}

/* Break the COW tie to the pbo.  Both the pbo and the region end up
 * with a copy of the data.
 */
void
intel_region_cow(struct intel_context *intel, struct intel_region *region)
{
   struct intel_buffer_object *pbo = region->pbo;
   GLboolean ok;

   intel_region_release_pbo(intel, region);

   assert(region->cpp * region->pitch * region->height == pbo->Base.Size);

   _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, pbo->Base.Size);

   /* Now blit from the texture buffer to the new buffer: 
    */

   LOCK_HARDWARE(intel);
   ok = intelEmitCopyBlit(intel,
                          region->cpp,
                          region->pitch, pbo->buffer, 0, region->tiling,
                          region->pitch, region->buffer, 0, region->tiling,
                          0, 0, 0, 0,
                          region->pitch, region->height,
                          GL_COPY);
   assert(ok);
   UNLOCK_HARDWARE(intel);
}

static void
tdfxEndQuery(GLcontext *ctx, struct gl_query_object *q)
{
   tdfxContextPtr fxMesa = TDFX_CONTEXT(ctx);
   FxI32 total_pixels;
   FxI32 z_fail_pixels;


   if (q->Target == GL_SAMPLES_PASSED_ARB) {
      LOCK_HARDWARE(fxMesa);
      fxMesa->Glide.grFinish();

      fxMesa->Glide.grGet(GR_STATS_PIXELS_DEPTHFUNC_FAIL, sizeof(FxI32),
			  &z_fail_pixels);
      fxMesa->Glide.grGet(GR_STATS_PIXELS_IN, sizeof(FxI32), &total_pixels);

      q->Result = total_pixels - z_fail_pixels;
      
      /* Apparently, people have seen z_fail_pixels > total_pixels under
       * some conditions on some 3Dfx hardware.  The occlusion query spec
       * requires that we clamp to 0.
       */
      if (q->Result < 0) {
	 q->Result = 0;
      }

      q->Ready = GL_TRUE;

      UNLOCK_HARDWARE(fxMesa);
   }
}

void i830WaitAge( i830ContextPtr imesa, int age  ) 
{
   int i = 0;
   if (GET_DISPATCH_AGE(imesa) >= age) return;

   while (1) {
      drmCommandNone(imesa->driFd, DRM_I830_GETAGE);
      if (GET_DISPATCH_AGE(imesa) >= age) return;
      imesa->perf_boxes |= I830_BOX_WAIT;

      if (imesa->do_irqs) {
	 drmI830IrqEmit ie;
	 drmI830IrqWait iw;
	 int ret;
      
	 ie.irq_seq = &iw.irq_seq;
	 
	 LOCK_HARDWARE( imesa ); 
	 ret = drmCommandWriteRead( imesa->driFd, DRM_I830_IRQ_EMIT, &ie, sizeof(ie) );
	 if ( ret ) {
	    fprintf( stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret );
	    exit(1);
	 }
	 UNLOCK_HARDWARE(imesa);
	 
	 ret = drmCommandWrite( imesa->driFd, DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
	 if ( ret ) {
	    fprintf( stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret );
	    exit(1);
	 }
      } else {
	 if (++i > 5000) usleep(1); 
      }
   }
}

void r128FireBlitLocked( r128ContextPtr rmesa, drmBufPtr buffer,
                         GLint offset, GLint pitch, GLint format,
                         GLint x, GLint y, GLint width, GLint height )
{
    drm_r128_blit_t blit;
    GLint ret;

    blit.idx = buffer->idx;
    blit.offset = offset;
    blit.pitch = pitch;
    blit.format = format;
    blit.x = x;
    blit.y = y;
    blit.width = width;
    blit.height = height;

    ret = drmCommandWrite( rmesa->driFd, DRM_R128_BLIT,
                           &blit, sizeof(blit) );

    if ( ret ) {
        UNLOCK_HARDWARE( rmesa );
        fprintf( stderr, "DRM_R128_BLIT: return = %d\n", ret );
        exit( 1 );
    }
}

static void ffbSWRenderFinish(GLcontext *ctx)
{
	ffbContextPtr fmesa = FFB_CONTEXT(ctx);

	UNLOCK_HARDWARE(fmesa);
	fmesa->hw_locked = 0;
}

/**
 * Called when done softare rendering.  Unmap the buffers we mapped in
 * the above function.
 */
void
intelSpanRenderFinish(GLcontext * ctx)
{
   struct intel_context *intel = intel_context(ctx);
   GLuint i;

   _swrast_flush(ctx);

   /* Now unmap the framebuffer:
    */
#if 0
   intel_region_unmap(intel, intel->front_region);
   intel_region_unmap(intel, intel->back_region);
   intel_region_unmap(intel, intel->intelScreen->depth_region);
#endif

   for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
      if (ctx->Texture.Unit[i]._ReallyEnabled) {
         struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current;
         intel_tex_unmap_images(intel, intel_texture_object(texObj));
      }
   }

   intel_map_unmap_buffers(intel, GL_FALSE);

   UNLOCK_HARDWARE(intel);
}

/* Break the COW tie to the pbo.  Both the pbo and the region end up
 * with a copy of the data.
 */
void
intel_region_cow(struct intel_context *intel, struct intel_region *region)
{
   struct intel_buffer_object *pbo = region->pbo;
   GLboolean was_locked = intel->locked;

   if (intel == NULL)
      return;

   intel_region_release_pbo(intel, region);

   assert(region->cpp * region->pitch * region->height == pbo->Base.Size);

   DBG("%s (%d bytes)\n", __FUNCTION__, pbo->Base.Size);

   /* Now blit from the texture buffer to the new buffer: 
    */

   was_locked = intel->locked;
   if (!was_locked)
      LOCK_HARDWARE(intel);

   intelEmitCopyBlit(intel,
		     region->cpp,
		     region->pitch, region->buffer, 0, region->tiling,
		     region->pitch, pbo->buffer, 0, region->tiling,
		     0, 0, 0, 0,
		     region->pitch, region->height,
		     GL_COPY);

   if (!was_locked)
      UNLOCK_HARDWARE(intel);
}