本文整理汇总了C++中SetSDATAHiZ函数的典型用法代码示例。如果您正苦于以下问题:C++ SetSDATAHiZ函数的具体用法?C++ SetSDATAHiZ怎么用?C++ SetSDATAHiZ使用的例子?那么, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了SetSDATAHiZ函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: fPowerCycleInitializeTargetForISSP
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
unsigned char n;
unsigned long flags;
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
// lock interrupts for accurate timing
local_irq_save(flags);
ApplyTargetVDD();
// wait 1msec for the power to stabilize
#if 1 //etinum.LJ.firmware_update
Delay(1000);
#else
for (n=0; n<10; n++) {
Delay(DELAY100us/3);
}
#endif
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
local_irq_restore(flags);
if (fIsError = fDetectHiLoTransition()) {
return(INIT_ERROR);
}
printk(KERN_ERR "[CYPRESS] step1 passed\n");
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(id_setup_1, num_bits_id_setup_1);
if (fIsError = fDetectHiLoTransition()) {
return(INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
printk(KERN_ERR "[CYPRESS] step2 passed\n");
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return(PASS);
}
示例2: fPowerCycleInitializeTargetForISSP
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
// unsigned char n;
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
RemoveTargetVDD();
mdelay(5);
ApplyTargetVDD();
// wait 1msec for the power to stabilize
mdelay(1);
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
fIsError = fDetectHiLoTransition();
if ( fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return(INIT_ERROR);
}
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if ( fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return(INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return(PASS);
}
示例3: fXRESInitializeTargetForISSP
// ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fXRESInitializeTargetForISSP(void)
{
// Configure the pins for initialization
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
// Cycle reset and put the device in programming mode when it exits reset
AssertXRES();
DeassertXRES();
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
//PTJ: Send id_setup_1 instead of init1_v
//PTJ: both send CA Test Key and do a Calibrate1 SROM function
SendVector(id_setup_1, num_bits_id_setup_1);
if (fIsError = fDetectHiLoTransition()) {
// TX8SW_CPutString("\r\n fDetectHiLoTransition Error");
printk(KERN_INFO "\r\n fDetectHiLoTransition Error\n");
return (INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return (PASS);
}
示例4: fPowerCycleInitializeTargetForISSP
// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(unsigned long flag)
{
int n;
printk(KERN_ERR"[TOUCHKEY]start fPowerCycleInitializeTargetForISSP\n");
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Turn on power to the target device before other signals
SetTargetVDDStrong();
ApplyTargetVDD();
local_irq_save(flag);
// wait 1msec for the power to stabilize
//#if 0
for (n = 0; n < 10; n++) {
Delay(DELAY100us);
}
//#endif
// Set SCLK to high Z so there is no clock and wait for a high to low
// transition on SDAT. SCLK is not needed this time.
SetSCLKHiZ();
// printk(KERN_DEBUG "fDetectHiLoTransition\n");
if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
local_irq_restore(flag);
#endif
printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
return (INIT_ERROR);
}
// Configure the pins for initialization
// SetSDATAHiZ(); // issp_test_20100709 block
SetSCLKStrong();
SCLKLow(); //PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!
// !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end); //PTJ: rev308, added to match spec
// printk("SendVector(id_setup_1)\n",0,0,0);
SendVector(id_setup_1, num_bits_id_setup_1);
if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
local_irq_restore(flag);
#endif
printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
return (INIT_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec).
return (PASS);
}
示例5: SendVector
/*============================================================================
SendVector()
This routine sends the vector specifed. All vectors constant strings found
in ISSP_Vectors.h. The data line is returned to HiZ after the vector is
sent.
bVect a pointer to the vector to be sent.
nNumBits the number of bits to be sent.
bCurrByte scratch var to keep the byte to be sent.
There is no returned value.
============================================================================
*/
void SendVector(const unsigned char *bVect, unsigned int iNumBits)
{
SetSDATAStrong();
while (iNumBits > 0) {
if (iNumBits >= 8) {
SendByte(*(bVect), 8);
iNumBits -= 8;
bVect++;
} else {
SendByte(*(bVect), iNumBits);
iNumBits = 0;
}
}
SetSDATAHiZ();
}
示例6: ErrorTrap
/* ========================================================================= */
void ErrorTrap(unsigned char bErrorNumber)
{
#ifndef RESET_MODE
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// If Power Cycle programming, turn off the target
RemoveTargetVDD();
#endif
// ioctl(touch_fd, DEV_CTRL_TOUCH_INT_ENABLE,NULL);
// printk("[TSP] %s,%d error!!\n",__func__,__LINE__);
// exit(1);
// while (1);
// return(bErrorNumbers);
}
示例7: fVerifyTargetBlock
// ============================================================================
// fVerifyTargetBlock()
// Verify the block just written to. This can be done byte-by-byte before the
// protection bits are set.
// Returns:
// 0 if successful
// BLOCK_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fVerifyTargetBlock(unsigned char bBankNumber,
unsigned char bBlockNumber)
{
SendVector(set_block_number, 11);
//Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bBlockNumber, 8);
SendByte(set_block_number_end, 3);
SendVector(verify_setup_v, num_bits_verify_setup);
if ((fIsError = fDetectHiLoTransition())) {
return (BLOCK_ERROR);
}
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4); //PTJ 308: this was changed from sending the first 5 bits to sending the first 4
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 6);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return an error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return (BLOCK_ERROR);
bTargetDataPtr++;
// Increment the address by four to accomodate 6-Bit addressing
// (puts the 6-bit address into MSBit locations for "SendByte()").
bTargetAddress += 4;
}
return (PASS);
}
示例8: fReadByteLoop
signed char fReadByteLoop(unsigned int blknum)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while(bTargetDataPtr < TARGET_DATABUFF_LEN)
{
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress,7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
if (bTargetDataIN != pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr])
{
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("bTargetDataIN : ");
UART_PutHexByte(bTargetDataIN);
UART_CPutString(" abTargetDataOUT : ");
UART_PutHexByte(pSocData[blknum*TARGET_DATABUFF_LEN + bTargetDataPtr]);
#endif
return(BLOCK_ERROR);
}
bTargetDataPtr++;
// Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetAddress += 2;
}
return(PASS);
}
示例9: ReStartTarget
/* ============================================================================
// ReStartTarget()
// After programming, the target PSoC must be reset to take it out of
// programming mode. This routine performs a reset.
============================================================================*/
void ReStartTarget(void)
{
#ifdef RESET_MODE
/* Assert XRES, then release, then disable XRES-Enable */
AssertXRES();
udelay(XRES_CLK_DELAY);
DeassertXRES();
#else
/* Set all pins to highZ to avoid back powering the PSoC through the GPIO */
/* protection diodes. */
SetSCLKHiZ();
SetSDATAHiZ();
/* Cycle power on the target to cause a reset */
RemoveTargetVDD();
udelay(POWER_CYCLE_DELAY);
ApplyTargetVDD();
#endif
}
示例10: ReStartTarget
// ============================================================================
// ReStartTarget()
// After programming, the target PSoC must be reset to take it out of
// programming mode. This routine performs a reset.
// ============================================================================
void ReStartTarget(void)
{
#ifdef RESET_MODE
// Assert XRES, then release, then disable XRES-Enable
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
#else
// Set all pins to highZ to avoid back powering the PSoC through the GPIO
// protection diodes.
SetSCLKHiZ();
SetSDATAHiZ();
// Cycle power on the target to cause a reset
RemoveTargetVDD();
mdelay(300);
ApplyTargetVDD();
#endif
}
示例11: fReadByteLoop
signed char fReadByteLoop(void)
{
/* char x = 0; //wly */
bTargetAddress = 0;
bTargetDataPtr = 0;
/* pr_info("wly: fReadByteLoop"); */
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_write_setup, num_bits_read_write_setup);
while (bTargetDataPtr < TARGET_DATABUFF_LEN) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 4);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); /* Run two SCLK cycles between writing and reading */
SetSDATAHiZ(); /* Set to HiZ so Target can drive SDATA */
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); /* Send the ReadByte Vector End */
/* Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
//pr_info("wly: bTargetDataIN=%x, %x\n", bTargetDataIN, abTargetDataOUT[bTargetDataPtr]);
*/
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
return BLOCK_ERROR;
bTargetDataPtr++;
/* Increment the address by 2 to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
*/
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable);
return PASS;
}
示例12: fXRESInitializeTargetForISSP
/* ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
// 0 if successful
// INIT_ERROR if timed out on handshake to the device.
============================================================================*/
signed char fXRESInitializeTargetForISSP(void)
{
/* Configure the pins for initialization */
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
#ifdef ACTIVE_LOW_XRES
AssertXRES(); /* assert XRES before setting XRES pin to strong */
SetXRESStrong();
DeassertXRES();
/* Delay(XRES_CLK_DELAY); */
mdelay(1);
AssertXRES();
#else
/* Cycle reset and put the device in programming mode when it exits reset */
SetXRESStrong();
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
#endif
/* !!! NOTE:
// The timing spec that requires that the first Init-Vector happen within
// 1 msec after the reset/power up. For this reason, it is not advisable
// to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
// Init-Vector instructions below. Doing so could introduce excess delay
// and cause the target device to exit ISSP Mode.
*/
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError)
return INIT_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/* NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
// it does not occur (per spec). */
return PASS;
}
示例13: fReadByteLoop
signed char fReadByteLoop(void)
{
bTargetAddress = 0;
bTargetDataPtr = 0;
while (bTargetDataPtr < TargetDatabufLen) {
/* Send Read Byte vector and then get a byte from Target */
SendVector(read_byte_v, 5);
/* Set the drive here because SendByte() does not */
SetSDATAStrong();
SendByte(bTargetAddress, 6);
/* Run two SCLK cycles between writing and reading */
RunClock(2);
/* Set to HiZ so Target can drive SDATA */
SetSDATAHiZ();
bTargetDataIN = bReceiveByte();
RunClock(1);
/* Send the ReadByte Vector End */
SendVector(read_byte_v + 1, 1);
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr]) {
#ifdef TX_ON
TX8SW_PutCRLF();
TX8SW_CPutString("bTargetDataIN : ");
TX8SW_PutSHexByte(bTargetDataIN);
TX8SW_CPutString(" abTargetDataOUT : ");
TX8SW_PutSHexByte(abTargetDataOUT[bTargetDataPtr]);
#endif
return BLOCK_ERROR;
}
bTargetDataPtr++;
bTargetAddress += 4;
}
return PASS;
}
示例14: fXRESInitializeTargetForISSP
/*============================================================================
fXRESInitializeTargetForISSP()
Implements the intialization vectors for the device.
Returns:
0 if successful
INIT_ERROR if timed out on handshake to the device.
============================================================================
*/
signed char fXRESInitializeTargetForISSP(void)
{
/*Configure the pins for initialization*/
SetSDATAHiZ();
SetSCLKStrong();
SCLKLow();
SetXRESStrong();
/* Cycle reset and put the device
in programming mode when it exits reset */
AssertXRES();
Delay(XRES_CLK_DELAY);
DeassertXRES();
/*
!!! NOTE:
The timing spec that requires that the first Init-Vector happen within
1 msec after the reset/power up. For this reason, it is not advisable
to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
Init-Vector instructions below. Doing so could introduce excess delay
and cause the target device to exit ISSP Mode.
PTJ: Send id_setup_1 instead of init1_v
PTJ: both send CA Test Key and do a Calibrate1 SROM function
*/
SendVector(id_setup_1, num_bits_id_setup_1);
fIsError = fDetectHiLoTransition();
if (fIsError != 0)
return INIT_ERROR;
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
/*
NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
it does not occur (per spec).
*/
return PASS;
}
示例15: fReadSecurity
// ============================================================================
// PTJ: fReadSecurity()
// This reads from SM0 with Read Supervisory SPC command.
// Need to have SPC Test Mode enabled before using these commands?
// Returns:
// 0 if successful
// __________ if timed out on handshake to the device.
// ============================================================================
signed char fReadSecurity(void)
{
SendVector(ReadSecuritySetup, num_bits_ReadSecuritySetup);
// SendVector(SPCTestMode_enable, num_bits_SPCTestMode_enable);
bTargetAddress = 0x00;
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) { //PTJ: we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2
//PTJ: TSYNC Enable
SendVector(tsync_enable, num_bits_tsync_enable);
SendVector(read_security_pt1, num_bits_read_security_pt1); //PTJ:
// Set the drive here because SendByte() does not.
SetSDATAStrong();
SendByte(bTargetAddress, 7); //PTJ: hardcode MSb of address as 0 in bit stream
SendVector(read_security_pt1_end,
num_bits_read_security_pt1_end);
//PTJ: TSYNC Disable
SendVector(tsync_disable, num_bits_tsync_disable);
SendVector(read_security_pt2, num_bits_read_security_pt2);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
SendVector(read_security_pt3, num_bits_read_security_pt3);
SetSDATAStrong();
SendByte(bTargetAddress, 7);
SendVector(read_security_pt3_end,
num_bits_read_security_pt3_end);
SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);
bTargetAddress += 2;
}
bTargetAddress = 0x00;
bTargetDataPtr = 0x00;
SendVector(tsync_enable, num_bits_tsync_enable); //PTJ: 307, added for tsync testing
while (bTargetAddress < (SECURITY_BYTES_PER_BANK * 2)) { //PTJ: we do SECURITY_BYTES_PER_BANK * 2 because we bTargetAddress += 2
//Send Read Byte vector and then get a byte from Target
SendVector(read_byte_v, 4);
// Set the drive here because SendByte() does not
SetSDATAStrong();
SendByte(bTargetAddress, 7);
RunClock(2); // Run two SCLK cycles between writing and reading
SetSDATAHiZ(); // Set to HiZ so Target can drive SDATA
bTargetDataIN = bReceiveByte();
RunClock(1);
SendVector(read_byte_v + 1, 1); // Send the ReadByte Vector End
// Test the Byte that was read from the Target against the original
// value (already in the 128-Byte array "abTargetDataOUT[]"). If it
// matches, then bump the address & pointer,loop-back and continue.
// If it does NOT match abort the loop and return and error.
if (bTargetDataIN != abTargetDataOUT[bTargetDataPtr])
// return(BLOCK_ERROR);
// Increment the address by two to accomodate 7-Bit addressing
// (puts the 7-bit address into MSBit locations for "SendByte()").
bTargetDataPtr++;
bTargetAddress += 2;
}
SendVector(tsync_disable, num_bits_tsync_disable); //PTJ: 307, added for tsync testing
return (PASS);
}