C++ SCLKLow函数代码示例

// ============================================================================
signed char fDetectHiLoTransition(void)
{
	// nTimer breaks out of the while loops if the wait in the two loops totals
	// more than 100 msec.  Making this static makes the loop run a faster.
	// This is really a processor/compiler dependency and it not needed.
	unsigned long int iTimer=0;

	// NOTE:
	// These loops look unconventional, but it is necessary to check SDATA_PIN
	// as shown because the transition can be missed otherwise, due to the
	// length of the SDATA Low-High-Low after certain commands.

	// Generate clocks for the target to pull SDATA High

	iTimer = TRANSITION_TIMEOUT;
//	gpio_tlmm_config(GPIO_CFG(TSP_SDA, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
//				GPIO_CFG_2MA), GPIO_CFG_ENABLE);
	gpio_direction_input(TSP_SDA);

	while(1)
	{
		SCLKLow();

		if (fSDATACheck())       // exit once SDATA goes HI
		{
			break;
		} 
		SCLKHigh();
		// If the wait is too long then timeout
		if (iTimer-- == 0) {
			printk(KERN_INFO "[TSP] %s, %d : Error\n", __func__, __LINE__);
			return (ERROR);
		}
	}
	// Generate Clocks and wait for Target to pull SDATA Low again

	iTimer = TRANSITION_TIMEOUT;              // reset the timeout counter

	while(1)
	{
		SCLKLow();

		if (!fSDATACheck())    // exit once SDATA returns LOW
		{
			break;
		}
		SCLKHigh();
		// If the wait is too long then timeout
		if (iTimer-- == 0) {
			printk(KERN_INFO "[TSP] %s, %d : Error\n", __func__, __LINE__);
			return (ERROR);
		}
	}
	return (PASS);
}

// ============================================================================
// fDetectHiLoTransition()
// Waits for transition from SDATA = 1 to SDATA = 0.  Has a 100 msec timeout.
// TRANSITION_TIMEOUT is a loop counter for a 100msec timeout when waiting for
// a high-to-low transition. This is used in the polling loop of
// fDetectHiLoTransition(). The timing of the while(1) loops can be calculated
// and the number of loops is counted, using iTimer, to determine when 100
// msec has passed.
//
//// SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
// processors may need to have delays added after setting SCLK low and setting
// SCLK high in order to not exceed this specification. The maximum frequency
// of SCLK should be measured as part of validation of the final program
//
// Returns:
//     0 if successful
//    -1 if timed out.
// ============================================================================
signed char fDetectHiLoTransition(void)
{
	// nTimer breaks out of the while loops if the wait in the two loops totals
	// more than 100 msec.  Making this static makes the loop run a faster.
	// This is really a processor/compiler dependency and it not needed.
	static unsigned int iTimer;

	// NOTE:
	// These loops look unconventional, but it is necessary to check SDATA_PIN
	// as shown because the transition can be missed otherwise, due to the
	// length of the SDATA Low-High-Low after certain commands.

	// Generate clocks for the target to pull SDATA High
	//dog_kick();
	iTimer = TRANSITION_TIMEOUT;
#if !defined(CONFIG_TARGET_LOCALE_NAATT)
	printk(KERN_DEBUG
	       "Generate clocks for the target to pull SDATA High\n");
#endif
	while (1) {
		SCLKLow();
		if (fSDATACheck())	// exit once SDATA goes HI
			break;
		SCLKHigh();
		// If the wait is too long then timeout
		if (iTimer-- == 0) {
			return (ERROR);
		}
	}
	//dog_kick();
	// Generate Clocks and wait for Target to pull SDATA Low again
	iTimer = TRANSITION_TIMEOUT;	// reset the timeout counter
#if !defined(CONFIG_TARGET_LOCALE_NAATT)
	printk(KERN_DEBUG
	       "Generate Clocks and wait for Target to pull SDATA Low again\n");
#endif
	while (1) {
		SCLKLow();	//issp_test_20100709 unblock
		if (!fSDATACheck()) {	// exit once SDATA returns LOW
			break;
		}
		SCLKHigh();	//issp_test_20100709 unblock
		// If the wait is too long then timeout
		if (iTimer-- == 0) {
			return (ERROR);
		}
	}
#if !defined(CONFIG_TARGET_LOCALE_NAATT)
	printk(KERN_ERR"fDetectHiLoTransition OUT!!!!\n");
#endif
	return (PASS);
}

// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
//     0 if successful
//     INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
    unsigned char n;
    unsigned long flags;
    
    // Set all pins to highZ to avoid back powering the PSoC through the GPIO
    // protection diodes.
    SetSCLKHiZ();
    SetSDATAHiZ();

    // Turn on power to the target device before other signals
    SetTargetVDDStrong();

    // lock interrupts for accurate timing
    local_irq_save(flags);
    ApplyTargetVDD();

    // wait 1msec for the power to stabilize
    #if 1 //etinum.LJ.firmware_update
    Delay(1000);
    #else
    for (n=0; n<10; n++) {
        Delay(DELAY100us/3);
    }
    #endif
    
    // Set SCLK to high Z so there is no clock and wait for a high to low
    // transition on SDAT. SCLK is not needed this time.
    SetSCLKHiZ();
    local_irq_restore(flags);
    
    if (fIsError = fDetectHiLoTransition()) {
        return(INIT_ERROR);
    }

    printk(KERN_ERR "[CYPRESS] step1 passed\n");
    
    // Configure the pins for initialization
    SetSDATAHiZ();
    SetSCLKStrong();
    SCLKLow();					//PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!

    // !!! NOTE:
    //  The timing spec that requires that the first Init-Vector happen within
    //  1 msec after the reset/power up. For this reason, it is not advisable
    //  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
    //  Init-Vector instructions below. Doing so could introduce excess delay
    //  and cause the target device to exit ISSP Mode.

    SendVector(id_setup_1, num_bits_id_setup_1);
    if (fIsError = fDetectHiLoTransition()) {
        return(INIT_ERROR);
    }
    SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

    printk(KERN_ERR "[CYPRESS] step2 passed\n");
    // NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
    //       it does not occur (per spec).
    return(PASS);
}

// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
//     0 if successful
//     INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(unsigned long flag)
{
    int n;

    printk(KERN_ERR"[TOUCHKEY]start fPowerCycleInitializeTargetForISSP\n");

	// Set all pins to highZ to avoid back powering the PSoC through the GPIO
	// protection diodes.
	SetSCLKHiZ();
	SetSDATAHiZ();

	// Turn on power to the target device before other signals
	SetTargetVDDStrong();
	ApplyTargetVDD();
	local_irq_save(flag);
	// wait 1msec for the power to stabilize
//#if 0
	for (n = 0; n < 10; n++) {
		Delay(DELAY100us);
	}
//#endif
	// Set SCLK to high Z so there is no clock and wait for a high to low
	// transition on SDAT. SCLK is not needed this time.
	SetSCLKHiZ();
//    printk(KERN_DEBUG "fDetectHiLoTransition\n");
	if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
		local_irq_restore(flag);
#endif
		printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
		return (INIT_ERROR);
	}
	// Configure the pins for initialization
//    SetSDATAHiZ(); // issp_test_20100709 block
	SetSCLKStrong();
	SCLKLow();		//PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!

	// !!! NOTE:
	//  The timing spec that requires that the first Init-Vector happen within
	//  1 msec after the reset/power up. For this reason, it is not advisable
	//  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
	//  Init-Vector instructions below. Doing so could introduce excess delay
	//  and cause the target device to exit ISSP Mode.

	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);	//PTJ: rev308, added to match spec
//    printk("SendVector(id_setup_1)\n",0,0,0);
	SendVector(id_setup_1, num_bits_id_setup_1);
	if ((fIsError = fDetectHiLoTransition())) {
#if defined(CONFIG_TARGET_LOCALE_NAATT)
		local_irq_restore(flag);
#endif
		printk(KERN_ERR"[TOUCHKEY]fDetectHiLoTransition()error!!!\n");
		return (INIT_ERROR);
	}
	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

	// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
	//       it does not occur (per spec).
	return (PASS);
}

// ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
//     0 if successful
//     INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fXRESInitializeTargetForISSP(void)
{
	// Configure the pins for initialization
	SetSDATAHiZ();
	SetSCLKStrong();
	SCLKLow();
	// Cycle reset and put the device in programming mode when it exits reset
	AssertXRES();
	DeassertXRES();
	// !!! NOTE:
	//  The timing spec that requires that the first Init-Vector happen within
	//  1 msec after the reset/power up. For this reason, it is not advisable
	//  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
	//  Init-Vector instructions below. Doing so could introduce excess delay
	//  and cause the target device to exit ISSP Mode.

	//PTJ: Send id_setup_1 instead of init1_v
	//PTJ: both send CA Test Key and do a Calibrate1 SROM function
	SendVector(id_setup_1, num_bits_id_setup_1);
	if (fIsError = fDetectHiLoTransition()) {
//        TX8SW_CPutString("\r\n fDetectHiLoTransition Error");
		printk(KERN_INFO "\r\n fDetectHiLoTransition Error\n");
		return (INIT_ERROR);
	}
	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

	// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
	//       it does not occur (per spec).
	return (PASS);
}

 /*
 ============================================================================
 SendByte()
 This routine sends up to one byte of a vector, one bit at a time.
    bCurrByte   the byte that contains the bits to be sent.
    bSize       the number of bits to be sent. Valid values are 1 to 8.

 SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
 processors may need to have delays added after setting SCLK low and setting
 SCLK high in order to not exceed this specification. The maximum frequency
 of SCLK should be measured as part of validation of the final program

 There is no returned value.
 ============================================================================
*/
void SendByte(unsigned char bCurrByte, unsigned char bSize)
{
	unsigned char b = 0;

	for (b = 0; b < bSize; b++) {
		if (bCurrByte & 0x80) {
			SetSDATAHigh();
			SCLKHigh();
			SCLKLow();
		} else {
			SetSDATALow();
			SCLKHigh();
			SCLKLow();
		}
		bCurrByte = bCurrByte << 1;
	}
}

 /*============================================================================
 bReceiveBit()
 Clocks the SCLK pin (high-low-high) and reads the status of the SDATA pin
 after the rising edge.

 SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
 processors may need to have delays added after setting SCLK low and setting
 SCLK high in order to not exceed this specification. The maximum frequency
 of SCLK should be measured as part of validation of the final program

 Returns:
     0 if SDATA was low
     1 if SDATA was high
 ============================================================================
*/
unsigned char bReceiveBit(void)
{
	SCLKLow();
	SCLKHigh();
	if (fSDATACheck())
		return 1;
	else
		return 0;
}

 /*============================================================================
 RunClock()
 Description:
 Run Clock without sending/receiving bits. Use this when transitioning from
 write to read and read to write "num_cycles" is number of SCLK cycles, not
 number of counter cycles.

 SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
 processors may need to have delays added after setting SCLK low and setting
 SCLK high in order to not exceed this specification. The maximum frequency
 of SCLK should be measured as part of validation of the final program

 ============================================================================
*/
void RunClock(unsigned int iNumCycles)
{
	int i;

	for (i = 0; i < iNumCycles; i++) {
		SCLKLow();
		SCLKHigh();
	}
}

// ============================================================================
// bReceiveBit()
// Clocks the SCLK pin (high-low-high) and reads the status of the SDATA pin
// after the rising edge.
//
// SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
// processors may need to have delays added after setting SCLK low and setting
// SCLK high in order to not exceed this specification. The maximum frequency
// of SCLK should be measured as part of validation of the final program
//
// Returns:
//     0 if SDATA was low
//     1 if SDATA was high
// ============================================================================
unsigned char bReceiveBit(void)
{
	SCLKLow();
	SCLKHigh();
	if (fSDATACheck()) {
		return (1);
	} else {
		return (0);
	}
}

// ============================================================================
// RunClock()
// Description:
// Run Clock without sending/receiving bits. Use this when transitioning from
// write to read and read to write "num_cycles" is number of SCLK cycles, not
// number of counter cycles.
//
// SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
// processors may need to have delays added after setting SCLK low and setting
// SCLK high in order to not exceed this specification. The maximum frequency
// of SCLK should be measured as part of validation of the final program
//
// ============================================================================
void RunClock(unsigned int iNumCycles)
{
	int i;

	for (i = 0; i < iNumCycles; i++) {
		SCLKLow();
		SCLKHigh();
	}
	// function exits with CLK high.
}

// ============================================================================
// fDetectHiLoTransition()
// Waits for transition from SDATA = 1 to SDATA = 0.  Has a 100 msec timeout.
// TRANSITION_TIMEOUT is a loop counter for a 100msec timeout when waiting for
// a high-to-low transition. This is used in the polling loop of
// fDetectHiLoTransition(). The timing of the while(1) loops can be calculated
// and the number of loops is counted, using iTimer, to determine when 100
// msec has passed.
//
// SCLK cannot run faster than the specified maximum frequency of 8MHz. Some
// processors may need to have delays added after setting SCLK low and setting
// SCLK high in order to not exceed this specification. The maximum frequency
// of SCLK should be measured as part of validation of the final program
//
// Returns:
//     0 if successful
//    -1 if timed out.
// ============================================================================
signed char fDetectHiLoTransition(void)
{
    // nTimer breaks out of the while loops if the wait in the two loops totals
    // more than 100 msec.  Making this static makes the loop run a faster.
    // This is really a processor/compiler dependency and it not needed.
    unsigned long int iTimer=0;

    // NOTE:
    // These loops look unconventional, but it is necessary to check SDATA_PIN
    // as shown because the transition can be missed otherwise, due to the
    // length of the SDATA Low-High-Low after certain commands.

    // Generate clocks for the target to pull SDATA High
    iTimer = TRANSITION_TIMEOUT;
    while(1)
    {
        SCLKLow();
        if (fSDATACheck())       // exit once SDATA goes HI
        break;
        SCLKHigh();
        // If the wait is too long then timeout
        if (iTimer-- == 0) {
            return (ERROR);
        }
    }
    // Generate Clocks and wait for Target to pull SDATA Low again
    iTimer = TRANSITION_TIMEOUT;              // reset the timeout counter
    while(1)
    {
        SCLKLow();
        if (!fSDATACheck()) {   // exit once SDATA returns LOW
            break;
        }
        SCLKHigh();
        // If the wait is too long then timeout
        if (iTimer-- == 0) {
            return (ERROR);
        }
    }
    return (PASS);
}

// ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
//     0 if successful
//     INIT_ERROR if timed out on handshake to the device.
// ============================================================================
signed char fPowerCycleInitializeTargetForISSP(void)
{
//	unsigned char n;

	// Set all pins to highZ to avoid back powering the PSoC through the GPIO
	// protection diodes.
	SetSCLKHiZ();
	SetSDATAHiZ();

	// Turn on power to the target device before other signals
	SetTargetVDDStrong();
	RemoveTargetVDD();
	mdelay(5);    
	ApplyTargetVDD();
	// wait 1msec for the power to stabilize
	mdelay(1);    


	// Set SCLK to high Z so there is no clock and wait for a high to low
	// transition on SDAT. SCLK is not needed this time.
	SetSCLKHiZ();
	fIsError = fDetectHiLoTransition();
	if ( fIsError ) {
		printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
		return(INIT_ERROR);
	}

	// Configure the pins for initialization
	SetSDATAHiZ();
	SetSCLKStrong();
	SCLKLow();					//PTJ: DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS!

	// !!! NOTE:
	//  The timing spec that requires that the first Init-Vector happen within
	//  1 msec after the reset/power up. For this reason, it is not advisable
	//  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
	//  Init-Vector instructions below. Doing so could introduce excess delay
	//  and cause the target device to exit ISSP Mode.

	SendVector(id_setup_1, num_bits_id_setup_1);
	fIsError = fDetectHiLoTransition();
	if ( fIsError ) {
		printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
		return(INIT_ERROR);
	}
	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

	// NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
	//       it does not occur (per spec).
	return(PASS);
}

/* ============================================================================
// fXRESInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// Returns:
//     0 if successful
//     INIT_ERROR if timed out on handshake to the device.
 ============================================================================*/
signed char fXRESInitializeTargetForISSP(void)
{
	/* Configure the pins for initialization */
	SetSDATAHiZ();
	SetSCLKStrong();
	SCLKLow();

#ifdef ACTIVE_LOW_XRES
	AssertXRES();	/* assert XRES before setting XRES pin to strong */
	SetXRESStrong();
	DeassertXRES();
	/* Delay(XRES_CLK_DELAY); */
	mdelay(1);
	AssertXRES();
#else
	/* Cycle reset and put the device in programming mode when it exits reset */
	SetXRESStrong();
	AssertXRES();
	Delay(XRES_CLK_DELAY);
	DeassertXRES();
#endif

	/* !!! NOTE:
	//  The timing spec that requires that the first Init-Vector happen within
	//  1 msec after the reset/power up. For this reason, it is not advisable
	//  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
	//  Init-Vector instructions below. Doing so could introduce excess delay
	//  and cause the target device to exit ISSP Mode.
	 */

	SendVector(id_setup_1, num_bits_id_setup_1);
	fIsError = fDetectHiLoTransition();
	if (fIsError)
		return INIT_ERROR;

	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

	/* NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
	//       it does not occur (per spec). */
	return PASS;
}

 /*============================================================================
 fXRESInitializeTargetForISSP()
 Implements the intialization vectors for the device.
 Returns:
     0 if successful
     INIT_ERROR if timed out on handshake to the device.
 ============================================================================
*/
signed char fXRESInitializeTargetForISSP(void)
{
	 /*Configure the pins for initialization*/
	SetSDATAHiZ();
	SetSCLKStrong();
	SCLKLow();
	SetXRESStrong();

	/* Cycle reset and put the device
	  in programming mode when it exits reset */
	AssertXRES();
	Delay(XRES_CLK_DELAY);
	DeassertXRES();

	/*
	 !!! NOTE:
	  The timing spec that requires that the first Init-Vector happen within
	  1 msec after the reset/power up. For this reason, it is not advisable
	  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
	  Init-Vector instructions below. Doing so could introduce excess delay
	  and cause the target device to exit ISSP Mode.

	PTJ: Send id_setup_1 instead of init1_v
	PTJ: both send CA Test Key and do a Calibrate1 SROM function
	*/
	SendVector(id_setup_1, num_bits_id_setup_1);
	fIsError = fDetectHiLoTransition();
	if (fIsError != 0)
		return INIT_ERROR;
	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

	/*
	 NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
		   it does not occur (per spec).
	*/
	return PASS;
}

/* ============================================================================
// fPowerCycleInitializeTargetForISSP()
// Implements the intialization vectors for the device.
// The first time fDetectHiLoTransition is called the Clk pin is highZ because
// the clock is not needed during acquire.
// Returns:
//     0 if successful
//     INIT_ERROR if timed out on handshake to the device.
 ============================================================================*/
signed char fPowerCycleInitializeTargetForISSP(void)
{
	unsigned char n;

	SetSDATALow();
	SCLKLow();
	RemoveTargetVDD();
	mdelay(500);
	SetSCLKHiZ();
	SetSDATAHiZ();
	/* Set all pins to highZ to avoid back powering the PSoC through the GPIO
	// protection diodes.
	*/

	/* Turn on power to the target device before other signals */
	SetTargetVDDStrong();
	ApplyTargetVDD();
	/* wait 1msec for the power to stabilize */

	for (n = 0; n < 10; n++)
		udelay(DELAY100us);

	/* Set SCLK to high Z so there is no clock and wait for a high to low
	// transition on SDAT. SCLK is not needed this time.
	*/
	SetSCLKHiZ();
	mdelay(10);

	/*
	//fIsError = fDetectHiLoTransition();
	//if (fIsError ) {
	//printk("wly: fDetectHiLoTransition 11111    failed!\n");
	//return(INIT_ERROR);
	//}
	*/

	/* Configure the pins for initialization */
	SetSDATAHiZ();
	SetSCLKStrong();
	SCLKLow();		/* DO NOT SET A BREAKPOINT HERE AND EXPECT SILICON ID TO PASS! */

	/* !!! NOTE:
	//  The timing spec that requires that the first Init-Vector happen within
	//  1 msec after the reset/power up. For this reason, it is not advisable
	//  to separate the above RESET_MODE or POWER_CYCLE_MODE code from the
	//  Init-Vector instructions below. Doing so could introduce excess delay
	//  and cause the target device to exit ISSP Mode.
	*/

	SendVector(id_setup_1, num_bits_id_setup_1);
	fIsError = fDetectHiLoTransition();
	if (fIsError) {
		pr_info("wly: fDetectHiLoTransition 222222  failed!\n");
		return INIT_ERROR;
	}

	SendVector(wait_and_poll_end, num_bits_wait_and_poll_end);

	/* NOTE: DO NOT not wait for HiLo on SDATA after vector Init-3
	//       it does not occur (per spec).
	 */
	return PASS;
}