C++ OS_MEMZERO函数代码示例

int
wmi_unified_connect_htc_service(struct wmi_unified * wmi_handle, void *htc_handle)
{

    int status;
    HTC_SERVICE_CONNECT_RESP response;
    HTC_SERVICE_CONNECT_REQ connect;

    OS_MEMZERO(&connect, sizeof(connect));
    OS_MEMZERO(&response, sizeof(response));

    /* meta data is unused for now */
    connect.pMetaData = NULL;
    connect.MetaDataLength = 0;
    /* these fields are the same for all service endpoints */
    connect.EpCallbacks.pContext = wmi_handle;
    connect.EpCallbacks.EpTxCompleteMultiple = NULL /* Control path completion ar6000_tx_complete */;
    connect.EpCallbacks.EpRecv = wmi_control_rx /* Control path rx */;
    connect.EpCallbacks.EpRecvRefill = NULL /* ar6000_rx_refill */;
    connect.EpCallbacks.EpSendFull = NULL /* ar6000_tx_queue_full */;
    connect.EpCallbacks.EpTxComplete = wmi_htc_tx_complete /* ar6000_tx_queue_full */;

    /* connect to control service */
    connect.ServiceID = WMI_CONTROL_SVC;

    if ((status = HTCConnectService(htc_handle, &connect, &response)) != EOK)
    {
        printk(" Failed to connect to WMI CONTROL  service status:%d \n",  status);
        return -1;;
    }
    wmi_handle->wmi_endpoint_id = response.Endpoint;
    wmi_handle->htc_handle = htc_handle;
    
    return EOK;
}

void
ar9300_ani_poll_freebsd(struct ath_hal *ah,
    const struct ieee80211_channel *chan)
{

	HAL_NODE_STATS stats;
	HAL_ANISTATS anistats;
	HAL_SURVEY_SAMPLE survey;

	OS_MEMZERO(&stats, sizeof(stats));
	OS_MEMZERO(&anistats, sizeof(anistats));
	OS_MEMZERO(&survey, sizeof(survey));

	ar9300_ani_ar_poll(ah, &stats, chan, &anistats);

	/*
	 * If ANI stats are valid, use them to update the
	 * channel survey.
	 */
	if (anistats.valid) {
		survey.cycle_count = anistats.cyclecnt_diff;
		survey.chan_busy = anistats.rxclr_cnt;
		survey.ext_chan_busy = anistats.extrxclr_cnt;
		survey.tx_busy = anistats.txframecnt_diff;
		survey.rx_busy = anistats.rxframecnt_diff;
		ath_hal_survey_add_sample(ah, &survey);
	}
}

static void ieee80211_resmgr_clear_event(ieee80211_resmgr_t resmgr,
                                          ieee80211_resmgr_vap_priv_t resmgr_vap)
{
    if (resmgr_vap) {
        /* VAP related event */
        OS_MEMZERO(&resmgr_vap->def_event, sizeof(struct ieee80211_resmgr_sm_event));
        resmgr_vap->def_event_type = 0;
    } else {
        OS_MEMZERO(&resmgr->scandata.def_event, sizeof(struct ieee80211_resmgr_sm_event));
        resmgr->scandata.def_event_type = 0;
    }
}

/*
 * Clear all delay lines for all filter types
 *
 * This may be called before any radar pulses are configured
 * (eg on a non-DFS channel, with radar PHY errors still showing up.)
 * In that case, just drop out early.
 */
void dfs_reset_alldelaylines(struct ath_dfs *dfs)
{
        struct dfs_filtertype *ft = NULL;
        struct dfs_filter *rf;
        struct dfs_delayline *dl;
        struct dfs_pulseline *pl;
        int i,j;

        if (dfs == NULL) {
            VOS_TRACE(VOS_MODULE_ID_SAP, VOS_TRACE_LEVEL_ERROR,
                                "%s[%d]: sc_dfs is NULL", __func__, __LINE__);
            return;
        }
        pl = dfs->pulses;

        if (pl == NULL) {
            VOS_TRACE(VOS_MODULE_ID_SAP, VOS_TRACE_LEVEL_ERROR,
                            "%s[%d]:  pl==NULL, dfs=%p", __func__, __LINE__, dfs);
            return;
        }

        if (dfs->dfs_b5radars == NULL) {
            VOS_TRACE(VOS_MODULE_ID_SAP, VOS_TRACE_LEVEL_ERROR,
            "%s[%d]: pl==NULL, b5radars=%p", __func__, __LINE__, dfs->dfs_b5radars);
            return;
        }

         /* reset the pulse log */
        pl->pl_firstelem = pl->pl_numelems = 0;
        pl->pl_lastelem = DFS_MAX_PULSE_BUFFER_MASK;

        for (i=0; i<DFS_MAX_RADAR_TYPES; i++) {
            if (dfs->dfs_radarf[i] != NULL) {
                ft = dfs->dfs_radarf[i];
                if (NULL != ft) {
                    for (j = 0; j < ft->ft_numfilters; j++) {
                        rf = &(ft->ft_filters[j]);
                        dl = &(rf->rf_dl);
                        if (dl != NULL) {
                            OS_MEMZERO(dl, sizeof(struct dfs_delayline));
                            dl->dl_lastelem = (0xFFFFFFFF) & DFS_MAX_DL_MASK;
                        }
                    }
                }
            }
        }
        for (i = 0; i < dfs->dfs_rinfo.rn_numbin5radars; i++) {
            OS_MEMZERO(&(dfs->dfs_b5radars[i].br_elems[0]), sizeof(struct dfs_bin5elem)*DFS_MAX_B5_SIZE);
            dfs->dfs_b5radars[i].br_firstelem = 0;
            dfs->dfs_b5radars[i].br_numelems = 0;
            dfs->dfs_b5radars[i].br_lastelem = (0xFFFFFFFF)&DFS_MAX_B5_MASK;
        }
}

void
ar9300_ani_poll_freebsd(struct ath_hal *ah,
    const struct ieee80211_channel *chan)
{

	HAL_NODE_STATS stats;
	HAL_ANISTATS anistats;

	OS_MEMZERO(&stats, sizeof(stats));
	OS_MEMZERO(&anistats, sizeof(anistats));

	ar9300_ani_ar_poll(ah, &stats, chan, &anistats);
}

void
ar9300_get_spectral_params(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
{
    u_int32_t val;
    HAL_CHANNEL_INTERNAL *chan = NULL;
    const struct ieee80211_channel *c;
    int i, ichain, rx_chain_status;
    struct ath_hal_9300 *ahp = AH9300(ah);
    HAL_BOOL asleep = ahp->ah_chip_full_sleep;

    c = AH_PRIVATE(ah)->ah_curchan;
    if (c != NULL)
        chan = ath_hal_checkchannel(ah, c);

    // XXX TODO: just always wake up all chips?
    if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
        ar9300_set_power_mode(ah, HAL_PM_AWAKE, AH_TRUE);
    }

    val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);

    ss->ss_fft_period = MS(val, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD);
    ss->ss_period = MS(val, AR_PHY_SPECTRAL_SCAN_PERIOD);
    ss->ss_count = MS(val, AR_PHY_SPECTRAL_SCAN_COUNT);
    ss->ss_short_report = (val & AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT) ? 1:0;
    ss->ss_spectral_pri = ( val & AR_PHY_SPECTRAL_SCAN_PRIORITY_HI) ? 1:0;
    OS_MEMZERO(ss->ss_nf_cal, sizeof(ss->ss_nf_cal)); 
    OS_MEMZERO(ss->ss_nf_pwr, sizeof(ss->ss_nf_cal)); 
    ss->ss_nf_temp_data = 0;

    if (chan != NULL) {
        rx_chain_status = OS_REG_READ(ah, AR_PHY_RX_CHAINMASK) & 0x7;
        for (i = 0; i < HAL_NUM_NF_READINGS; i++) {
            ichain = i % 3;
            if (rx_chain_status & (1 << ichain)) {
                ss->ss_nf_cal[i] =
                    ar9300_noise_floor_get(ah, chan->channel, ichain);     
                ss->ss_nf_pwr[i] =
                    ar9300_noise_floor_power_get(ah, chan->channel, ichain);
            }
        }
        ss->ss_nf_temp_data = OS_REG_READ_FIELD(ah, AR_PHY_BB_THERM_ADC_4, AR_PHY_BB_THERM_ADC_4_LATEST_THERM);
    } else {
        HALDEBUG(AH_NULL, HAL_DEBUG_UNMASKABLE,
            "%s: chan is NULL - no ss nf values\n", __func__);
    }

    if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
        ar9300_set_power_mode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
    }
}

wmi_buf_t
wmi_buf_alloc(wmi_unified_t wmi_handle, int len)
{
    wmi_buf_t wmi_buf;
    /* NOTE: For now the wbuf type is used as WBUF_TX_CTL
     * But this need to be changed appropriately to reserve
     * proper headroom for wmi_buffers
     */
    wmi_buf = wbuf_alloc(wmi_handle->osdev, WBUF_TX_CTL, len);
    if( NULL == wmi_buf )
    {
        /* wbuf_alloc returns NULL if the internel pool in wmi_handle->osdev
         * is empty
         */
        return NULL;
    }

    
    /* Clear the wmi buffer */
    OS_MEMZERO(wbuf_header(wmi_buf), len);
	
    /*
     * Set the length of the buffer to match the allocation size.
     */
    wbuf_set_pktlen(wmi_buf, len);
    return wmi_buf;
}

void
pktlog_init(void *_scn)
{
    struct ath_softc_net80211 *scn = (struct ath_softc_net80211 *) _scn;
    struct pktlog_handle_t *pl_dev = (scn) ? scn->pl_dev :
                                                     NULL;
    struct ath_pktlog_info *pl_info = (pl_dev) ?
                                        pl_dev->pl_info : g_pktlog_info;
    struct ath_softc *sc;
    if (scn) {
        sc = (struct ath_softc *)scn->sc_dev;
        sc->pl_info = pl_info;
    }
    OS_MEMZERO(pl_info, sizeof(*pl_info));
    
    PKTLOG_LOCK_INIT(pl_info);

    if (pl_dev) {
        pl_dev->tgt_pktlog_enabled = false; 
    }
    pl_info->buf_size = PKTLOG_DEFAULT_BUFSIZE;
    pl_info->buf = NULL;
    pl_info->log_state = 0;
    pl_info->sack_thr = PKTLOG_DEFAULT_SACK_THR;
    pl_info->tail_length = PKTLOG_DEFAULT_TAIL_LENGTH;
    pl_info->thruput_thresh = PKTLOG_DEFAULT_THRUPUT_THRESH;
    pl_info->per_thresh = PKTLOG_DEFAULT_PER_THRESH;
    pl_info->phyerr_thresh = PKTLOG_DEFAULT_PHYERR_THRESH;
    pl_info->trigger_interval = PKTLOG_DEFAULT_TRIGGER_INTERVAL;
	pl_info->pktlen = 0;
	pl_info->start_time_thruput = 0;
	pl_info->start_time_per = 0;
}

static void hsm_save_memento(ieee80211_hsm_t  hsm,
                             hsm_trace_type_t trace_type,
                             u_int8_t         initial_state,
                             u_int8_t         final_state,
                             int              event_type)
{
    hsm_history_t         *p_hsm_history = &(hsm->history);
    hsm_history_info_t    *p_memento;

    /*
     * History saved in circular buffer. 
     * Save a pointer to next write location and increment pointer.
     */
    spin_lock(&p_hsm_history->hh_lock);
    p_memento = &(p_hsm_history->data[p_hsm_history->index]);
    p_hsm_history->index++;
    if (p_hsm_history->index >= IEEE80211_N(p_hsm_history->data)) {
        p_hsm_history->index = 0;
    }
    spin_unlock(&p_hsm_history->hh_lock);
    
    OS_MEMZERO(p_memento, sizeof(*p_memento));
    p_memento->trace_type    = trace_type;
    p_memento->initial_state = initial_state;
    p_memento->final_state   = final_state;
    p_memento->event_type    = event_type;
}                          

wmi_buf_t
wmi_buf_alloc_debug(wmi_unified_t wmi_handle, uint16_t len, uint8_t *file_name,
                    uint32_t line_num)
{
	wmi_buf_t wmi_buf;

	if (roundup(len + WMI_MIN_HEAD_ROOM, 4) > wmi_handle->max_msg_len) {
		CDF_ASSERT(0);
		return NULL;
	}

	wmi_buf = cdf_nbuf_alloc_debug(NULL,
				       roundup(len + WMI_MIN_HEAD_ROOM, 4),
				       WMI_MIN_HEAD_ROOM, 4, false, file_name,
				       line_num);

	if (!wmi_buf)
		return NULL;

	/* Clear the wmi buffer */
	OS_MEMZERO(cdf_nbuf_data(wmi_buf), len);

	/*
	 * Set the length of the buffer to match the allocation size.
	 */
	cdf_nbuf_set_pktlen(wmi_buf, len);

	return wmi_buf;
}

/*
 * vap attach. (VAP Module)
 */
void ieee80211_resmgr_vattach(ieee80211_resmgr_t resmgr, ieee80211_vap_t vap)
{
    int retval;
    ieee80211_resmgr_vap_priv_t resmgr_vap;

    /* Allocate and store ResMgr private data in the VAP structure */
    resmgr_vap = (ieee80211_resmgr_vap_priv_t) OS_MALLOC(vap->iv_ic->ic_osdev, 
                                                         sizeof(struct ieee80211_resmgr_vap_priv),
                                                         0);
    ASSERT(resmgr_vap != NULL);
    if (!resmgr_vap)
        return;
    OS_MEMZERO(resmgr_vap, sizeof(struct ieee80211_resmgr_vap_priv));

    resmgr_vap->state = VAP_STOPPED;
    resmgr_vap->resmgr = resmgr;

    /* Setup Off-Channel Scheduler data in the ResMgr private data */
    ieee80211_resmgr_oc_sched_vattach(resmgr, vap, resmgr_vap);
    
    /* Register an event handler with the VAP module */
    retval = ieee80211_vap_register_event_handler(vap, ieee80211_resmgr_vap_evhandler, (void *)resmgr);
    ASSERT(retval == 0);

    ieee80211vap_set_resmgr(vap,resmgr_vap);
}

void *
wmi_unified_attach(ol_scn_t scn_handle, wma_wow_tx_complete_cbk func)
{
    struct wmi_unified *wmi_handle;
    wmi_handle = (struct wmi_unified *)OS_MALLOC(NULL, sizeof(struct wmi_unified), GFP_ATOMIC);
    if (wmi_handle == NULL) {
        printk("allocation of wmi handle failed %zu \n", sizeof(struct wmi_unified));
        return NULL;
    }
    OS_MEMZERO(wmi_handle, sizeof(struct wmi_unified));
    wmi_handle->scn_handle = scn_handle;
    adf_os_atomic_init(&wmi_handle->pending_cmds);
    adf_os_atomic_init(&wmi_handle->is_target_suspended);
#ifdef FEATURE_RUNTIME_PM
    adf_os_atomic_init(&wmi_handle->runtime_pm_inprogress);
#endif
    adf_os_spinlock_init(&wmi_handle->eventq_lock);
    adf_nbuf_queue_init(&wmi_handle->event_queue);
#ifdef CONFIG_CNSS
    cnss_init_work(&wmi_handle->rx_event_work, wmi_rx_event_work);
#else
    INIT_WORK(&wmi_handle->rx_event_work, wmi_rx_event_work);
#endif
#ifdef WMI_INTERFACE_EVENT_LOGGING
    adf_os_spinlock_init(&wmi_handle->wmi_record_lock);
#endif
    wmi_handle->wma_wow_tx_complete_cbk = func;
    return wmi_handle;
}

ieee80211_pwrsave_smps_t ieee80211_pwrsave_smps_attach(struct ieee80211vap *vap, u_int32_t smpsDynamic)
{
    ieee80211_pwrsave_smps_t smps;
    osdev_t os_handle = vap->iv_ic->ic_osdev;
    smps = (ieee80211_pwrsave_smps_t)OS_MALLOC(os_handle,sizeof(struct ieee80211_pwrsave_smps),0);
    if (smps) {
        OS_MEMZERO(smps, sizeof(struct ieee80211_pwrsave_smps));
        /*
         * Initialize pwrsave timer
         */
        OS_INIT_TIMER(os_handle,
                      &smps->ips_timer,
                      ieee80211_pwrsave_smps_timer,
                      smps);
        if (smpsDynamic && IEEE80211_HAS_DYNAMIC_SMPS_CAP(vap->iv_ic)) {
            ieee80211_vap_dynamic_mimo_ps_set(vap);
        } else {
            ieee80211_vap_dynamic_mimo_ps_clear(vap);
        }
        smps->ips_smPowerSaveState      = IEEE80211_SM_PWRSAVE_DISABLED;
        smps->ips_connected = false;
        smps->ips_vap =  vap;
        ieee80211_vap_register_event_handler(vap,ieee80211_pwrsave_smps_vap_event_handler,(void *)smps );
    }

    return smps;
}

static void
ieee80211_reset_stats(struct ieee80211vap *vap, int reset_hw)
{
    struct ieee80211com *ic = vap->iv_ic;

    OS_MEMZERO(&vap->iv_unicast_stats, sizeof(struct ieee80211_mac_stats));
    OS_MEMZERO(&vap->iv_multicast_stats, sizeof(struct ieee80211_mac_stats));

    if (reset_hw) {
        OS_MEMZERO(&ic->ic_phy_stats[0],
                   sizeof(struct ieee80211_phy_stats) * IEEE80211_MODE_MAX);

        /* clear H/W phy counters */
        ic->ic_clear_phystats(ic);
    }
}

int
ath_rfkill_attach(struct ath_softc *sc)
{
    u_int32_t rfsilent = 0;
    struct ath_hal *ah = sc->sc_ah;
    struct ath_rfkill_info *rfkill = &sc->sc_rfkill;

    OS_MEMZERO(rfkill, sizeof(struct ath_rfkill_info));
    
    ath_hal_getrfkillinfo(ah, &rfsilent);
    rfkill->rf_gpio_select = rfsilent & 0xffff;
    rfkill->rf_gpio_polarity = (rfsilent >> 16) & 0xffff;

    rfkill->rf_hasint = ath_hal_hasrfkillInt(ah) ? AH_TRUE : AH_FALSE;

    ath_hal_enable_rfkill(ah, AH_TRUE);
    ath_initialize_timer(sc->sc_osdev, &rfkill->rf_timer,
                         ATH_RFKILL_POLL_INTERVAL,
                         (timer_handler_function)ath_rfkill_poll,
                         sc);

    /*
     * This flag is used by the WAR for RkFill Delay during power resume.
     * This flag is used to skip the initial check after system boot.
     */
    rfkill->delay_chk_start = AH_FALSE;

    return 0;
}