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C++ ORDATA函数代码示例

本文整理汇总了C++中ORDATA函数的典型用法代码示例。如果您正苦于以下问题：C++ ORDATA函数的具体用法？C++ ORDATA怎么用？C++ ORDATA使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。


在下文中一共展示了ORDATA函数的15个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。

示例1: UDATA

/* PTR data structures

   ptr_dev      PTR device descriptor
   ptr_unit     PTR unit descriptor
   ptr_reg      PTR register list
*/

DIB ptr_dib = { DEV_PTR, 1, { &ptr } };

UNIT ptr_unit = {
    UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
           SERIAL_IN_WAIT
    };

REG ptr_reg[] = {
    { ORDATA (BUF, ptr_unit.buf, 8) },
    { FLDATA (DONE, dev_done, INT_V_PTR) },
    { FLDATA (ENABLE, int_enable, INT_V_PTR) },
    { FLDATA (INT, int_req, INT_V_PTR) },
    { DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, ptr_stopioe, 0) },
    { NULL }
    };

MTAB ptr_mod[] = {
    { MTAB_XTD|MTAB_VDV, 0, "DEVNO", NULL, NULL, &show_dev },
    { 0 }
    };

DEVICE ptr_dev = {
开发者ID:markpizz，项目名称:markpizz.github.io，代码行数:31，代码来源:pdp8_pt.c

示例2: UDATA

/* PTR data structures

   ptr_dev      PTR device descriptor
   ptr_unit     PTR unit
   ptr_reg      PTR register list
*/

DIB ptr_dib = { CHAN_W, DEV_PTR, XFR_PTR, std_tplt, &ptr };

UNIT ptr_unit = {
    UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
           SERIAL_IN_WAIT
    };

REG ptr_reg[] = {
    { ORDATA (BUF, ptr_unit.buf, 7) },
    { FLDATA (XFR, xfr_req, XFR_V_PTR) },
    { FLDATA (SOR, ptr_sor, 0) },
    { DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, ptr_unit.wait, 24), REG_NZ + PV_LEFT },
    { FLDATA (STOP_IOE, ptr_stopioe, 0) },
    { NULL }
    };

MTAB ptr_mod[] = {
    { MTAB_XTD|MTAB_VDV, 0, "CHANNEL", "CHANNEL",
      &set_chan, &show_chan, NULL },
    { 0 }
    };

DEVICE ptr_dev = {
开发者ID:dsphinx，项目名称:simh，代码行数:31，代码来源:sds_stddev.c

示例3: UDATA

   ptr_dev      PTR device descriptor
   ptr_unit     PTR unit descriptor
   ptr_mod      PTR modifiers
   ptr_reg      PTR register list
*/

DIB ptr_dib = { &ptrio, PTR };

UNIT ptr_unit = {
    UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
           SERIAL_IN_WAIT
    };

REG ptr_reg[] = {
    { ORDATA (BUF, ptr_unit.buf, 8) },
    { FLDATA (CTL, ptr.control, 0) },
    { FLDATA (FLG, ptr.flag, 0) },
    { FLDATA (FBF, ptr.flagbuf, 0) },
    { DRDATA (TRLCTR, ptr_trlcnt, 8), REG_HRO },
    { DRDATA (TRLLIM, ptr_trllim, 8), PV_LEFT },
    { DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, ptr_stopioe, 0) },
    { ORDATA (SC, ptr_dib.select_code, 6), REG_HRO },
    { ORDATA (DEVNO, ptr_dib.select_code, 6), REG_HRO },
    { NULL }
    };

MTAB ptr_mod[] = {
    { UNIT_DIAG, UNIT_DIAG, "diagnostic mode", "DIAG", NULL },
开发者ID:ProtoSD，项目名称:simh，代码行数:30，代码来源:hp2100_stddev.c

示例4: inq_svc

t_stat inq_svc (UNIT *uptr);
t_stat inq_reset (DEVICE *dptr);

void inq_puts (char *cptr);

/* INQ data structures

   inq_dev      INQ device descriptor
   inq_unit     INQ unit descriptor
   inq_reg      INQ register list
*/

UNIT inq_unit = { UDATA (&inq_svc, 0, 0), KBD_POLL_WAIT };

REG inq_reg[] = {
    { ORDATA (INQC, inq_char, 7) },
    { FLDATA (INR, ind[IN_INR], 0) },
    { FLDATA (INC, ind[IN_INC], 0) },
    { DRDATA (TIME, inq_unit.wait, 24), REG_NZ + PV_LEFT },
    { NULL }
    };

MTAB inq_mod[] = {
    { UNIT_PCH, 0,        "business set", "BUSINESS" },
    { UNIT_PCH, UNIT_PCH, "Fortran set", "FORTRAN" },
    { 0 }
    };

DEVICE inq_dev = {
    "INQ", &inq_unit, inq_reg, inq_mod,
    1, 10, 31, 1, 8, 7,
开发者ID:B-Rich，项目名称:simh，代码行数:31，代码来源:i1401_iq.c

示例5: UDATA

   ttix_dev     TTIx device descriptor
   ttix_unit    TTIx unit descriptor
   ttix_reg     TTIx register list
   ttix_mod     TTIx modifiers list
*/

DIB ttix_dib = { 
    DEV_TTO1, 8, NULL,
    { &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix }
    };

UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_IDLE|UNIT_ATTABLE, 0), KBD_POLL_WAIT };

REG ttix_reg[] = {
    { BRDATA (BUF, ttix_buf, 8, 8, TTX_MAXL) },
    { ORDATA (DONE, ttix_done, TTX_MAXL) },
    { FLDATA (INT, int_hwre[API_TTI1], INT_V_TTI1) },
    { DRDATA (TIME, ttix_unit.wait, 24), REG_NZ + PV_LEFT },
    { ORDATA (DEVNUM, ttix_dib.dev, 6), REG_HRO },
    { NULL }
    };

MTAB ttix_mod[] = {
    { MTAB_XTD | MTAB_VDV, 0, "LINES", "LINES",
      &ttx_vlines, &tmxr_show_lines, (void *) &ttx_desc },
    { UNIT_ATT, UNIT_ATT, "summary", NULL,
      NULL, &tmxr_show_summ, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
      &tmxr_dscln, NULL, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,
      NULL, &tmxr_show_cstat, (void *) &ttx_desc },
开发者ID:alexchenfeng，项目名称:UNIXV6，代码行数:31，代码来源:pdp18b_tt1.c

示例6: tty_set_mode

t_stat tty_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc);

/* TTI data structures

   tti_dev      TTI device descriptor
   tti_unit     TTI unit descriptor
   tti_reg      TTI register list
   tti_mod      TTI modifiers list
*/

DIB tti_dib = { DEV_TTI, 1, { &tti } };

UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE|TT_MODE_KSR, 0), 0 };

REG tti_reg[] = {
    { ORDATA (BUF, tti_unit.buf, 8) },
    { FLDATA (DONE, dev_done, INT_V_TTI) },
    { FLDATA (ENABLE, int_enable, INT_V_TTI) },
    { FLDATA (INT, int_req, INT_V_TTI) },
    { DRDATA (POS, tti_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, tti_unit.wait, 24), PV_LEFT },
    { NULL }
    };

MTAB tti_mod[] = {
    { TT_MODE, TT_MODE_KSR, "KSR", "KSR", &tty_set_mode },
    { TT_MODE, TT_MODE_7B,  "7b",  "7B",  &tty_set_mode },
    { TT_MODE, TT_MODE_8B,  "8b",  "8B",  &tty_set_mode },
    { TT_MODE, TT_MODE_7P,  "7b",  NULL,  NULL },
    { MTAB_XTD|MTAB_VDV, 0, "DEVNO", NULL, NULL, &show_dev, NULL },
    { 0 }
开发者ID:jehurodrig，项目名称:simh-pre-git，代码行数:31，代码来源:pdp8_tt.c

示例7: UDATA

   fe_unit      FE unit descriptor
   fe_reg       FE register list
*/

#define fei_unit        fe_unit[0]
#define feo_unit        fe_unit[1]
#define kaf_unit        fe_unit[2]

UNIT fe_unit[] = {
    { UDATA (&fei_svc, UNIT_IDLE, 0), 0 },
    { UDATA (&feo_svc, 0, 0), SERIAL_OUT_WAIT },
    { UDATA (&kaf_svc, 0, 0), (1*1000*1000) }
    };

REG fe_reg[] = {
    { ORDATA (IBUF, fei_unit.buf, 8) },
    { DRDATA (ICOUNT, fei_unit.pos, T_ADDR_W), REG_RO + PV_LEFT },
    { DRDATA (ITIME, fei_unit.wait, 24), PV_LEFT },
    { ORDATA (OBUF, feo_unit.buf, 8) },
    { DRDATA (OCOUNT, feo_unit.pos, T_ADDR_W), REG_RO + PV_LEFT },
    { DRDATA (OTIME, feo_unit.wait, 24), REG_NZ + PV_LEFT },
    { NULL }
    };

MTAB fe_mod[] = {
    { UNIT_DUMMY, 0, NULL, "STOP", &fe_stop_os },
    { 0 }
    };

DEVICE fe_dev = {
    "FE", fe_unit, fe_reg, fe_mod,
开发者ID:B-Rich，项目名称:simh，代码行数:31，代码来源:pdp10_fe.c

示例8: UDATA

/* LPT data structures

   lpt_dev      LPT device descriptor
   lpt_unit     LPT unit descriptor
   lpt_reg      LPT register list
*/

DIB lpt_dib = { DEV_LPT, 1, { &lpt } };

UNIT lpt_unit = {
    UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
    };

REG lpt_reg[] = {
    { ORDATA (BUF, lpt_unit.buf, 8) },
    { FLDATA (ERR, lpt_err, 0) },
    { FLDATA (DONE, dev_done, INT_V_LPT) },
    { FLDATA (ENABLE, int_enable, INT_V_LPT) },
    { FLDATA (INT, int_req, INT_V_LPT) },
    { DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, lpt_unit.wait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, lpt_stopioe, 0) },
    { ORDATA (DEVNUM, lpt_dib.dev, 6), REG_HRO },
    { NULL }
    };

MTAB lpt_mod[] = {
    { MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
      &set_dev, &show_dev, NULL },
    { 0 }
开发者ID:tlhackque，项目名称:simh，代码行数:30，代码来源:pdp8_lp.c

示例9: UDATA

   qty_dev      QTY device descriptor
   qty_unit     QTY unit descriptor
   qty_reg      QTY register list
*/

DIB qty_dib = { DEV_QTY, INT_QTY, PI_QTY, &qty } ;

UNIT    qty_unit =
{
    UDATA (&qty_svc, (UNIT_ATTABLE), 0)
} ;

REG qty_reg[] =  /*  ('alm_reg' should be similar to this except for device code related items)  */
{
    { ORDATA (BUF, qty_unit.buf, 8) },
    { FLDATA (BUSY, dev_busy, INT_V_QTY) },
    { FLDATA (DONE, dev_done, INT_V_QTY) },
    { FLDATA (DISABLE, dev_disable, INT_V_QTY) },
    { FLDATA (INT, int_req, INT_V_QTY) },

    { FLDATA (MDMCTL, qty_mdm,  0) },
    { FLDATA (AUTODS, qty_auto, 0) },
    { DRDATA (POLLS, qty_polls, 32) },
    { NULL }
} ;

MTAB    qty_mod[] =
{
    { UNIT_8B, 0, "7b", "7B", NULL },
    { UNIT_8B, UNIT_8B, "8b", "8B", NULL },
开发者ID:promovicz，项目名称:simh-pre-git，代码行数:30，代码来源:nova_qty.c

示例10: UDATA

/* Card reader data structures

   cdr_dev      CDR descriptor
   cdr_unit     CDR unit descriptor
   cdr_reg      CDR register list
*/

DIB cdr_dib = { &cdr_chsel, NULL };

UNIT cdr_unit = {
    UDATA (&cdr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_TEXT, 0)
    };

REG cdr_reg[] = {
    { ORDATA (STATE, cdr_sta, 2) },
    { DRDATA (BPTR, cdr_bptr, 5), PV_LEFT },
    { BRDATA (BUF, cdr_bbuf, 8, 36, CD_BINLNT) },
    { DRDATA (POS, cdr_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TSTART, cdr_tstart, 24), PV_LEFT + REG_NZ },
    { DRDATA (TSTOP, cdr_tstop, 24), PV_LEFT + REG_NZ },
    { DRDATA (TLEFT, cdr_tleft, 24), PV_LEFT + REG_NZ },
    { DRDATA (TRIGHT, cdr_tright, 24), PV_LEFT + REG_NZ },
    { NULL }  };

MTAB cdr_mod[] = {
    { UNIT_CBN, UNIT_CBN, "column binary", "BINARY", &cd_set_mode },
    { UNIT_CBN, UNIT_CBN, "text", "TEXT", &cd_set_mode },
    { 0 }
    };
开发者ID:ST3ALth，项目名称:simh，代码行数:29，代码来源:i7094_cd.c

示例11: UDATA

/* LPT data structures

   lpt_dev      LPT device descriptor
   lpt_unit     LPT unit descriptor
   lpt_reg      LPT register list
*/

DIB lpt_dib = { &lpt_chsel, &lpt_chwr };

UNIT lpt_unit = {
    UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_CONS+UNIT_TEXT, 0)
    };

REG lpt_reg[] = {
    { ORDATA (STATE, lpt_sta, 2) },
    { ORDATA (CMD, lpt_cmd, 2) },
    { ORDATA (CHOB, lpt_chob, 36) },
    { FLDATA (CHOBV, lpt_chob_v, 0) },
    { DRDATA (BPTR, lpt_bptr, 6), PV_LEFT },
    { BRDATA (BUF, lpt_bbuf, 8, 36, LPT_BINLNT) },
    { BRDATA (EBUF, lpt_ebuf, 8, 36, LPT_ECHLNT) },
    { DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TSTART, lpt_tstart, 24), PV_LEFT + REG_NZ },
    { DRDATA (TSTOP, lpt_tstop, 24), PV_LEFT + REG_NZ },
    { DRDATA (TLEFT, lpt_tleft, 24), PV_LEFT + REG_NZ },
    { DRDATA (TRIGHT, lpt_tright, 24), PV_LEFT + REG_NZ },
    { NULL }
    };

MTAB lpt_mod[] = {
开发者ID:ST3ALth，项目名称:simh，代码行数:30，代码来源:i7094_lp.c

示例12: UDATA

/* 88DSK Standard I/O Data Structures */

UNIT dsk_unit[] = {
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  },
    { UDATA (&dsk_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE, DSK_SIZE)  }
};

REG dsk_reg[] = {
    { ORDATA (DISK, cur_disk, 4) },
    { NULL }
};

DEVICE dsk_dev = {
    "DSK", dsk_unit, dsk_reg, NULL,
    8, 10, 31, 1, 8, 8,
    NULL, NULL, &dsk_reset,
    NULL, NULL, NULL
};

/*  Service routines to handle simlulator functions */

/* service routine - actually gets char & places in buffer */

t_stat dsk_svc (UNIT *uptr)
开发者ID:salva，项目名称:my-simh，代码行数:30，代码来源:altair_dsk.c

示例13: UDATA

/* Type 62 LPT data structures

   lp62_dev     LPT device descriptor
   lp62_unit    LPT unit
   lp62_reg     LPT register list
*/

DIB lp62_dib = { DEV_LPT, 2, &lp62_iors, { &lp62_65, &lp62_66 } };

UNIT lp62_unit = {
    UDATA (&lp62_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
    };

REG lp62_reg[] = {
    { ORDATA (BUF, lp62_unit.buf, 8) },
    { FLDATA (INT, int_hwre[API_LPT], INT_V_LPT) },
    { FLDATA (DONE, int_hwre[API_LPT], INT_V_LPT) },
    { FLDATA (SPC, int_hwre[API_LPTSPC], INT_V_LPTSPC) },
    { DRDATA (BPTR, lp62_bp, 6) },
    { ORDATA (STATE, lp62_spc, 6), REG_HRO },
    { FLDATA (OVRPR, lp62_ovrpr, 0), REG_HRO },
    { DRDATA (POS, lp62_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, lp62_unit.wait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, lp62_stopioe, 0) },
    { BRDATA (LBUF, lp62_buf, 8, 8, LP62_BSIZE) },
    { ORDATA (DEVNO, lp62_dib.dev, 6), REG_HRO },
    { NULL }
    };

MTAB lp62_mod[] = {
开发者ID:B-Rich，项目名称:simh，代码行数:30，代码来源:pdp18b_lp.c

示例14: UDATA

   ttix_mod     TTIx modifiers list
*/

DIB ttix_dib = { DEV_KJ8, 8,
             { &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox } };

UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_IDLE|UNIT_ATTABLE, 0), SERIAL_IN_WAIT };

REG ttix_reg[] = {
    { BRDATAD (BUF, ttix_buf, 8, 8, TTX_LINES, "input buffer, lines 0 to 3") },
    { GRDATAD (DONE, dev_done, 8, TTX_LINES, INT_V_TTI1, "device done flag (line 0 rightmost)") },
    { GRDATAD (ENABLE, int_enable, 8, TTX_LINES, INT_V_TTI1, "interrupt enable flag") },
    { GRDATAD (INT, int_req, 8, TTX_LINES, INT_V_TTI1, "interrupt pending flag") },
    { DRDATAD (TIME, ttix_unit.wait, 24, "initial polling interval"), REG_NZ + PV_LEFT },
    { DRDATAD (TPS, ttx_tps, 10, "polls per second after calibration"), REG_NZ + PV_LEFT },
    { ORDATA (DEVNUM, ttix_dib.dev, 6), REG_HRO },
    { NULL }
    };

MTAB ttix_mod[] = {
    { UNIT_ATT, UNIT_ATT, "summary", NULL,
      NULL, &tmxr_show_summ, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
      &tmxr_dscln, NULL, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,
      NULL, &tmxr_show_cstat, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "STATISTICS", NULL,
      NULL, &tmxr_show_cstat, (void *) &ttx_desc },
    { MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
      &set_dev, &show_dev, NULL },
    { 0 }
开发者ID:ST3ALth，项目名称:simh，代码行数:31，代码来源:pdp8_ttx.c

示例15: IVCL

   pclk_dev     PCLK device descriptor
   pclk_unit    PCLK unit descriptor
   pclk_reg     PCLK register list
*/

#define IOLN_PCLK       006

DIB pclk_dib = {
    IOBA_AUTO, IOLN_PCLK, &pclk_rd, &pclk_wr,
    1, IVCL (PCLK), VEC_AUTO, { NULL }
    };

UNIT pclk_unit = { UDATA (&pclk_svc, UNIT_IDLE, 0) };

REG pclk_reg[] = {
    { ORDATA (CSR, pclk_csr, 16) },
    { ORDATA (CSB, pclk_csb, 16) },
    { ORDATA (CNT, pclk_ctr, 16) },
    { FLDATA (INT, IREQ (PCLK), INT_V_PCLK) },
    { FLDATA (OVFL, pclk_csr, CSR_V_ERR) },
    { FLDATA (DONE, pclk_csr, CSR_V_DONE) },
    { FLDATA (IE, pclk_csr, CSR_V_IE) },
    { FLDATA (UPDN, pclk_csr, CSR_V_UPDN) },
    { FLDATA (MODE, pclk_csr, CSR_V_MODE) },
    { FLDATA (RUN, pclk_csr, CSR_V_GO) },
    { BRDATA (TIME, xtim, 10, 32, 4), REG_NZ + PV_LEFT },
    { BRDATA (TPS, rate, 10, 32, 4), REG_NZ + PV_LEFT },
    { ORDATA (DEVADDR, pclk_dib.ba, 32), REG_HRO },
    { ORDATA (DEVVEC, pclk_dib.vec, 16), REG_HRO },
    { NULL }
    };
开发者ID:leomauro，项目名称:simh，代码行数:31，代码来源:pdp11_pclk.c


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