本文整理汇总了C++中OMAP2_L4_IO_ADDRESS函数的典型用法代码示例。如果您正苦于以下问题:C++ OMAP2_L4_IO_ADDRESS函数的具体用法?C++ OMAP2_L4_IO_ADDRESS怎么用?C++ OMAP2_L4_IO_ADDRESS使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了OMAP2_L4_IO_ADDRESS函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: OMAP_GPIO_183
void OMAP_GPIO_183(void)
{
u32 i2c_2_sda;
i2c_2_sda = __raw_readw(OMAP2_L4_IO_ADDRESS(0x480021c0));
i2c_2_sda = i2c_2_sda & ~(0x7 << 0);
// i2c_2_sda = i2c_2_sda |(1<<8)|(1<<4)|(1<<3)|(4<<0);
i2c_2_sda = i2c_2_sda |(1<<8)|(4<<0);
__raw_writew(i2c_2_sda,OMAP2_L4_IO_ADDRESS(0x480021c0));
}
示例2: OMAP_GPIO_168
void OMAP_GPIO_168(void)
{
u32 i2c_2_scl;
i2c_2_scl = __raw_readw(OMAP2_L4_IO_ADDRESS(0x480021be));
i2c_2_scl = i2c_2_scl & ~(0x7 << 0);
// i2c_2_scl = i2c_2_scl |(1<<8)|(1<<4)|(1<<3)|(4<<0);
i2c_2_scl = i2c_2_scl |(1<<8)|(4<<0);
__raw_writew(i2c_2_scl,OMAP2_L4_IO_ADDRESS(0x480021be));
}
示例3: omap_irq_base_init
/*
* Initialize asm_irq_base for entry-macro.S
*/
static inline void omap_irq_base_init(void)
{
if (cpu_is_omap24xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
else if (cpu_is_omap34xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
else if (cpu_is_omap44xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
else
pr_err("Could not initialize omap_irq_base\n");
}
示例4: dra7xx_init_early
void __init dra7xx_init_early(void)
{
omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap2_control_base_init();
omap4_pm_init_early();
omap2_prcm_base_init();
dra7xxx_check_revision();
dra7xx_powerdomains_init();
dra7xx_clockdomains_init();
dra7xx_hwmod_init();
omap_hwmod_init_postsetup();
omap_clk_soc_init = dra7xx_dt_clk_init;
}
示例5: omap_irq_base_init
/*
* Initialize asm_irq_base for entry-macro.S
*/
static inline void omap_irq_base_init(void)
{
extern void __iomem *omap_irq_base;
#ifdef MULTI_OMAP2
if (cpu_is_omap24xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
else if (cpu_is_omap34xx() || cpu_is_ti81xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
else if (cpu_is_omap44xx())
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
else
pr_err("Could not initialize omap_irq_base\n");
#endif
}
示例6: detect_usb
int detect_usb()
{
u32 value;
int i=0;
u32 usb2phy;
//OTG_INTERFSEL PHY interface is 12-pin, 8-bit SDR ULPI
__raw_writel(0x1,OMAP2_L4_IO_ADDRESS(0x4a0a0000 + (0xb40c)));
__raw_writel(~PHY_PD, OMAP2_L4_IO_ADDRESS(0x4a000000 + (0x2300)));
usb2phy=__raw_readl(OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));
if(usb2phy&0x40000000 ){ //ROM code disable detectcharger function
__raw_writel(0,OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620))); //enable the detect charger fuction
}
while(1){
value=__raw_readl(OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));
usb2phy=value;
value&=0xE00000;value=value>>21;
i++;
if(value!=0)
break;
if(i>=20000000 || i<0)
break;
}
//printk("%s : usb2phy =0x%x value=0x%x i=%d\n",__func__,usb2phy,value,i);
switch(value){
case PHY_DETECT_PC:
printk("%s : Source is PC\n",__func__);
break;
case PHY_DETECT_DEDICATED_CHARGER:
printk("%s : Source is Dedicated charger\n",__func__);
break;
case PHY_DETECT_HOST_CHARGER:
printk("%s : USB HOST charger\n",__func__);
break;
case PHY_DETECT_INTERRUPT:
printk("%s : INTERRUPT \n",__func__);
break;
case PHY_DETECT_UNKNOW_ERROE:
printk("%s : Unknown error \n",__func__);
break;
case PHY_DETECT_NO_CONTACT:
printk("%s : No contact \n",__func__);
break;
default:
value=__raw_readl(OMAP2_L4_IO_ADDRESS(0x4a100000 + (0x620)));
//work around,need to fixed
//This will happen when boot by usb apapter without d+/d- shorter
if(value==0x80260)
value=PHY_DETECT_UNKNOW_ERROE;
printk("%s Detect Error:",__func__);
break;
}
//OTG_INTERFSEL PHY Embedded PHY interface is 8-bit, UTMI+
__raw_writel(0x0,OMAP2_L4_IO_ADDRESS(0x4a0a0000 + (0xb40c)));
__raw_writel(PHY_PD, OMAP2_L4_IO_ADDRESS(0x4a000000 + (0x2300)));
return value;
}
示例7: omap_writel
void omap_writel(u32 v, u32 pa)
{
if (cpu_class_is_omap1())
__raw_writel(v, OMAP1_IO_ADDRESS(pa));
else
__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
}
示例8: omap4_smp_init_cpus
/*
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
static void __init omap4_smp_init_cpus(void)
{
unsigned int i = 0, ncores = 1, cpu_id;
/* Use ARM cpuid check here, as SoC detection will not work so early */
cpu_id = read_cpuid_id() & CPU_MASK;
if (cpu_id == CPU_CORTEX_A9) {
/*
* Currently we can't call ioremap here because
* SoC detection won't work until after init_early.
*/
scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
BUG_ON(!scu_base);
ncores = scu_get_core_count(scu_base);
} else if (cpu_id == CPU_CORTEX_A15) {
ncores = OMAP5_CORE_COUNT;
}
/* sanity check */
if (ncores > nr_cpu_ids) {
pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
ncores, nr_cpu_ids);
ncores = nr_cpu_ids;
}
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
}
示例9: omap2_iommu_enable
static int omap2_iommu_enable(struct omap_iommu *obj)
{
u32 l, pa;
/*
* HACK: without this, we blow imprecise external abort on uEVM
* followed by L3 bus exception spew
*/
if (cpu_is_omap54xx()) {
pr_info("omap2_iommu_enable: doing Benelli reset HACK\n");
__raw_writel(3, OMAP2_L4_IO_ADDRESS(0x4AE06910));
/* We need some ugly wait here as reread or mb() are not
* sufficient... */
mdelay(500);
}
if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd, SZ_16K))
return -EINVAL;
pa = virt_to_phys(obj->iopgd);
if (!IS_ALIGNED(pa, SZ_16K))
return -EINVAL;
l = iommu_read_reg(obj, MMU_REVISION);
dev_info(obj->dev, "%s: version %d.%d\n", obj->name,
(l >> 4) & 0xf, l & 0xf);
iommu_write_reg(obj, pa, MMU_TTB);
__iommu_set_twl(obj, true);
return 0;
}
示例10: omap5_init_early
void __init omap5_init_early(void)
{
omap2_set_globals_tap(OMAP54XX_CLASS,
OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap2_control_base_init();
omap4_pm_init_early();
omap2_prcm_base_init();
omap5xxx_check_revision();
omap54xx_voltagedomains_init();
omap54xx_powerdomains_init();
omap54xx_clockdomains_init();
omap54xx_hwmod_init();
omap_hwmod_init_postsetup();
omap_clk_soc_init = omap5xxx_dt_clk_init;
}
示例11: smp_init_cpus
/*
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
void __init smp_init_cpus(void)
{
unsigned int i, ncores;
/*
* Currently we can't call ioremap here because
* SoC detection won't work until after init_early.
*/
scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE);
BUG_ON(!scu_base);
ncores = scu_get_core_count(scu_base);
/* sanity check */
if (ncores > NR_CPUS) {
printk(KERN_WARNING
"OMAP4: no. of cores (%d) greater than configured "
"maximum of %d - clipping\n",
ncores, NR_CPUS);
ncores = NR_CPUS;
}
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
}
示例12: smp_init_cpus
/*
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
void __init smp_init_cpus(void)
{
unsigned int i, ncores;
/*
* Currently we can't call ioremap here because
* SoC detection won't work until after init_early.
*/
scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE);
BUG_ON(!scu_base);
ncores = scu_get_core_count(scu_base);
/* sanity check */
if (ncores > nr_cpu_ids) {
pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
ncores, nr_cpu_ids);
ncores = nr_cpu_ids;
}
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);
}
示例13: omap_readl
u32 omap_readl(u32 pa)
{
if (cpu_class_is_omap1())
return __raw_readl(OMAP1_IO_ADDRESS(pa));
else
return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
}
示例14: dsp_wdt_init
int dsp_wdt_init(void)
{
int ret = 0;
dsp_wdt.sm_wdt = NULL;
dsp_wdt.reg_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_WDT3_BASE);
tasklet_init(&dsp_wdt.wdt3_tasklet, dsp_wdt_dpc, 0);
dsp_wdt.fclk = clk_get(NULL, "wdt3_fck");
if (dsp_wdt.fclk) {
dsp_wdt.iclk = clk_get(NULL, "wdt3_ick");
if (!dsp_wdt.iclk) {
clk_put(dsp_wdt.fclk);
dsp_wdt.fclk = NULL;
ret = -EFAULT;
}
} else
ret = -EFAULT;
if (!ret)
ret = request_irq(INT_34XX_WDT3_IRQ, dsp_wdt_isr, 0,
"dsp_wdt", &dsp_wdt);
/* Disable at this moment, it will be enabled when DSP starts */
if (!ret)
disable_irq(INT_34XX_WDT3_IRQ);
return ret;
}
示例15: ti81xx_init_early
void __init ti81xx_init_early(void)
{
omap2_set_globals_tap(OMAP343X_CLASS,
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
NULL);
omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
omap3xxx_clockdomains_init();
omap3xxx_hwmod_init();
omap_hwmod_init_postsetup();
omap3xxx_clk_init();
}