C++ NV_ARRAY_SIZE函数代码示例

void NvRmPrivIoPowerControlInit(NvRmDeviceHandle hRmDeviceHandle)
{
    NvU32 i, v;
    NvU32 NoIoPwrMask = 0;
    const NvOdmPeripheralConnectivity* pPmuRail = NULL;

    if (NvRmPrivGetExecPlatform(hRmDeviceHandle) != ExecPlatform_Soc)
    {
        // Invalidate IO Power detect map if not SoC platform
        for (i = 0; i < NV_ARRAY_SIZE(s_IoPowerDetectMap); i++)
            s_IoPowerDetectMap[i].PmuRailAddress = NV_RAIL_ADDR_INVALID;
        return;
    }

    for (i = 0; i < NV_ARRAY_SIZE(s_IoPowerDetectMap); i++)
    {
        // Fill in PMU rail addresses in IO Power detect map
        pPmuRail = NvOdmPeripheralGetGuid(s_IoPowerDetectMap[i].PowerRailId);
        NV_ASSERT(pPmuRail && pPmuRail->NumAddress);
        s_IoPowerDetectMap[i].PmuRailAddress = pPmuRail->AddressList[0].Address;

        // Find all unpowered rails
        v = NvRmPrivPmuRailGetVoltage(
            hRmDeviceHandle, s_IoPowerDetectMap[i].PowerRailId);
        if (v == ODM_VOLTAGE_OFF)
            NoIoPwrMask |= s_IoPowerDetectMap[i].DisableRailMask;
    }

    // Latch already powered IO rails
    NvRmPrivIoPowerDetectLatch(hRmDeviceHandle);

    // Disable IO pads for unpowered rails
    if (NoIoPwrMask)
        NvRmPrivIoPowerControl(hRmDeviceHandle, NoIoPwrMask, NV_FALSE);
}

const NvOdmUsbProperty *NvOdmQueryGetUsbProperty(
    NvOdmIoModule Module,
    NvU32 Instance)
{
    static const NvOdmUsbProperty usb[] =
    {
        {
            NvOdmUsbInterfaceType_Utmi,
            (NvOdmUsbChargerType_SE0 | NvOdmUsbChargerType_SE1 |
            NvOdmUsbChargerType_SK),
            20, NV_TRUE, NvOdmUsbModeType_Device, NvOdmUsbIdPinType_CableId,
            NvOdmUsbConnectorsMuxType_None, NV_TRUE, { 0, 0, 0, 0 }
        },
        {
            NvOdmUsbInterfaceType_UlpiExternalPhy,
            NvOdmUsbChargerType_UsbHost,
            20, NV_TRUE, NvOdmUsbModeType_Host, NvOdmUsbIdPinType_None,
            NvOdmUsbConnectorsMuxType_None, NV_TRUE, { 0, 0, 0, 0 }
        },
        {
            NvOdmUsbInterfaceType_Utmi,
            NvOdmUsbChargerType_UsbHost,
            20, NV_TRUE, NvOdmUsbModeType_Host, NvOdmUsbIdPinType_None,
            NvOdmUsbConnectorsMuxType_None, NV_TRUE, { 0, 0, 0, 0 }
        },
    };

    if (Module != NvOdmIoModule_Usb || Instance >= NV_ARRAY_SIZE(usb))
        return NULL;

    return &usb[Instance];
}

NvBool NvOdmMouseEnableInterrupt(
    NvOdmMouseDeviceHandle hDevice, 
    NvOdmOsSemaphoreHandle hInterruptSemaphore)
{
    NvError Status = NvSuccess;
    NvEcEventType EventTypes[] = {
        (NvEcEventType) (NvEcEventType_AuxDevice0 + MOUSE_PS2_PORT_ID_0),
        (NvEcEventType) (NvEcEventType_AuxDevice0 + MOUSE_PS2_PORT_ID_1)
    };

    Status = NvEcRegisterForEvents(
        hDevice->hEc,
        &hDevice->hEcEventRegister,
        (NvOsSemaphoreHandle)hInterruptSemaphore,
        NV_ARRAY_SIZE(EventTypes), // number of EventType's
        EventTypes,                // Auxillary 0 event
        1,                         // One event packet is expected
        // event packet size = packet overhead + size of the mouse sample;
        // max sample size is 4 bytes (for an Intellimouse 5-button mouse)
        NVEC_MIN_EVENT_SIZE+4); 

    if (Status != NvSuccess)
        return NV_FALSE;

    return NV_TRUE;
}

const NvOdmWakeupPadInfo *NvOdmQueryGetWakeupPadTable(NvU32 *pSize)
{
    if (pSize)
        *pSize = NV_ARRAY_SIZE(s_NvOdmWakeupPadInfo);

    return (const NvOdmWakeupPadInfo *) s_NvOdmWakeupPadInfo;
}

NvU32
NvOdmKbcKeyMappingGetVirtualKeyMappingList(
    const struct NvOdmKeyVirtTableDetail ***pVirtKeyTableList)
{
   *pVirtKeyTableList = s_pVirtualKeyTables;
   return NV_ARRAY_SIZE(s_pVirtualKeyTables);
}

const NvOdmQueryDapPortProperty *
NvOdmQueryDapPortGetProperty(
    NvU32 DapPortId)
{
    if (DapPortId > 0 && DapPortId < NV_ARRAY_SIZE(s_NvOdmQueryDapPortInfoTable) )
        return &s_NvOdmQueryDapPortInfoTable[DapPortId];

    return NULL;
}

NvU32
NvOdmQueryPinAttributes(const NvOdmPinAttrib** pPinAttributes)
{
    if (pPinAttributes)
    {
        *pPinAttributes = &pin_config[0];
        return NV_ARRAY_SIZE(pin_config);
    }
    return 0;
}

void
Adt7461ParameterCapsGet(
    NvOdmTmonDeviceHandle hTmon,
    NvOdmTmonZoneID ZoneId,
    NvOdmTmonConfigParam ParamId,
    NvOdmTmonParameterCaps* pCaps)
{
    NvBool ExtRange;
    ADT7461PrivData* pPrivData;
    const ADT7461ChannelInfo* pChannel;

    NV_ASSERT(hTmon && hTmon->pPrivate && pCaps);
    pPrivData = hTmon->pPrivate;
#if PRE_ER_GMT_THERMALSENSOR
    ExtRange = 0; /* not support ADT thermal sensor*/
#else
    ExtRange = ((pPrivData->ShadowConfig &
                 ADT7461ConfigBits_ExtendedRange) != 0);
#endif			

    pChannel = &pPrivData->pDeviceInfo->Channels[(
        pPrivData->ConnectivityMap[ZoneId])];

    switch (ParamId)
    {
        case NvOdmTmonConfigParam_IntrLimitHigh:
        case NvOdmTmonConfigParam_IntrLimitLow:
            pCaps->OdmProtected =
                pChannel->ChannelPolicy.IntrLimitsOdmProtected;
            break;

        case NvOdmTmonConfigParam_HwLimitCrit:
            pCaps->OdmProtected =
                pChannel->ChannelPolicy.HwLimitCritOdmProtected;
            break;

        case NvOdmTmonConfigParam_SampleMs:
            // smaple intervals in descending order
            pCaps->MaxValue = s_Adt7461SampleIntervalsMS[0];
            pCaps->MinValue = s_Adt7461SampleIntervalsMS[(
                NV_ARRAY_SIZE(s_Adt7461SampleIntervalsMS) - 1)];
            pCaps->OdmProtected = pChannel->ChannelPolicy.RateOdmProtected;
            return;

        default:        // unsupported parameter
            pCaps->MaxValue = ODM_TMON_PARAMETER_UNSPECIFIED;
            pCaps->MinValue = ODM_TMON_PARAMETER_UNSPECIFIED;
            pCaps->OdmProtected = NV_TRUE;
            return;
    }

    // Common range for limits
    pCaps->MaxValue = ADT7461_T_RANGE_LIMIT_HIGH(ExtRange);
    pCaps->MinValue = ADT7461_T_RANGE_LIMIT_LOW(ExtRange);
}

NvU32 
NvOdmKbcKeyMappingGetVirtualKeyMappingList(
    const struct NvOdmKeyVirtTableDetail ***pVirtKeyTableList)
{

   if (HWREV_REV(system_rev) <= HWREV_REV_1C)
	s_ScvkKeyMap.pVirtualKeyTable = KbcLayOutVirtualKey_P1C;


   *pVirtKeyTableList = s_pVirtualKeyTables;
   return NV_ARRAY_SIZE(s_pVirtualKeyTables);
}

static NvBool
Adt7461ConfigureSampleInterval(
    ADT7461PrivData* pPrivData,
    NvBool OdmProtected,
    NvS32* pTargetMs)
{
    NvU8 i;
    NvS32 Delta;
    const ADT7461RegisterInfo* pReg = &pPrivData->pDeviceInfo->Rate;

    if (OdmProtected ||
        ((*pTargetMs) == ODM_TMON_PARAMETER_UNSPECIFIED))
    {
        // Read ADT7461 rate register (fail the call if returned data
        // does not make sense)
        if(!Adt7461ReadReg(pPrivData, pReg, &i))
            return NV_FALSE;
        if (i >= NV_ARRAY_SIZE(s_Adt7461SampleIntervalsMS))
            return NV_FALSE;
    }
    else
    {
        // Find and set the best floor approximation of the target sample
        // interval. Note the descending order of sample intervals array.
        for (i = 0; i < NV_ARRAY_SIZE(s_Adt7461SampleIntervalsMS); i++)
        {
            Delta = (*pTargetMs) - s_Adt7461SampleIntervalsMS[i];
            if(Delta >= 0)
                break;
        }
        if (i == NV_ARRAY_SIZE(s_Adt7461SampleIntervalsMS))
            i--;    // min interval is the best we can do

        if(!Adt7461WriteReg(pPrivData, pReg, i))
            return NV_FALSE;
        pPrivData->ShadowRate = i;
    }
    *pTargetMs = s_Adt7461SampleIntervalsMS[i];
    return NV_TRUE;
}

const NvOdmGpioPinInfo *NvOdmQueryGpioPinMap(NvOdmGpioPinGroup Group,
    NvU32 Instance, NvU32 *pCount)
{
    switch (Group)
    {
        case NvOdmGpioPinGroup_Display:
            *pCount = NV_ARRAY_SIZE(s_display);
            return s_display;

        case NvOdmGpioPinGroup_Hdmi:
            *pCount = NV_ARRAY_SIZE(s_hdmi);
            return s_hdmi;

        case NvOdmGpioPinGroup_Sdio:
            if (Instance == 2)
            {
                *pCount = NV_ARRAY_SIZE(s_sdio);
                return s_sdio;
            }
            else
            {
                *pCount = 0;
                return NULL;
            }

        case NvOdmGpioPinGroup_Bluetooth:
            *pCount = NV_ARRAY_SIZE(s_Bluetooth);
            return s_Bluetooth;

        case NvOdmGpioPinGroup_Wlan:
            *pCount = NV_ARRAY_SIZE(s_Wlan);
            return s_Wlan;

        case NvOdmGpioPinGroup_Vi:
            *pCount = NV_ARRAY_SIZE(s_vi);
            return s_vi;

        case NvOdmGpioPinGroup_keypadMisc:
                *pCount = NV_ARRAY_SIZE(s_GpioKeyBoard);
                return s_GpioKeyBoard;

        case NvOdmGpioPinGroup_Battery:
            *pCount = NV_ARRAY_SIZE(s_Battery);
            return s_Battery;

        default:
            *pCount = 0;
            return NULL;
    }
}

const NvOdmQueryDapPortConnection*
NvOdmQueryDapPortGetConnectionTable(
    NvU32 ConnectionIndex)
{
    NvU32 TableIndex   = 0;
    for( TableIndex = 0; 
         TableIndex < NV_ARRAY_SIZE(s_NvOdmQueryDapPortConnectionTable);
         TableIndex++)
    {
        if (s_NvOdmQueryDapPortConnectionTable[TableIndex].UseIndex 
                                                    == ConnectionIndex)
            return &s_NvOdmQueryDapPortConnectionTable[TableIndex];
    }
    return NULL;
}

const NvOdmQuerySdioInterfaceProperty* NvOdmQueryGetSdioInterfaceProperty(
    NvU32 Instance)
{
    static const NvOdmQuerySdioInterfaceProperty sdio[] =
    {
        { NV_FALSE, 10, NV_TRUE, 0x8, NvOdmQuerySdioSlotUsage_wlan   },
        { NV_FALSE,  0, NV_FALSE, 0, NvOdmQuerySdioSlotUsage_unused  },
        { NV_TRUE,   0, NV_FALSE, 0x6, NvOdmQuerySdioSlotUsage_Media },
        { NV_FALSE,  0, NV_FALSE, 0x4, NvOdmQuerySdioSlotUsage_Boot  },
    };

    if (Instance < NV_ARRAY_SIZE(sdio))
        return &sdio[Instance];

    return NULL;
}

static void
UsbPhyOpenHwInterface(
    NvDdkUsbPhyHandle hUsbPhy)
{
    static NvDdkUsbPhyCapabilities s_UsbPhyCap[] =
    {
        //  AP15
        { NV_FALSE, NV_FALSE },
        //  AP16
        { NV_FALSE, NV_TRUE },
        //  AP20
        { NV_TRUE, NV_FALSE},
    };
    NvDdkUsbPhyCapabilities *pUsbfCap = NULL;
    NvRmModuleCapability s_UsbPhyCaps[] =
    {
        {1, 0, 0, &s_UsbPhyCap[0]},  // AP15 A01
        {1, 1, 0, &s_UsbPhyCap[0]},  // AP15 A02
        {1, 2, 0, &s_UsbPhyCap[1]},  // AP16, USB1
        {1, 3, 0, &s_UsbPhyCap[1]},  // AP16, USB2
        {1, 5, 0, &s_UsbPhyCap[2]}, // AP20, USB1
        {1, 6, 0, &s_UsbPhyCap[2]}, // AP20, USB2
        {1, 7, 0, &s_UsbPhyCap[2]}, // AP20, USB3
    };

    NV_ASSERT_SUCCESS(
        NvRmModuleGetCapabilities(hUsbPhy->hRmDevice,
            NVRM_MODULE_ID(NvRmModuleID_Usb2Otg, hUsbPhy->Instance),
            s_UsbPhyCaps, NV_ARRAY_SIZE(s_UsbPhyCaps),
            (void**)&pUsbfCap));

    // Fill the client capabilities structure.
    NvOsMemcpy(&hUsbPhy->Caps, pUsbfCap, sizeof(NvDdkUsbPhyCapabilities));

    //NvOsDebugPrintf("NvDdkUsbPhyCapabilities::\n");
    //NvOsDebugPrintf("PhyRegInController::[%d] 0-FALSE 1-TRUE\n", hUsbPhy->Caps.PhyRegInController);
    //NvOsDebugPrintf("CommonClockAndReset::[%d] 0-FALSE 1-TRUE\n", hUsbPhy->Caps.CommonClockAndReset);

    if (hUsbPhy->Caps.PhyRegInController)
    {
        //NvOsDebugPrintf("AP20 USB Controllers\n");
        Ap20UsbPhyOpenHwInterface(hUsbPhy);
    }
}

static void IoPowerMapRail(
    NvU32 PmuRailAddress,
    NvU32* pIoPwrDetectMask,
    NvU32* pNoIoPwrMask)
{
    NvU32 i;
    *pIoPwrDetectMask = 0;
    *pNoIoPwrMask = 0;

    // Find all power detect cells and controls on this IO rail
    for (i = 0; i < NV_ARRAY_SIZE(s_IoPowerDetectMap); i++)
    {
        if (s_IoPowerDetectMap[i].PmuRailAddress == PmuRailAddress)
        {
            *pIoPwrDetectMask |= s_IoPowerDetectMap[i].EnablePwrDetMask;
            *pNoIoPwrMask |= s_IoPowerDetectMap[i].DisableRailMask;
        }
    }
}