C++ NVIC_SetPriorityGrouping函数代码示例

extern "C" void Reset_Handler()
{
  /* 4 bits for preemption priority */
  NVIC_SetPriorityGrouping(4);

  /* enable data/instruction cache, set wait cycles, set flash latency */
  FLASH->ACR |= FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN | FLASH_ACR_LATENCY_5WS;

  assert(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) == FLASH_ACR_LATENCY_5WS);

  /* enable FPU if needed */
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
  /* enable coprocessors CP10 and CP11 */
  SCB->CPACR |= (0x0f << 20);
#endif

  clock_init();

  /* data initialization */
  memcpy(&__data_start__, &__etext, (intptr_t)&__data_end__ - (intptr_t)&__data_start__);
  memcpy(&__data2_start__, &__etext2, (intptr_t)&__data2_end__ - (intptr_t)&__data2_start__);
  memset(&__bss_start__, 0, (intptr_t)&__bss_end__ - (intptr_t)&__bss_start__);
  memset(&__bss2_start__, 0, (intptr_t)&__bss2_end__ - (intptr_t)&__bss2_start__);

  /* set interrupt vector table offset */
  SCB->VTOR = (uint32_t)&interruptVectorTable;

  /* c++ constructors */
  __libc_init_array();

  gpio_init();
  i2s_init();

  main();
}

int main(void)
{
  leds.initHW();

  NVIC_SetPriorityGrouping( NVIC_PriorityGroup_4 );

  leds.write( 0x0F );  delay_bad_ms( 200 );
  leds.write( 0x0A );  delay_bad_ms( 200 );
  leds.reset( 0x0F );  delay_bad_ms( 200 );

  xTaskCreate( task_leds, "leds", 2*def_stksz, 0, 1, 0 );
  xTaskCreate( task_usart2_send, "send", 2*def_stksz, 0, 1, 0 );
  xTaskCreate( task_usart2_recv, "recv", 2*def_stksz, 0, 1, 0 );
  xTaskCreate( task_string_send, "ss",     def_stksz, 0, 1, 0 );

  us2.initIRQ( configKERNEL_INTERRUPT_PRIORITY, 0 );
  us2.initHW();
  us2.init();
  us2.itConfig( USART_IT_RXNE, ENABLE );
  us2.setOnRecv( on_received_char );
  us2.enable();

  vTaskStartScheduler();
  die4led( 0xFF );

  return 0;
}

void IRQportableStartKernel()
{
    //Enable fault handlers
    SCB->SHCSR |= SCB_SHCSR_USGFAULTENA | SCB_SHCSR_BUSFAULTENA
            | SCB_SHCSR_MEMFAULTENA;
    //Enable traps for unaligned memory access and division by zero
    SCB->CCR |= SCB_CCR_DIV_0_TRP | SCB_CCR_UNALIGN_TRP;
    NVIC_SetPriorityGrouping(7);//This should disable interrupt nesting
    NVIC_SetPriority(SVCall_IRQn,3);//High priority for SVC (Max=0, min=15)
    NVIC_SetPriority(SysTick_IRQn,3);//High priority for SysTick (Max=0, min=15)
    SysTick->LOAD=SystemCoreClock/miosix::TICK_FREQ;
    //Start SysTick, set to generate interrupts
    SysTick->CTRL=SysTick_CTRL_ENABLE | SysTick_CTRL_TICKINT |
            SysTick_CTRL_CLKSOURCE;

    #ifdef SCHED_TYPE_CONTROL_BASED
    AuxiliaryTimer::IRQinit();
    #endif //SCHED_TYPE_CONTROL_BASED
    
    //create a temporary space to save current registers. This data is useless
    //since there's no way to stop the sheduler, but we need to save it anyway.
    unsigned int s_ctxsave[miosix::CTXSAVE_SIZE];
    ctxsave=s_ctxsave;//make global ctxsave point to it
    //Note, we can't use enableInterrupts() now since the call is not mathced
    //by a call to disableInterrupts()
    __enable_fault_irq();
    __enable_irq();
    miosix::Thread::yield();
    //Never reaches here
}

/**
 * \brief Configure the hardware.
 */
static void prvSetupHardware(void)
{
#ifdef EXAMPLE_LCD_SIGNALLING_ENABLE
	status_code_t status;
#endif

	/* ASF function to setup clocking. */
	sysclk_init();

	/* Ensure all priority bits are assigned as preemption priority bits. */
	NVIC_SetPriorityGrouping(__NVIC_PRIO_BITS);

	/* Atmel library function to setup for the evaluation kit being used. */
	board_init();

	/* PLC HAL service initialization */
	hal_init();
	hal_start();

#ifdef EXAMPLE_LCD_SIGNALLING_ENABLE
	/* Initialize the C42364A LCD glass component. */
	status = c42364a_init();
	if (status != STATUS_OK) {
		puts("-- LCD Initialization fails! --\r\n");
		while (1) {
		}
	}

	c42364a_set_contrast(15);
	c42364a_clear_all();
	c42364a_show_icon(C42364A_ICON_ATMEL);
	c42364a_show_icon(C42364A_ICON_WLESS);
	c42364a_show_text((const uint8_t *)"SERV  ");
#endif
}

/**
 * This function will initial M487 board.
 */
void rt_hw_board_init(void)
{
    clock_init();

#ifdef RT_USING_HEAP
#ifdef __CC_ARM
    rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)SRAM_END);
#elif __ICCARM__
    rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
#else
    /* init memory system */
    rt_system_heap_init((void*)&__bss_end, (void*)&__ram_top);
#endif
#endif /* RT_USING_HEAP */

    rt_hw_uart_init();

#ifdef RT_USING_CONSOLE
    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif

    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
	
	NVIC_SetPriorityGrouping(7);
	
#ifdef RT_USING_COMPONENTS_INIT
    rt_components_board_init();
#endif
}

void SystemInit(void)
{
    DBG_FWsim_Log("SystemInit\n");

    /* PingPong Buffer Init */
    PPB_Init();

    /* Enable the memory management fault , Bus Fault, Usage Fault exception */
    //SCB->SHCSR |= (SCB_SHCSR_MEMFAULTENA_Msk | SCB_SHCSR_BUSFAULTENA_Msk | SCB_SHCSR_USGFAULTENA_Msk);

    /* Ensure all priority bits are assigned as preemption priority bits. */
    NVIC_SetPriorityGrouping( 0 );

    #if (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2) |                 /* set CP10 Full Access */
                   (3UL << 11*2)  );               /* set CP11 Full Access */
    #endif

    #ifdef UNALIGNED_SUPPORT_DISABLE
    SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
    #endif

    // relocate vector table to internal ram
    // updates also VTOR
    // TODO
}

static void TIM2_CFG(  )
{
  TIM_TIMERCFG_Type TMR2_Cfg;
  TIM_MATCHCFG_Type TMR2_Match;

  /* On reset, Timer0/1 are enabled (PCTIM0/1 = 1), and Timer2/3 are disabled (PCTIM2/3 = 0).*/
  /* Initialize timer 0, prescale count time of 100uS */
  TMR2_Cfg.PrescaleOption = TIM_PRESCALE_USVAL;
  TMR2_Cfg.PrescaleValue = 10000;
  /* Use channel 0, MR0 */
  TMR2_Match.MatchChannel = 0;
  /* Enable interrupt when MR0 matches the value in TC register */
  TMR2_Match.IntOnMatch = ENABLE;
  /* Enable reset on MR0: TIMER will reset if MR0 matches it */
  TMR2_Match.ResetOnMatch = FALSE;
  /* Don't stop on MR0 if MR0 matches it*/
  TMR2_Match.StopOnMatch = TRUE;
  /* Do nothing for external output pin if match (see cmsis help, there are another options) */
  TMR2_Match.ExtMatchOutputType = TIM_EXTMATCH_NOTHING;
  /* Set Match value, count value of 2 (2 * 100uS = 200us ) */
  TMR2_Match.MatchValue = 250;
  /* Set configuration for Tim_config and Tim_MatchConfig */
  TIM_Init(LPC_TIM2, TIM_TIMER_MODE, &TMR2_Cfg);
  TIM_ConfigMatch(LPC_TIM2, &TMR2_Match);

  NVIC_SetPriorityGrouping(3);
  /* Preemption = 1, sub-priority = 1 */
  NVIC_SetPriority(TIMER2_IRQn, 2);
  /* Enable interrupt for timer 0 */
  NVIC_EnableIRQ(TIMER2_IRQn);
  /* Start timer 0 */
  TIM_Cmd(LPC_TIM2, ENABLE);
}

/**
 * @brief  Sets the priority grouping field (preemption priority and subpriority)
 *         using the required unlock sequence.
 * @param  PriorityGroup: The priority grouping bits length. 
 *         This parameter can be one of the following values:
 *         @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
 *                                    4 bits for subpriority
 *         @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
 *                                    3 bits for subpriority
 *         @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
 *                                    2 bits for subpriority
 *         @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
 *                                    1 bits for subpriority
 *         @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
 *                                    0 bits for subpriority
 * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. 
 *         The pending IRQ priority will be managed only by the subpriority. 
 * @retval None
 */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {
	/* Check the parameters */
	assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));

	/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
	NVIC_SetPriorityGrouping(PriorityGroup);
}

static void prvSetupHardware( void )
{
extern void SystemCoreClockUpdate( void );
struct eic_line_config xEICLineConfiguration;

	/* Configure the external interrupt controller so button pushes can
	generate interrupts. */
	xEICLineConfiguration.eic_mode = EIC_MODE_EDGE_TRIGGERED;
	xEICLineConfiguration.eic_edge = EIC_EDGE_FALLING_EDGE;
	xEICLineConfiguration.eic_level = EIC_LEVEL_LOW_LEVEL;
	xEICLineConfiguration.eic_filter = EIC_FILTER_DISABLED;
	xEICLineConfiguration.eic_async = EIC_ASYNCH_MODE;
	eic_enable( EIC );
	eic_line_set_config( EIC, GPIO_PUSH_BUTTON_EIC_LINE, &xEICLineConfiguration );
	eic_line_set_callback( EIC, GPIO_PUSH_BUTTON_EIC_LINE, prvButtonISR, EIC_5_IRQn, 0 );
	eic_line_enable( EIC, GPIO_PUSH_BUTTON_EIC_LINE );

	/* ASF function to setup clocking. */
	sysclk_init();

	/* Ensure all priority bits are assigned as preemption priority bits. */
	NVIC_SetPriorityGrouping( 0 );

	/* Atmel library function to setup for the evaluation kit being used. */
	board_init();

	/* Initialise the sleep manager in case the low power demo is being used. */
	sleepmgr_init();
}

void DAVE_Init(void)
{
          
    //  NVIC Priority Grouping
    NVIC_SetPriorityGrouping(1);

//****************************************************************************
// @Initialization of APPs Init Functions
//****************************************************************************
	//  MUX configurations
	DAVE_MUX_PreInit(); 
	//  Initialization of app 'CLK001'		     
	CLK001_Init();
	 
	//  Initialization of app 'SYSTM001'		     
	SYSTM001_Init();
	 
	//  Initialization of app 'I2C001'		     
	I2C001_Init();
	 
	//  Initialization of app 'NVIC002'		     
	NVIC002_Init();
	
      
	//  MUX configurations
	DAVE_MUX_Init();	
} //  End of function DAVE_Init

void platform_init_peripheral_irq_priorities( void )
{
    uint32_t i;
    uint32_t minPri = (1<<__NVIC_PRIO_BITS) - 1 - 1;
    NVIC_SetPriorityGrouping(0x00000000);

    for (i=0; i<48; i++)
    {
        // NVIC->IP[i] = 0xC0;
        NVIC_SetPriority((IRQn_Type)i, minPri);
    }
    NVIC_SetPriority(SysTick_IRQn, minPri);
    /* Interrupt priority setup. Called by WICED/platform/MCU/STM32F2xx/platform_init.c */
    NVIC_SetPriority( RTC_IRQn         ,  minPri ); /* RTC Wake-up event   */
    NVIC_SetPriority( SPI0_IRQn        ,  minPri ); /* SPI0          */
    NVIC_SetPriority( SPI1_IRQn        ,  3 ); /* WLAN SDIO           */
    NVIC_SetPriority( DMA_IRQn         ,  3 ); /* WLAN SPI DMA        */
    NVIC_SetPriority( UART0_IRQn       ,  minPri - 1); /* MICO_UART_0         */
    NVIC_SetPriority( UART1_IRQn       ,  minPri - 1); /* MICO_UART_1         */
    NVIC_SetPriority( UART2_IRQn       ,  minPri - 1); /* MICO_UART_2         */
    NVIC_SetPriority( UART3_IRQn       ,  minPri - 1); /* MICO_UART_3         */
    NVIC_SetPriority( I2C0_IRQn        ,  minPri ); /* MICO_I2C_0         */
    NVIC_SetPriority( I2C1_IRQn        ,  minPri ); /* MICO_I2C_1         */
    NVIC_SetPriority( I2C2_IRQn        ,  minPri ); /* MICO_I2C_2         */

    NVIC_SetPriority( PIN_INT0_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT1_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT2_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT3_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT4_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT5_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT6_IRQn    , minPri ); /* GPIO                */
    NVIC_SetPriority( PIN_INT7_IRQn    , minPri ); /* GPIO                */
}

int main(void)
{
    DelayInit();
    GPIO_QuickInit(HW_GPIOE, 6, kGPIO_Mode_OPP);
    UART_QuickInit(UART0_RX_PD06_TX_PD07, 115200);
    
    /* 设置PORTE PORTA 中断 */
    GPIO_QuickInit(HW_GPIOE,26, kGPIO_Mode_IPU);
    GPIO_QuickInit(HW_GPIOA, 4, kGPIO_Mode_IPU);
    GPIO_CallbackInstall(HW_GPIOE, PORTE_ISR);
    GPIO_CallbackInstall(HW_GPIOA, PORTA_ISR);
    GPIO_ITDMAConfig(HW_GPIOE, 26, kGPIO_IT_RisingEdge, true);
    GPIO_ITDMAConfig(HW_GPIOA, 4,  kGPIO_IT_RisingEdge, true);
    
    printf("NVIC test connect E26&A04\r\n");
    /* 将系统 中断优先级分组 可以配置 16个 抢占优先级 和16个 子优先级 */
    NVIC_SetPriorityGrouping(NVIC_PriorityGroup_2);  //中断优先级分成2组
    NVIC_SetPriority(PORTE_IRQn, NVIC_EncodePriority(NVIC_PriorityGroup_2, 2, 2)); //设置PTE端口的抢占优先级的子优先级
    NVIC_SetPriority(PORTA_IRQn, NVIC_EncodePriority(NVIC_PriorityGroup_2, 2, 2));
    
    while(1)
    {
        GPIO_ToggleBit(HW_GPIOE, 6);
        DelayMs(500);
    }
}

int main (void)
{
	/* Initialize the SAM system */
	sysclk_init();
	
	/* Initialize mcu's peripheral.*/
	board_init();
	
	/* Initialize the console uart */
	configure_console();
	
	/* Output demo information. */
	RS232printf("\n\r-- FreeRTOS Example --\n\r");
	
	/* Initialize the SPI0. */
//	spi_set_clock_configuration(0);
	
	/* Ensure all priority bits are assigned as preemption priority bits. */
	NVIC_SetPriorityGrouping( 0 );
		
	/* Create freeRTOS START task.*/
	xTaskCreate(task_start, (signed char *)"START", TASK_START_STACKSIZE, NULL,
				TASK_START_PRIORITY, NULL);
	
	/* Start the scheduler. */
	vTaskStartScheduler();
	
	/* Will only get here if there was insufficient memory to create the idle task. */
	return 0;
}

// The kernel is the central point in Smoothie : it stores modules, and handles event calls
Kernel::Kernel(){
    instance= this; // setup the Singleton instance of the kernel

    // serial first at fixed baud rate (DEFAULT_SERIAL_BAUD_RATE) so config can report errors to serial
    // Set to UART0, this will be changed to use the same UART as MRI if it's enabled
    this->serial = new SerialConsole(USBTX, USBRX, DEFAULT_SERIAL_BAUD_RATE);

    // Config next, but does not load cache yet
    // loads config from in memory source for test framework must be loaded by test
    this->config = nullptr;

    this->streams = new StreamOutputPool();
    this->streams->append_stream(this->serial);

    this->current_path   = "/";

    this->slow_ticker = new SlowTicker();

    // dummies (would be nice to refactor to not have to create a conveyor)
    this->conveyor= new Conveyor();

    // Configure UART depending on MRI config
    // Match up the SerialConsole to MRI UART. This makes it easy to use only one UART for both debug and actual commands.
    NVIC_SetPriorityGrouping(0);
    NVIC_SetPriority(UART0_IRQn, 5);
}

void HW_NVIC_init(void)
{

    // There are 3 bits of priority implemented in MDR32F9Qx device
    // Setting all bits to pre-emption, see link below
    // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/BABHGEAJ.html
    NVIC_SetPriorityGrouping( 3 );

    pr[0] = NVIC_GetPriority(SVCall_IRQn);
    pr[1] = NVIC_GetPriority(PendSV_IRQn);
    pr[2] = NVIC_GetPriority(SysTick_IRQn);
    pr[3] = NVIC_GetPriority(DMA_IRQn);
    pr[4] = NVIC_GetPriority(Timer2_IRQn);

    NVIC_SetPriority(DMA_IRQn,6);
    NVIC_SetPriority(Timer2_IRQn,6);

    pr[0] = NVIC_GetPriority(SVCall_IRQn);
    pr[1] = NVIC_GetPriority(PendSV_IRQn);
    pr[2] = NVIC_GetPriority(SysTick_IRQn);
    pr[3] = NVIC_GetPriority(DMA_IRQn);
    pr[4] = NVIC_GetPriority(Timer2_IRQn);


}