本文整理汇总了C++中MASK函数的典型用法代码示例。如果您正苦于以下问题:C++ MASK函数的具体用法?C++ MASK怎么用?C++ MASK使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了MASK函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: getncpus
int
getncpus(void)
{
int n;
char *p;
Scu *scu;
if (navailcpus == 0) {
scu = (Scu *)soc.scu;
navailcpus = (scu->cfg & MASK(2)) + 1;
if (navailcpus > MAXMACH)
navailcpus = MAXMACH;
p = getconf("*ncpu");
if (p && *p) {
n = atoi(p);
if (n > 0 && n < navailcpus)
navailcpus = n;
}
}
return navailcpus;
}
示例2: mcpPciDriver_unregisterInterrupt
void mcpPciDriver_unregisterInterrupt(struct mcpPciDriver_dev *devp) {
volatile unsigned int *oc_intcsr = (unsigned int *)
devp->pciBase[0] + OPENCORES_PCI_INTCR;
volatile unsigned int *intcsr = (unsigned int *)
devp->pciBase[1] + TEST_INTCSR;
unsigned int val;
if (!devp->irq_usage) {
// nothing to do
return;
}
if (--devp->irq_usage) {
// nothing to do, still in use
return;
}
// Disable master interrupt
val = readl(intcsr);
writel(MASK(val, TEST_INTCSR_MASTER), intcsr);
// That's all we need to do.
free_irq(devp->dev->irq, devp);
}
示例3: ioapic_map_pin_to_vector
void ioapic_map_pin_to_vector(word_t ioapic, word_t pin, word_t level,
word_t polarity, word_t vector)
{
uint32_t ioredtbl_high = 0;
uint32_t index = 0;
index = ioapic * IOAPIC_IRQ_LINES + pin;
ioapic_write(ioapic, IOAPIC_REGSEL, IOREDTBL_HIGH(pin));
ioredtbl_high = ioapic_read(ioapic, IOAPIC_WINDOW) & MASK(IOREDTBL_HIGH_RESERVED_BITS);
/* delivery mode: physical mode only, using APIC ID */
ioredtbl_high |= (ioapic_target_cpu << IOREDTBL_HIGH_RESERVED_BITS);
ioapic_write(ioapic, IOAPIC_WINDOW, ioredtbl_high);
/* we do not need to add IRQ_INT_OFFSET to the vector here */
ioredtbl_state[index] = IOREDTBL_LOW_INTERRUPT_MASK |
(level << IOREDTBL_LOW_TRIGGER_MODE_SHIFT) |
(polarity << IOREDTBL_LOW_POLARITY_SHIFT) |
vector;
ioapic_write(ioapic, IOAPIC_REGSEL, IOREDTBL_LOW(pin));
/* the upper 16 bits are reserved */
ioredtbl_state[index] |= ioapic_read(ioapic, IOAPIC_WINDOW) & ~MASK(16);
ioapic_write(ioapic, IOAPIC_WINDOW, ioredtbl_state[index]);
}
示例4: gm20b_clk_init
static int
gm20b_clk_init(struct nvkm_clk *base)
{
struct gk20a_clk *clk = gk20a_clk(base);
struct nvkm_subdev *subdev = &clk->base.subdev;
struct nvkm_device *device = subdev->device;
int ret;
/* Set the global bypass control to VCO */
nvkm_mask(device, BYPASSCTRL_SYS,
MASK(BYPASSCTRL_SYS_GPCPLL_WIDTH) << BYPASSCTRL_SYS_GPCPLL_SHIFT,
0);
/* Start with lowest frequency */
base->func->calc(base, &base->func->pstates[0].base);
ret = base->func->prog(&clk->base);
if (ret) {
nvkm_error(subdev, "cannot initialize clock\n");
return ret;
}
return 0;
}
示例5: dcache_alloc
static struct dcache_block *
dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
{
struct dcache_block *db;
/* Take something from the free list */
db = dcache->free_head;
if (db)
{
dcache->free_head = db->p;
}
else
{
/* Nothing left on free list, so grab one from the valid list */
db = dcache->valid_head;
if (!dcache_write_line (dcache, db))
return NULL;
dcache->valid_head = db->p;
}
db->addr = MASK(addr);
db->refs = 0;
db->anydirty = 0;
memset (db->state, ENTRY_BAD, sizeof (db->data));
/* append this line to end of valid list */
if (!dcache->valid_head)
dcache->valid_head = db;
else
dcache->valid_tail->p = db;
dcache->valid_tail = db;
db->p = 0;
return db;
}
示例6: Arch_setMRs_fault
word_t
Arch_setMRs_fault(tcb_t *sender, tcb_t* receiver, word_t *receiveIPCBuffer, word_t faultType)
{
switch (faultType) {
case seL4_Fault_VMFault: {
if (config_set(CONFIG_ARM_HYPERVISOR_SUPPORT)) {
word_t ipa, va;
va = getRestartPC(sender);
ipa = (addressTranslateS1CPR(va) & ~MASK(PAGE_BITS)) | (va & MASK(PAGE_BITS));
setMR(receiver, receiveIPCBuffer, seL4_VMFault_IP, ipa);
} else {
setMR(receiver, receiveIPCBuffer, seL4_VMFault_IP, getRestartPC(sender));
}
setMR(receiver, receiveIPCBuffer, seL4_VMFault_Addr,
seL4_Fault_VMFault_get_address(sender->tcbFault));
setMR(receiver, receiveIPCBuffer, seL4_VMFault_PrefetchFault,
seL4_Fault_VMFault_get_instructionFault(sender->tcbFault));
return setMR(receiver, receiveIPCBuffer, seL4_VMFault_FSR,
seL4_Fault_VMFault_get_FSR(sender->tcbFault));
}
#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT
case seL4_Fault_VGICMaintenance:
if (seL4_Fault_VGICMaintenance_get_idxValid(sender->tcbFault)) {
return setMR(receiver, receiveIPCBuffer, seL4_VGICMaintenance_IDX,
seL4_Fault_VGICMaintenance_get_idx(sender->tcbFault));
} else {
return setMR(receiver, receiveIPCBuffer, seL4_VGICMaintenance_IDX, -1);
}
case seL4_Fault_VCPUFault:
return setMR(receiver, receiveIPCBuffer, seL4_VCPUFault_HSR, seL4_Fault_VCPUFault_get_hsr(sender->tcbFault));
#endif
default:
fail("Invalid fault");
}
}
示例7: dcache_alloc
static struct dcache_block *
dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
{
struct dcache_block *db;
if (dcache->size >= dcache_size)
{
/* Evict the least recently allocated line. */
db = dcache->oldest;
remove_block (&dcache->oldest, db);
splay_tree_remove (dcache->tree, (splay_tree_key) db->addr);
}
else
{
db = dcache->freelist;
if (db)
remove_block (&dcache->freelist, db);
else
db = xmalloc (offsetof (struct dcache_block, data) +
dcache->line_size);
dcache->size++;
}
db->addr = MASK (dcache, addr);
db->refs = 0;
/* Put DB at the end of the list, it's the newest. */
append_block (&dcache->oldest, db);
splay_tree_insert (dcache->tree, (splay_tree_key) db->addr,
(splay_tree_value) db);
return db;
}
示例8: heater_set
/** \brief manually set PWM output
\param index the heater we're setting the output for
\param value the PWM value to write
anything done by this function is overwritten by heater_tick above if the heater has an associated temp sensor
*/
void heater_set(heater_t index, uint8_t value) {
if (index >= NUM_HEATERS)
return;
heaters_runtime[index].heater_output = value;
if (heaters[index].heater_pwm) {
*(heaters[index].heater_pwm) = heaters[index].invert ?
(255 - value) : value;
if (DEBUG_PID && (debug_flags & DEBUG_PID))
sersendf_P(PSTR("PWM{%u = %u}\n"), index, *heaters[index].heater_pwm);
}
else {
if ((value >= HEATER_THRESHOLD && ! heaters[index].invert) ||
(value < HEATER_THRESHOLD && heaters[index].invert))
*(heaters[index].heater_port) |= MASK(heaters[index].heater_pin);
else
*(heaters[index].heater_port) &= ~MASK(heaters[index].heater_pin);
}
if (value)
power_on();
}
示例9: put_utf8
static size_t
put_utf8(unsigned char *buf, ICONV_CHAR c)
{
#define MASK(n) ((0xffffffffu << (n)) & 0xffffffffu)
size_t o_len;
unsigned mask;
if ((c & MASK(7)) == 0) {
*buf = (unsigned char) c;
return 1;
}
o_len = 2;
for (;;) {
if ((c & MASK(11)) == 0)
break;
++o_len;
if ((c & MASK(16)) == 0)
break;
++o_len;
if ((c & MASK(21)) == 0)
break;
++o_len;
if ((c & MASK(26)) == 0)
break;
++o_len;
if ((c & MASK(31)) != 0)
return -EINVAL;
}
buf += o_len;
mask = 0xff80;
for (;;) {
*--buf = 0x80 | (c & 0x3f);
c >>= 6;
mask >>= 1;
if (c < 0x40) {
*--buf = mask | c;
break;
}
}
return o_len;
}
示例10: put_utf8
static int
put_utf8(unsigned char *buf, size_t buf_len, ICONV_CHAR c)
{
#define MASK(n) ((0xffffffffu << (n)) & 0xffffffffu)
size_t o_len;
if ((c & MASK(7)) == 0) {
if (buf_len < 1)
return -E2BIG;
*buf = (unsigned char) c;
return 1;
}
o_len = 2;
for (;;) {
if ((c & MASK(11)) == 0)
break;
++o_len;
if ((c & MASK(16)) == 0)
break;
++o_len;
if ((c & MASK(21)) == 0)
break;
++o_len;
if ((c & MASK(26)) == 0)
break;
++o_len;
if ((c & MASK(31)) != 0)
return -EILSEQ;
}
if (buf_len < o_len)
return -E2BIG;
buf += o_len;
buf_len = o_len - 1;
do {
*--buf = 0x80 | (c & 0x3f);
c >>= 6;
} while (--buf_len);
*--buf = (0xff00u >> o_len) | c;
return o_len;
}
示例11: analog_init
void analog_init() {
#if ANALOG_MASK > 0
#ifdef PRR
PRR &= ~MASK(PRADC);
#elif defined PRR0
PRR0 &= ~MASK(PRADC);
#endif
ADMUX = REFERENCE;
// ADC frequency must be less than 200khz or we lose precision. At 16MHz system clock, we must use the full prescale value of 128 to get an ADC clock of 125khz.
ADCSRA = MASK(ADEN) | MASK(ADPS2) | MASK(ADPS1) | MASK(ADPS0);
adc_counter = 0;
adc_running_mask = 1;
DIDR0 = ANALOG_MASK & 0x1F;
// now we start the first conversion and leave the rest to the interrupt
ADCSRA |= MASK(ADIE) | MASK(ADSC);
#endif
}
示例12: Init_RGB_LEDs
void Init_RGB_LEDs(void) {
// Enable clock to ports B and D
SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTD_MASK;;
// Make 3 pins GPIO
PORTB->PCR[RED_LED_POS] &= ~PORT_PCR_MUX_MASK;
PORTB->PCR[RED_LED_POS] |= PORT_PCR_MUX(1);
PORTB->PCR[GREEN_LED_POS] &= ~PORT_PCR_MUX_MASK;
PORTB->PCR[GREEN_LED_POS] |= PORT_PCR_MUX(1);
PORTD->PCR[BLUE_LED_POS] &= ~PORT_PCR_MUX_MASK;
PORTD->PCR[BLUE_LED_POS] |= PORT_PCR_MUX(1);
// Initially off
PTB->PSOR = MASK(RED_LED_POS);
PTB->PSOR = MASK(GREEN_LED_POS);
PTD->PSOR = MASK(BLUE_LED_POS);
// Set ports to outputs
PTB->PDDR |= MASK(RED_LED_POS) | MASK(GREEN_LED_POS);
PTD->PDDR |= MASK(BLUE_LED_POS);
}
示例13: MT6620_ADPLL_Power_OnOff
/***********************************************************************
* ADPLL Power On or Off
*
***********************************************************************/
int MT6620_ADPLL_Power_OnOff(int onoff, int ADPLL_clk)
{
int ret = 0;
FM_COM_ASSERT(op_cb->read);
FM_COM_ASSERT(op_cb->write);
FM_COM_ASSERT(op_cb->setbits);
switch(onoff){
case FM_ADPLL_ON:
if((ret = op_cb->write(0x25, 0x040F)))
goto out;
//Remove the Reset_N
if((ret = op_cb->write(0x20, 0x2720)))
goto out;
// change DLF loop gain
// Set FMCR_DLF_GAIN_A = "9"
// Set FMCR_DLF_GAIN_B = "9"
if((ret = op_cb->write(0x22, 0x9980)))
goto out;
//Configure initial I_CODE for calibration
if((ret = op_cb->write(0x25, 0x080F)))
goto out;
//Enable ADPLL DCO
//Set FMCR_DCO_ EN = "1¡±
if(ADPLL_clk == FM_ADPLL_16M){
if((ret = op_cb->write(0x1E, 0x0A63)))
goto out;
// wait 5ms
Delayms(5);
if((ret = op_cb->write(0x1E, 0x0A65)))
goto out;
// wait 5ms
Delayms(5);
if((ret = op_cb->write(0x1E, 0x0A71)))
goto out;
}else if(ADPLL_clk == FM_ADPLL_15M){
if((ret = op_cb->write(0x1E, 0x0863)))
goto out;
// wait 5ms
Delayms(5);
if((ret = op_cb->write(0x1E, 0x0865)))
goto out;
// wait 5ms
Delayms(5);
if((ret = op_cb->write(0x1E, 0x0871)))
goto out;
}else{
ret = -ERR_INVALID_PARA;
goto out;
}
// wait 100ms
Delayms(100);
if((ret = op_cb->write(0x2A, 0x1026)))
goto out;
break;
//ADPLL Power Off Sequence
case FM_ADPLL_OFF:
// Set rgfrf_top_ck = "0"
if((ret = op_cb->setbits(0x2A, 0, MASK(12))))//set 2A D12=0
goto out;
// Set FMCR_OPEN_LOOP_EN = "0"
// Set FMCR_PLL_EN = "0"
// Set FMCR_DCO_EN = "0"
if((ret = op_cb->setbits(0x1E, 0, MASK(7)&MASK(4)&MASK(0))))//set 1E D7 D4 D0=0
goto out;
// Set rgfrf_adpll_reset_n = "0"
if((ret = op_cb->setbits(0x20, 0, MASK(13))))//set 20 D13=0
goto out;
// Set rgfrf_adpll_reset_n = "1"
if((ret = op_cb->setbits(0x20, BITn(13), MASK(13))))//set 20 D13=1
goto out;
break;
default:
break;
}
out:
return ret;
}
示例14: cpu_init
/** Initialise the CPU.
This sets up the CPU the way we need it. It disables modules we don't use,
so they don't mess on the I/O pins they're connected to.
*/
void cpu_init() {
#ifdef PRR
#if defined I2C && defined SPI
PRR = MASK(PRADC);
#elif defined SPI
PRR = MASK(PRADC) | MASK(PRTWI);
#elif defined I2C
PRR = MASK(PRADC) | MASK(PRSPI);
#else
PRR = MASK(PRADC) | MASK(PRTWI) | MASK(PRSPI);
#endif
#elif defined PRR0
#if defined I2C && defined SPI
PRR0 = MASK(PRADC);
#elif defined SPI
PRR0 = MASK(PRADC) | MASK(PRTWI);
#elif defined I2C
PRR0 = MASK(PRADC) | MASK(PRSPI);
#else
PRR0 = MASK(PRADC) | MASK(PRTWI) | MASK(PRSPI);
#endif
#if defined(PRUSART3)
// Don't use USART2 or USART3. Leave USART1 for GEN3 and derivatives.
PRR1 |= MASK(PRUSART3) | MASK(PRUSART2);
#endif
#if defined(PRUSART2)
// Don't use USART2 or USART3. Leave USART1 for GEN3 and derivatives.
PRR1 |= MASK(PRUSART2);
#endif
#endif
ACSR = MASK(ACD);
}
示例15: temp_sensor_tick
/// called every 10ms from clock.c - check all temp sensors that are ready for checking
void temp_sensor_tick() {
temp_sensor_t i = 0;
for (; i < NUM_TEMP_SENSORS; i++) {
if (temp_sensors_runtime[i].next_read_time) {
temp_sensors_runtime[i].next_read_time--;
}
else {
uint16_t temp = 0;
//time to deal with this temp sensor
switch(temp_sensors[i].temp_type) {
#ifdef TEMP_MAX6675
case TT_MAX6675:
#ifdef PRR
PRR &= ~MASK(PRSPI);
#elif defined PRR0
PRR0 &= ~MASK(PRSPI);
#endif
#ifdef NAL_REPRAP
/* This section is compatible with the mendel original implementation of the MAX6675.
* Not using the SPI as the MISO line is used to control our heater.
*/
WRITE(MAX6675_CS, 0); // Enable device
// Read in 16 bits from the MAX6675
for (uint8_t i=0; i<16; i++){
WRITE(MAX6675_SCK,1); // Set Clock to HIGH
temp <<= 1; // shift left by one
// Read bit and add it to our variable
temp += (READ(MAX6675_SO) != 0 );
WRITE(MAX6675_SCK,0); // Set Clock to LOW
}
WRITE(MAX6675_CS, 1); //Disable Device
#else
SPCR = MASK(MSTR) | MASK(SPE) | MASK(SPR0);
// enable TT_MAX6675
WRITE(SS, 0);
// ensure 100ns delay - a bit extra is fine
delay(1);
// read MSB
SPDR = 0;
for (;(SPSR & MASK(SPIF)) == 0;);
temp = SPDR;
temp <<= 8;
// read LSB
SPDR = 0;
for (;(SPSR & MASK(SPIF)) == 0;);
temp |= SPDR;
// disable TT_MAX6675
WRITE(SS, 1);
#endif
temp_sensors_runtime[i].temp_flags = 0;
if ((temp & 0x8002) == 0) {
// got "device id"
temp_sensors_runtime[i].temp_flags |= PRESENT;
if (temp & 4) {
// thermocouple open
temp_sensors_runtime[i].temp_flags |= TCOPEN;
}
else {
temp = temp >> 3;
}
}
// this number depends on how frequently temp_sensor_tick is called. the MAX6675 can give a reading every 0.22s, so set this to about 250ms
temp_sensors_runtime[i].next_read_time = 25;
break;
#endif /* TEMP_MAX6675 */
#ifdef TEMP_THERMISTOR
case TT_THERMISTOR:
do {
uint8_t j, table_num;
//Read current temperature
temp = analog_read(temp_sensors[i].temp_pin);
// check for open circuit
if (temp ==1023){
temp = 0 ; // this should convert to max temperature and ensure the heaters are turned off
temp_sensors_runtime[i].temp_flags |= TCOPEN;
}
// for thermistors the thermistor table number is in the additional field
table_num = temp_sensors[i].additional;
//Calculate real temperature based on lookup table
for (j = 1; j < NUMTEMPS; j++) {
if (pgm_read_word(&(temptable[table_num][j][0])) > temp) {
// Thermistor table is already in 14.2 fixed point
#ifndef EXTRUDER
if (debug_flags & DEBUG_PID)
//.........这里部分代码省略.........