C++ MAP_IntEnable函数代码示例

   /*          to this function.                                        */
int BTPSAPI HCITR_COMWrite(unsigned int HCITransportID, unsigned int Length, unsigned char *Buffer)
{
   int ret_val;
   int Count;

   /* Check to make sure that the specified Transport ID is valid and   */
   /* the output buffer appears to be valid as well.                    */
   if((HCITransportID == TRANSPORT_ID) && (HCITransportOpen) && (Length) && (Buffer))
   {
      /* Delay and poll until there is enough room in the Tx Buffer (in */
      /* the UartContext structure) to hold the data we are trying to   */
      /* transmit.                                                      */
      while(UartContext.TxBytesFree < Length)
         BTPS_Delay(10);

      /* Process all of the data.                                       */
      while(Length)
      {
         /* The data may have to be copied in 2 phases.  Calculate the  */
         /* number of character that can be placed in the buffer before */
         /* the buffer must be wrapped.                                 */
         Count = (UartContext.TxBufferSize-UartContext.TxInIndex);
         Count = (Count > Length)?Length:Count;
         BTPS_MemCopy(&(UartContext.TxBuffer[UartContext.TxInIndex]), Buffer, Count);

         /* Update the number of free bytes in the buffer.  Since this  */
         /* count can also be updated in the interrupt routine, we will */
         /* have have to update this with interrupts disabled.          */
         MAP_IntDisable(UartContext.IntBase);
         UartContext.TxBytesFree -= Count;
         MAP_IntEnable(UartContext.IntBase);

         /* Adjust the count and index values.                          */
         Buffer                += Count;
         Length                -= Count;
         UartContext.TxInIndex += Count;
         if(UartContext.TxInIndex >= UartContext.TxBufferSize)
            UartContext.TxInIndex = 0;
      }

      /* Check to see if we need to prime the transmitter.              */
      if(!(HWREG(UartContext.Base + UART_O_IM) & UART_IM_TXIM))
      {
         /* Now that the data is in the input buffer, check to see if we*/
         /* need to enable the interrupt to start the TX Transfer.      */
         HWREG(UartContext.Base + UART_O_IM) |= UART_IM_TXIM;

         /* Start sending data to the Uart Transmit.                    */
         MAP_IntDisable(UartContext.IntBase);
         TxInterrupt();
         MAP_IntEnable(UartContext.IntBase);
      }

      ret_val = 0;
   }
   else
      ret_val = HCITR_ERROR_WRITING_TO_PORT;

   return(ret_val);
}

//****************************************************************************
//
//! Main function
//!
//! \param none
//! 
//! This function  
//!    1. Configures the GPIOA1 and A2 interrupt.
//!
//! \return None.
//
//****************************************************************************
int main() {
	//
	// Initialize Board configurations
	//
	BoardInit();

	//
	// Power on the corresponding GPIO port B for 9,10,11.
	// Set up the GPIO lines to mode 0 (GPIO)
	//
	PinMuxConfig();

	//
	// Configure the GPIO13 - SW2 interrupt
	//
	MAP_GPIOIntRegister(GPIOA1_BASE, GPIOA1IntHandler);
	MAP_GPIOIntTypeSet(GPIOA1_BASE, GPIO_PIN_5, GPIO_RISING_EDGE);

	//
	// Configure the GPIO22 interrupt
	//
	MAP_GPIOIntRegister(GPIOA2_BASE, GPIOA2IntHandler);
	MAP_GPIOIntTypeSet(GPIOA2_BASE, GPIO_PIN_6, GPIO_RISING_EDGE);

	//
	// Enable GPIO13 Interrupt
	//
	MAP_GPIOIntClear(GPIOA1_BASE, GPIO_PIN_5);
	MAP_IntPendClear(INT_GPIOA1);
	MAP_IntEnable(INT_GPIOA1);
	MAP_GPIOIntEnable(GPIOA1_BASE, GPIO_PIN_5);

	//
	// Enable GPIO22 Interrupt
	//
	MAP_GPIOIntClear(GPIOA2_BASE, GPIO_PIN_6);
	MAP_IntPendClear(INT_GPIOA2);
	MAP_IntEnable(INT_GPIOA2);
	MAP_GPIOIntEnable(GPIOA2_BASE, GPIO_PIN_6);

	//
	// Infinite loop. All processing happens now in the interrupt handler.
	while (1) {

	}

	return 0;
}

void GPS_init()
{

    dbg_printf("Initializing GPS module...");

    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART);

    MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
    MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
    MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    MAP_UARTConfigSetExpClk(UART_BASE, MAP_SysCtlClockGet(), UART_SPEED, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
    MAP_UARTDisable(UART_BASE);
    MAP_UARTTxIntModeSet(UART_BASE, UART_TXINT_MODE_EOT);
    MAP_UARTIntEnable(UART_BASE, UART_INT_RX | UART_INT_TX);
    MAP_IntEnable(INT_UART);
    MAP_UARTEnable(UART_BASE);
    MAP_UARTFIFODisable(UART_BASE);

    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
    //
    MAP_IntEnable(INT_GPIOG);
    // Настроить прерывания на PPS
    MAP_GPIOIntTypeSet(GPIO_PORTG_BASE, GPIO_PIN_7, GPIO_FALLING_EDGE);
    MAP_GPIOPinIntEnable(GPIO_PORTG_BASE, GPIO_PIN_7);
    //

    if (tn_task_create(&task_GPS_tcb, &task_GPS_func, TASK_GPS_PRI,
        &task_GPS_stk[TASK_GPS_STK_SZ - 1], TASK_GPS_STK_SZ, 0,
        TN_TASK_START_ON_CREATION) != TERR_NO_ERR)
    {
        dbg_puts("tn_task_create(&task_GPS_tcb) error");
        goto err;
    }

    // Настроить прерывания на PPS
    //MAP_IntEnable(INT_GPIOG);
    //MAP_GPIOIntTypeSet(GPIO_PORTG_BASE, GPIO_PIN_7, GPIO_FALLING_EDGE);
    //MAP_GPIOPinIntEnable(GPIO_PORTG_BASE, GPIO_PIN_7);

    dbg_puts("[done]");

    return;
err:
    dbg_trace();
    tn_halt();
}

void platform_int_init()
{
  unsigned i;

  MAP_IntEnable( INT_UART0 );

  // TODO: Disabled other non UART0 ints
  //MAP_IntEnable( INT_UART1 );
  //MAP_IntEnable( INT_UART2 );
  for( i = 0; i < sizeof( gpio_int_ids ) / sizeof( u8 ); i ++ )
    MAP_IntEnable( gpio_int_ids[ i ] ) ;

  // TODO: Timers disabled
  //for( i = 0; i < sizeof( timer_int_ids ) / sizeof( u8 ); i ++ )
  //  MAP_IntEnable( timer_int_ids[ i ] );
}

void hw_timer0a_init(TN_EVENT* evt, unsigned evt_pattern)
{

    if (evt == NULL || evt_pattern == 0)
    {
        dbg_puts("evt == NULL || evt_pattern == 0");
        dbg_trace();
        tn_halt();
    }

    g_timer0a_evt           = evt;
    g_timer0a_evt_pattern   = evt_pattern;

    // TIMER_0_A32
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
    MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_TIMER0);
    MAP_TimerDisable(TIMER0_BASE, TIMER_A);
    MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_32_BIT_PER); // periodic mode
    MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
    //MAP_IntPrioritySet(INT_TIMER0A, 0); // 0 - max pri 7 - min pri
    MAP_IntEnable(INT_TIMER0A);

/*
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3);
    MAP_TimerDisable(TIMER3_BASE, TIMER_A);
    MAP_TimerConfigure(TIMER3_BASE, TIMER_CFG_32_BIT_OS);
    MAP_TimerEnable(TIMER3_BASE, TIMER_A);
*/
}

void HardwareSerial::begin(unsigned long baud)
{
	baudRate = baud;

	/* Set the UART to interrupt whenever the TX FIFO is almost empty or
	 * when any character is received. */
	//MAP_UARTFIFOLevelSet(UART_BASE, UART_FIFO_TX7_8, UART_FIFO_RX7_8);

	/* Initialize the UART. */
//	UARTClockSourceSet(UART_BASE, UART_CLOCK_SYSTEM);
	MAP_PRCMPeripheralReset(g_ulUARTPeriph[uartModule]);

	MAP_PRCMPeripheralClkEnable(g_ulUARTPeriph[uartModule], PRCM_RUN_MODE_CLK);

	MAP_PinTypeUART(g_ulUARTConfig[uartModule][0], PIN_MODE_3);
	MAP_PinTypeUART(g_ulUARTConfig[uartModule][1], PIN_MODE_3);

	MAP_UARTConfigSetExpClk(UART_BASE, 80000000, baudRate,
				(UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE |
				UART_CONFIG_WLEN_8));

	flushAll();
	MAP_IntEnable(g_ulUARTInt[uartModule]);

	/* Enable the UART operation. */
	MAP_UARTEnable(UART_BASE);

	MAP_UARTIntEnable(UART_BASE, UART_INT_RT | UART_INT_TX);
}

//
//! \brief Application defined idle task hook
//! 
//! \param  none
//! 
//! \return none
//!
//*****************************************************************************
void
vApplicationIdleHook( void)
{
    int iRetVal;
    
    //
    // Enter SLEEP...WaitForInterrupt ARM intrinsic
    //
    DBG_PRINT("DEEPSLEEP: Entering DeepSleep\n\r");
    
    //MAP_UtilsDelay(80000);
    for(iRetVal = 0; iRetVal < 80000; iRetVal++);
    
    //
    // Disable the SYSTICK interrupt
    //
    MAP_IntDisable(FAULT_SYSTICK);
    MAP_PRCMDeepSleepEnter();
    
    //
    // Enable the SYSTICK interrupt
    //
    MAP_IntEnable(FAULT_SYSTICK);

/*
 * @brief Initialize MSP430.
 *
 * use 400us interrupt for SPI comms.  This lets us xmit our 24-byte message in 9.6
 * ms.  At the end, we use a 32us interrupt for SPI comms.  This is about as fast
 * as the MSP430 can read bytes from the buffer.  This double byte signals the end of the
 * message for synchronizing the two processors
 * @returns void
*/
void msp430Init(void) {
    // Set up the message index
    MSP430MessageIdx = 0;

    // Default expand0 to off
    expand0Disable();

	// timer 1a is used for the ir interrupt.  timer 1b is used for the MSP430 message interrupt
	//ir_init initializes the timer 1, so timer1 shouldn't be enabled and configured here

	//MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);
	//MAP_TimerConfigure(TIMER1_BASE, TIMER_CFG_16_BIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_ONE_SHOT);
    // end shared timer init code

    MAP_TimerIntEnable(TIMER1_BASE, TIMER_TIMB_TIMEOUT);
    MAP_TimerLoadSet(TIMER1_BASE, TIMER_B, MSP430_SPI_BYTE_PERIOD);
    MAP_TimerEnable(TIMER1_BASE, TIMER_B);

	// Enable the interrupt in the NVIC with the right priority for FreeRTOS
	IntPrioritySet(INT_TIMER1B, SYSTEM_INTERRUPT_PRIORITY);
    MAP_IntEnable(INT_TIMER1B);

    // Have a flag to show the first valid communication from the MSP430
    systemMSP430CommsValid = FALSE;

    // Set up normal operations between the MSP430 and the 8962
    systemMSP430Command = MSP430_CMD_COMMAND_NORMAL;

    checksumFailure = 0;
}

//*****************************************************************************
//! Board Initialization & Configuration
//*****************************************************************************
static void bootmgr_board_init(void) {
    // set the vector table base
    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);

    // enable processor interrupts
    MAP_IntMasterEnable();
    MAP_IntEnable(FAULT_SYSTICK);

    // mandatory MCU initialization
    PRCMCC3200MCUInit();

    // clear all the special bits, since we can't trust their content after reset
    // except for the WDT reset one!!
    PRCMClearSpecialBit(PRCM_SAFE_BOOT_BIT);
    PRCMClearSpecialBit(PRCM_FIRST_BOOT_BIT);

    // check the reset after clearing the special bits
    mperror_bootloader_check_reset_cause();

#if MICROPY_HW_ANTENNA_DIVERSITY
    // configure the antenna selection pins
    antenna_init0();
#endif

    // enable the data hashing engine
    CRYPTOHASH_Init();

    // init the system led and the system switch
    mperror_init0();
}

//*****************************************************************************
//
//! Board Initialization & Configuration
//!
//! \param  None
//!
//! \return None
//
//*****************************************************************************
static void
BoardInit(void)
{
    //
    // Set vector table base
    //
#ifndef USE_TIRTOS
  //
  // Set vector table base
  //
#if defined(ccs) || defined(gcc)
    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);
#endif
#if defined(ewarm)
    MAP_IntVTableBaseSet((unsigned long)&__vector_table);
#endif
#endif

    //
    // Enable Processor
    //
    MAP_IntMasterEnable();
    MAP_IntEnable(FAULT_SYSTICK);

    PRCMCC3200MCUInit();
}

bool mgos_uart_hal_init(struct mgos_uart_state *us) {
  uint32_t base = cc32xx_uart_get_base(us->uart_no);
  uint32_t periph, int_no;
  void (*int_handler)();

  /* TODO(rojer): Configurable pin mappings? */
  if (us->uart_no == 0) {
    periph = PRCM_UARTA0;
    int_no = INT_UARTA0;
    int_handler = u0_int;
    MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* UART0_TX */
    MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* UART0_RX */
  } else if (us->uart_no == 1) {
    periph = PRCM_UARTA1;
    int_no = INT_UARTA1;
    int_handler = u1_int;
    MAP_PinTypeUART(PIN_07, PIN_MODE_5); /* UART1_TX */
    MAP_PinTypeUART(PIN_08, PIN_MODE_5); /* UART1_RX */
  } else {
    return false;
  }
  struct cc32xx_uart_state *ds =
      (struct cc32xx_uart_state *) calloc(1, sizeof(*ds));
  ds->base = base;
  cs_rbuf_init(&ds->isr_rx_buf, CC32xx_UART_ISR_RX_BUF_SIZE);
  us->dev_data = ds;
  MAP_PRCMPeripheralClkEnable(periph, PRCM_RUN_MODE_CLK);
  MAP_UARTIntDisable(base, ~0); /* Start with ints disabled. */
  MAP_IntRegister(int_no, int_handler);
  MAP_IntPrioritySet(int_no, INT_PRIORITY_LVL_1);
  MAP_IntEnable(int_no);
  return true;
}

//*****************************************************************************
//! Board Initialization & Configuration
//*****************************************************************************
static void bootmgr_board_init(void) {
    // set the vector table base
    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);

    // enable processor interrupts
    MAP_IntMasterEnable();
    MAP_IntEnable(FAULT_SYSTICK);

    // mandatory MCU initialization
    PRCMCC3200MCUInit();

    mperror_bootloader_check_reset_cause();

#if MICROPY_HW_ANTENNA_DIVERSITY
    // configure the antenna selection pins
    antenna_init0();
#endif

    // enable the data hashing engine
    CRYPTOHASH_Init();

    // init the system led and the system switch
    mperror_init0();

    // clear the safe boot flag, since we can't trust its content after reset
    PRCMClearSafeBootRequest();
}

int NwpRegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void* pValue)    //do not know what to do with pValue
{

    if(InterruptHdl == NULL)
    {
        //De-register Interprocessor communication interrupt between App and NWP
#ifdef SL_PLATFORM_MULTI_THREADED
        osi_InterruptDeRegister(INT_NWPIC);
#else
        MAP_IntDisable(INT_NWPIC);
        MAP_IntUnregister(INT_NWPIC);
        MAP_IntPendClear(INT_NWPIC);
#endif
    }
    else
    {
#ifdef SL_PLATFORM_MULTI_THREADED
        MAP_IntPendClear(INT_NWPIC);
        osi_InterruptRegister(INT_NWPIC, (P_OSI_INTR_ENTRY)InterruptHdl,
                              INT_PRIORITY_LVL_1);
#else
        MAP_IntRegister(INT_NWPIC, InterruptHdl);
        MAP_IntPrioritySet(INT_NWPIC, INT_PRIORITY_LVL_1);
        MAP_IntPendClear(INT_NWPIC);
        MAP_IntEnable(INT_NWPIC);
#endif
    }

    return 0;
}

/*!
	\brief 	This function registers an interrupt in NVIC table

	The sync object is used for synchronization between different thread or ISR and
	a thread.

	\param	iIntrNum	-	Interrupt number to register
	\param	pEntry	    -	Pointer to the interrupt handler
	\param	ucPriority	-	priority of the interrupt

	\return upon successful creation the function should return 0
			Otherwise, a negative value indicating the error code shall be returned
	\note
	\warning
*/
OsiReturnVal_e osi_InterruptRegister(int iIntrNum,P_OSI_INTR_ENTRY pEntry,unsigned char ucPriority)
{
	MAP_IntRegister(iIntrNum,(void(*)(void))pEntry);
	MAP_IntPrioritySet(iIntrNum, ucPriority);
	MAP_IntEnable(iIntrNum);
	return OSI_OK;
}

//*****************************************************************************
//
//! Board Initialization & Configuration
//!
//! \param  None
//!
//! \return None
//
//*****************************************************************************
static void
BoardInit(void)
{
/* In case of TI-RTOS vector table is initialize by OS itself */
#ifndef USE_TIRTOS
    //
    // Set vector table base
    //
#if defined(ccs)
    MAP_IntVTableBaseSet((unsigned long)&g_pfnVectors[0]);
#endif  //ccs
#if defined(ewarm)
    MAP_IntVTableBaseSet((unsigned long)&__vector_table);
#endif  //ewarm
    
#endif  //USE_TIRTOS
    
    //
    // Enable Processor
    //
    MAP_IntMasterEnable();
    MAP_IntEnable(FAULT_SYSTICK);

    PRCMCC3200MCUInit();
}