C++ KHZ2PICOS函数代码示例

static void __init at91_dt_device_init(void)
{
	char mb_rev = 255;
	int ret;

	printk("<0>""nihao-------------------\n");
	if (of_machine_is_compatible("atmel,sama5ek")) {
		struct device_node *np;

		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
					   ksz9021rn_phy_fixup);

		np = of_find_node_by_path("/");
		if (np) {
			const char *mb_rev_tmp;
			ret = of_property_read_string(np, "atmel,mb-rev", &mb_rev_tmp);
			if (ret) {
				printk("AT91: error %d while looking for mb-rev property, "
				       "let assume we are using the latest one\n", ret);
			} else {
				printk("AT91: mb rev: %s\n", mb_rev_tmp);
				mb_rev = mb_rev_tmp[0];
			}
		}

		np = of_find_compatible_node(NULL, NULL, "atmel,at91sam9g45-isi");
		if (np) {
			if (of_device_is_available(np)) {
				switch (mb_rev) {
				case 'A':
				case 'B':
					at91_config_isi(true, "pck2");
					iclink_ov2640.power = i2c_camera_power_revB;
					break;
				default:
					at91_config_isi(true, "pck1");
					break;
				}
			}
		}

		np = of_find_compatible_node(NULL, NULL, "atmel,atmel_mxt_ts");
		if (np) {
			if (of_device_is_available(np)) {
				__u8 manufacturer[4] = "Inlx";
				__u8 monitor[14] = "AT043TN24";
				/* set mXT224 and QT1070 IRQ lines as inputs */
				gpio_direction_input(AT91_PIN_PE31);
				gpio_direction_input(AT91_PIN_PE30);
				/* set LCD configuration */
				ek_lcdc_data.smem_len = 480 * 272 * 4;
				memcpy(ek_lcdc_data.default_monspecs->manufacturer, manufacturer, 4);
				memcpy(ek_lcdc_data.default_monspecs->monitor, monitor, 14);
				ek_lcdc_data.default_monspecs->hfmin = 14876;
				ek_lcdc_data.default_monspecs->hfmax = 17142;
				ek_lcdc_data.default_monspecs->vfmin = 50;
				ek_lcdc_data.default_monspecs->vfmax = 67;
				ek_lcdc_data.default_monspecs->modedb->name = "Inlx";
				ek_lcdc_data.default_monspecs->modedb->xres = 480;
				ek_lcdc_data.default_monspecs->modedb->yres = 272;
				ek_lcdc_data.default_monspecs->modedb->pixclock = KHZ2PICOS(9000);
				ek_lcdc_data.default_monspecs->modedb->left_margin = 2;
				ek_lcdc_data.default_monspecs->modedb->right_margin = 2;
				ek_lcdc_data.default_monspecs->modedb->upper_margin = 2;
				ek_lcdc_data.default_monspecs->modedb->lower_margin = 2;
				ek_lcdc_data.default_monspecs->modedb->hsync_len = 41;
				ek_lcdc_data.default_monspecs->modedb->vsync_len = 11;
			}
		}
	}

	of_platform_populate(NULL, of_default_bus_match_table, at91_auxdata_lookup, NULL);
#if defined(CONFIG_SOC_CAMERA_OV2640) \
	|| defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
	/* add ov2640 camera device */
	platform_add_devices(devices, ARRAY_SIZE(devices));
#endif
}

	.modes	 	= antares_panel_modes,
	.n_modes 	= ARRAY_SIZE(antares_panel_modes),

	.enable		= antares_panel_enable,
	.disable	= antares_panel_disable,
};

static struct tegra_dc_out antares_disp2_out = {
	.type		= TEGRA_DC_OUT_HDMI,
	.flags		= TEGRA_DC_OUT_HOTPLUG_HIGH,

	.dcc_bus	= 1,
	.hotplug_gpio	= antares_hdmi_hpd,

	.max_pixclock	= KHZ2PICOS(148500),

	.align		= TEGRA_DC_ALIGN_MSB,
	.order		= TEGRA_DC_ORDER_RED_BLUE,

	.enable		= antares_hdmi_enable,
	.disable	= antares_hdmi_disable,
};

static struct tegra_dc_platform_data antares_disp1_pdata = {
	.flags		= TEGRA_DC_FLAG_ENABLED,
	.default_out	= &antares_disp1_out,
	.fb		= &antares_fb_data,
};

static struct tegra_dc_platform_data antares_disp2_pdata = {

/*
 * LCD Controller
 */
#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)

#if defined(CONFIG_FB_ATMEL_STN)

/* STN */
static struct fb_videomode at91_stn_modes[] = {
        {
		.name           = "SP06Q002 @ 75",
		.refresh        = 75,
		.xres           = 320,          .yres           = 240,
		.pixclock       = KHZ2PICOS(1440),

		.left_margin    = 1,            .right_margin   = 1,
		.upper_margin   = 0,            .lower_margin   = 0,
		.hsync_len      = 1,            .vsync_len      = 1,

		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
		.vmode          = FB_VMODE_NONINTERLACED,
        },
};

static struct fb_monspecs at91fb_default_stn_monspecs = {
        .manufacturer   = "HIT",
        .monitor        = "SP06Q002",

        .modedb         = at91_stn_modes,

/**
 * mx3fb_check_var() - check and adjust framebuffer variable parameters.
 * @var:	framebuffer variable parameters
 * @fbi:	framebuffer information pointer
 */
static int mx3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
{
	struct mx3fb_info *mx3_fbi = fbi->par;
	u32 vtotal;
	u32 htotal;

	dev_dbg(fbi->device, "%s\n", __func__);

	if (var->xres_virtual < var->xres)
		var->xres_virtual = var->xres;
	if (var->yres_virtual < var->yres)
		var->yres_virtual = var->yres;

	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	    (var->bits_per_pixel != 16))
		var->bits_per_pixel = default_bpp;

	switch (var->bits_per_pixel) {
	case 16:
		var->red.length = 5;
		var->red.offset = 11;
		var->red.msb_right = 0;

		var->green.length = 6;
		var->green.offset = 5;
		var->green.msb_right = 0;

		var->blue.length = 5;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 24:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 32:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 8;
		var->transp.offset = 24;
		var->transp.msb_right = 0;
		break;
	}

	if (var->pixclock < 1000) {
		htotal = var->xres + var->right_margin + var->hsync_len +
		    var->left_margin;
		vtotal = var->yres + var->lower_margin + var->vsync_len +
		    var->upper_margin;
		var->pixclock = (vtotal * htotal * 6UL) / 100UL;
		var->pixclock = KHZ2PICOS(var->pixclock);
		dev_dbg(fbi->device, "pixclock set for 60Hz refresh = %u ps\n",
			var->pixclock);
	}

	var->height = -1;
	var->width = -1;
	var->grayscale = 0;

	/* Preserve sync flags */
	var->sync |= mx3_fbi->sync;
	mx3_fbi->sync |= var->sync;

	return 0;
}

#else
	.bus_width_16	= 0,
#endif
};


/*
 * LCD Controller
 */
#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
static struct fb_videomode at91_tft_vga_modes[] = {
	{
	        .name           = "TX09D50VM1CCA @ 60",
		.refresh	= 60,
		.xres		= 240,		.yres		= 320,
		.pixclock	= KHZ2PICOS(4965),

		.left_margin	= 1,		.right_margin	= 33,
		.upper_margin	= 1,		.lower_margin	= 0,
		.hsync_len	= 5,		.vsync_len	= 1,

		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
		.vmode		= FB_VMODE_NONINTERLACED,
	},
};

static struct fb_monspecs at91fb_default_monspecs = {
	.manufacturer	= "HIT",
	.monitor        = "TX09D70VM1CCA",

	.modedb		= at91_tft_vga_modes,

	MX25_PAD_GPIO_C__CAN2_TX,
};

#define GPIO_LED1	83
#define GPIO_SWITCH1	82
#define GPIO_SD1CD	52
#define GPIO_LCDPWR	26

static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
	{
		.mode	= {
			.name		= "CMO-QVGA",
			.refresh	= 60,
			.xres		= 320,
			.yres		= 240,
			.pixclock	= KHZ2PICOS(6500),
			.left_margin	= 30,
			.right_margin	= 38,
			.upper_margin	= 20,
			.lower_margin	= 3,
			.hsync_len	= 15,
			.vsync_len	= 4,
		},
		.bpp	= 16,
		.pcr	= 0xCAD08B80,
	}, {
		.mode = {
			.name		= "DVI-VGA",
			.refresh	= 60,
			.xres		= 640,
			.yres		= 480,

	.alloc_vidmem = 1,
#endif
};
#endif

#ifdef CONFIG_FB_JZ4780_LCDC1
/* LCD Controller 1 output to LVDS TFT panel */
static struct fb_videomode jzfb1_videomode[] = {

#ifdef CONFIG_LCD_KR070LA0S_270_65HZ // [email protected]=480MHz, [email protected]=888MHz
	{
		.name = "1024x600",
		.refresh = 65,
		.xres = 1024,
		.yres = 600,
		.pixclock = KHZ2PICOS(48000),
		.left_margin = 171,
		.right_margin = 0,
		.upper_margin = 18,
		.lower_margin = 0,
		.hsync_len = 0,
		.vsync_len = 0,
		.sync = 0 | 0, /* FB_SYNC_HOR_HIGH_ACT:0, FB_SYNC_VERT_HIGH_ACT:0 */
		.vmode = FB_VMODE_NONINTERLACED,
		.flag = 0
	},
#endif

#ifdef CONFIG_LCD_BYD_BM8766U
	{
		.name = "800x480",

/**************************************************************************************************/
struct fb_videomode jzfb0_videomode[] = {
	ADD_HDMI_VIDEO_MODE(HDMI_640X480_P_60HZ_4X3),
	ADD_HDMI_VIDEO_MODE(HDMI_720X480_P_60HZ_4X3),
	ADD_HDMI_VIDEO_MODE(HDMI_720X480_P_60HZ_16X9),
	ADD_HDMI_VIDEO_MODE(HDMI_1280X720_P_60HZ_16X9),
	ADD_HDMI_VIDEO_MODE(HDMI_1920X1080_I_60HZ_16X9),
};

struct fb_videomode jzfb1_videomode = {
#ifdef CONFIG_LCD_AT070TN93
	.name = "800x480",
	.refresh = 55,
	.xres = 800,
	.yres = 480,
	.pixclock = KHZ2PICOS(25863),
	.left_margin = 16,
	.right_margin = 48,
	.upper_margin = 7,
	.lower_margin = 23,
	.hsync_len = 30,
	.vsync_len = 16,
	.sync = ~FB_SYNC_HOR_HIGH_ACT & ~FB_SYNC_VERT_HIGH_ACT,
	.vmode = FB_VMODE_NONINTERLACED,
	.flag = 0,
#endif

#ifdef CONFIG_LCD_KD50G2_40NM_A2 // [email protected]=888MHz
	{
		.name = "800x480",
		.refresh = 60,

#include <mach/portmux.h>
#include <mach/board.h>

#include <sound/atmel-ac97c.h>

static struct ac97c_platform_data __initdata ac97c0_data = {
	.reset_pin = GPIO_PIN_PB(19),
};

#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA
static struct fb_videomode __initdata tcg057vglad_modes[] = {
	{
		.name		= "640x480 @ 50",
		.refresh	= 50,
		.xres		= 640,		.yres		= 480,
		.pixclock	= KHZ2PICOS(25180),

		.left_margin	= 64,		.right_margin	= 96,
		.upper_margin	= 34,		.lower_margin	= 11,
		.hsync_len	= 64,		.vsync_len	= 15,

		.sync		= 0,
		.vmode		= FB_VMODE_NONINTERLACED,
	},
};

static struct fb_monspecs __initdata atevklcd10x_default_monspecs = {
	.manufacturer		= "KYO",
	.monitor		= "TCG057VGLAD",
	.modedb			= tcg057vglad_modes,
	.modedb_len		= ARRAY_SIZE(tcg057vglad_modes),

 * DA converter needs an high active DE signal to show a video signal.
 */
static struct fb_videomode tx28evk_vmodes[] = {
	{
	/*
	 * Modeline "640x480" x 59.9 (to be used with the VGA connector)
	 * Clock: 25.18 MHz
	 * Line: 640 656 752 800 (31.5 kHz)
	 * Frame: 480 490 492 525
	 * Syncs: -hsync -vsync
	 */
		.name = "VGA",
		.refresh = 60,
		.xres = 640,
		.yres = 480,
		.pixclock = KHZ2PICOS(25180),
		.left_margin = 48,
		.hsync_len = 96,
		.right_margin = 16,
		.upper_margin = 33,
		.vsync_len = 2,
		.lower_margin = 10,
		.sync = FB_SYNC_DE_HIGH_ACT,
		.vmode = FB_VMODE_NONINTERLACED,
		.flag = 0,
	}, {
	/*
	 * Emerging ETV570 640 x 480 display (directly connected)
	 * Clock: 25.175 MHz
	 * Syncs: low active, DE high active
	 * Display area: 115.2 mm x 86.4 mm

static int xylonfb_parse_vmode_info(struct device_node *np,
	struct xylonfb_init_data *init_data)
{
	struct device_node *dn, *vmode_dn;
	u32 const *prop;
	char *c;
	unsigned long pix_data_invert, pix_clk_act_high;
	int size, tmp;

	init_data->active_layer = 0;
	init_data->vmode_params_set = false;

	dn = of_find_node_by_name(NULL, "xylon-video-params");
	if (dn == NULL) {
		pr_err("Error getting video mode parameters\n");
		return -ENOENT;
	}

	pix_data_invert = 0;
	prop = of_get_property(dn, "xlnx,pixel-data-invert", &size);
	if (!prop)
		pr_err("Error getting pixel data invert\n");
	else
		pix_data_invert = be32_to_cpup(prop);
	pix_clk_act_high = 0;
	prop = of_get_property(dn, "xlnx,pixel-clock-active-high", &size);
	if (!prop)
		pr_err("Error getting pixel active edge\n");
	else
		pix_clk_act_high = be32_to_cpup(prop);

	prop = of_get_property(dn, "xlnx,pixel-component-format", &size);
	if (prop) {
		if (!strcmp("ABGR", (char *)prop)) {
			prop = of_get_property(dn, "xlnx,pixel-component-layer", &size);
			if (prop) {
				while(size > 0) {
					tmp = be32_to_cpup(prop);
					init_data->layer_ctrl[tmp] = LOGICVC_SWAP_RB;
					prop++;
					size -= sizeof(prop);
				}
			}
		}
	}

	prop = of_get_property(dn, "active-layer", &size);
	if (prop) {
		tmp = be32_to_cpup(prop);
		init_data->active_layer = (unsigned char)tmp;
	} else {
		pr_info("xylonfb setting default layer to %d\n",
			init_data->active_layer);
	}

	prop = of_get_property(dn, "videomode", &size);
	if (prop) {
		if (strlen((char *)prop) <= VMODE_NAME_SZ) {
			strcpy(init_data->vmode_data.fb_vmode_name, (char *)prop);
			vmode_dn =
				of_find_node_by_name(dn, init_data->vmode_data.fb_vmode_name);
			c = strchr((char *)prop, '_');
			if (c)
				*c = 0;
			strcpy(init_data->vmode_data.fb_vmode_name, (char *)prop);
		} else {
			vmode_dn = NULL;
			pr_err("Error videomode name to long\n");
		}
		if (vmode_dn) {
			prop = of_get_property(vmode_dn, "refresh", &size);
			if (!prop)
				pr_err("Error getting refresh rate\n");
			else
				init_data->vmode_data.fb_vmode.refresh = be32_to_cpup(prop);

			prop = of_get_property(vmode_dn, "xres", &size);
			if (!prop)
				pr_err("Error getting xres\n");
			else
				init_data->vmode_data.fb_vmode.xres = be32_to_cpup(prop);

			prop = of_get_property(vmode_dn, "yres", &size);
			if (!prop)
				pr_err("Error getting yres\n");
			else
				init_data->vmode_data.fb_vmode.yres = be32_to_cpup(prop);

			prop = of_get_property(vmode_dn, "pixclock-khz", &size);
			if (!prop)
				pr_err("Error getting pixclock-khz\n");
			else
				init_data->vmode_data.fb_vmode.pixclock =
					KHZ2PICOS(be32_to_cpup(prop));

			prop = of_get_property(vmode_dn, "left-margin", &size);
			if (!prop)
				pr_err("Error getting left-margin\n");
			else
				init_data->vmode_data.fb_vmode.left_margin = be32_to_cpup(prop);
//.........这里部分代码省略.........

//.........这里部分代码省略.........
		return;
	}
	while (p->name != NULL) {
		if (strcmp(p->name, vm) == 0) {
			printf("Using video mode: '%s'\n", p->name);
			vm += strlen(vm);
			break;
		}
		p++;
	}

	while (*vm != '\0') {
		if (*vm >= '0' && *vm <= '9') {
			char *end;

			val = simple_strtoul(vm, &end, 0);
			if (end > vm) {
				if (!xres_set) {
					if (val > panel_info.vl_col)
						val = panel_info.vl_col;
					p->xres = val;
					xres_set = 1;
				} else if (!yres_set) {
					if (val > panel_info.vl_row)
						val = panel_info.vl_row;
					p->yres = val;
					yres_set = 1;
				} else if (!bpp_set) {
					switch (val) {
					case 8:
					case 16:
					case 18:
					case 24:
						color_depth = val;
						break;

					default:
						printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
							end - vm, vm, color_depth);
					}
					bpp_set = 1;
				} else if (!refresh_set) {
					refresh = val;
					refresh_set = 1;
				}
			}
			vm = end;
		}
		switch (*vm) {
		case '@':
			bpp_set = 1;
			/* fallthru */
		case '-':
			yres_set = 1;
			/* fallthru */
		case 'x':
			xres_set = 1;
			/* fallthru */
		case 'M':
		case 'R':
			vm++;
			break;

		default:
			if (*vm != '\0')
				vm++;
		}
	}
	if (p->xres == 0 || p->yres == 0) {
		printf("Invalid video mode: %s\n", getenv("video_mode"));
		lcd_enabled = 0;
		printf("Supported video modes are:");
		for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
			printf(" %s", p->name);
		}
		printf("\n");
		return;
	}
	p->pixclock = KHZ2PICOS(refresh *
		(p->xres + p->left_margin + p->right_margin + p->hsync_len) *
		(p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
				1000);
	debug("Pixel clock set to %lu.%03lu MHz\n",
		PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);

	gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
	mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
				ARRAY_SIZE(stk5_lcd_pads));

	debug("video format: %ux%u-%[email protected]%u\n", p->xres, p->yres,
		color_depth, refresh);

	if (karo_load_splashimage(0) == 0) {
		debug("Initializing LCD controller\n");
		mxsfb_init(p, PIX_FMT_RGB24, color_depth);
		video_hw_init(lcdbase);
	} else {
		debug("Skipping initialization of LCD controller\n");
	}
}

	/* SW controlled LED on STK5 baseboard */
	MX28_PAD_ENET0_RXD3__GPIO_4_10,
};

static const struct gpio stk5_gpios[] = {
};

#ifdef CONFIG_LCD
static struct fb_videomode tx28_fb_modes[] = {
	{
		/* Standard VGA timing */
		.name		= "VGA",
		.refresh	= 60,
		.xres		= 640,
		.yres		= 480,
		.pixclock	= KHZ2PICOS(25175),
		.left_margin	= 48,
		.hsync_len	= 96,
		.right_margin	= 16,
		.upper_margin	= 31,
		.vsync_len	= 2,
		.lower_margin	= 12,
		.sync		= FB_SYNC_DATA_ENABLE_HIGH_ACT,
		.vmode		= FB_VMODE_NONINTERLACED,
	},
	{
		/* Emerging ETV570 640 x 480 display. Syncs low active,
		 * DE high active, 115.2 mm x 86.4 mm display area
		 * VGA compatible timing
		 */
		.name		= "ETV570",

/*
 * Check framebuffer variable parameters and adjust to valid values.
 *
 * @param       var      framebuffer variable parameters
 *
 * @param       info     framebuffer information pointer
 */
static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
	u32 vtotal;
	u32 htotal;

	if (var->xres_virtual < var->xres)
		var->xres_virtual = var->xres;
	if (var->yres_virtual < var->yres)
		var->yres_virtual = var->yres;

	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	    (var->bits_per_pixel != 16) && (var->bits_per_pixel != 8))
		var->bits_per_pixel = default_bpp;

	switch (var->bits_per_pixel) {
	case 8:
		var->red.length = 3;
		var->red.offset = 5;
		var->red.msb_right = 0;

		var->green.length = 3;
		var->green.offset = 2;
		var->green.msb_right = 0;

		var->blue.length = 2;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 16:
		var->red.length = 5;
		var->red.offset = 11;
		var->red.msb_right = 0;

		var->green.length = 6;
		var->green.offset = 5;
		var->green.msb_right = 0;

		var->blue.length = 5;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 24:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 32:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 8;
		var->transp.offset = 24;
		var->transp.msb_right = 0;
		break;
	}

	if (var->pixclock < 1000) {
		htotal = var->xres + var->right_margin + var->hsync_len +
		    var->left_margin;
		vtotal = var->yres + var->lower_margin + var->vsync_len +
		    var->upper_margin;
		var->pixclock = (vtotal * htotal * 6UL) / 100UL;
		var->pixclock = KHZ2PICOS(var->pixclock);
		printf("pixclock set for 60Hz refresh = %u ps\n",
//.........这里部分代码省略.........

//.........这里部分代码省略.........
	unsigned long htotal, vtotal;

	if (var->xres_virtual < var->xres)
		var->xres_virtual = var->xres;
	if (var->yres_virtual < var->yres)
		var->yres_virtual = var->yres;

	if (var->xoffset < 0)
		var->xoffset = 0;

	if (var->yoffset < 0)
		var->yoffset = 0;

	if (var->xoffset + info->var.xres > info->var.xres_virtual)
		var->xoffset = info->var.xres_virtual - info->var.xres;

	if (var->yoffset + info->var.yres > info->var.yres_virtual)
		var->yoffset = info->var.yres_virtual - info->var.yres;

	if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
	    (var->bits_per_pixel != 16)) {
		var->bits_per_pixel = default_bpp;
	}

	switch (var->bits_per_pixel) {
	case 16:
		var->red.length = 5;
		var->red.offset = 11;
		var->red.msb_right = 0;

		var->green.length = 6;
		var->green.offset = 5;
		var->green.msb_right = 0;

		var->blue.length = 5;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 24:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 0;
		var->transp.offset = 0;
		var->transp.msb_right = 0;
		break;
	case 32:
		var->red.length = 8;
		var->red.offset = 16;
		var->red.msb_right = 0;

		var->green.length = 8;
		var->green.offset = 8;
		var->green.msb_right = 0;

		var->blue.length = 8;
		var->blue.offset = 0;
		var->blue.msb_right = 0;

		var->transp.length = 8;
		var->transp.offset = 24;
		var->transp.msb_right = 0;
		break;
	}

	if (var->pixclock < 1000) {
		htotal = var->xres + var->right_margin + var->hsync_len +
		    var->left_margin;
		vtotal = var->yres + var->lower_margin + var->vsync_len +
		    var->upper_margin;
		var->pixclock = (vtotal * htotal * 6UL) / 100UL;
		var->pixclock = KHZ2PICOS(var->pixclock);
		dev_dbg(info->device,
			"pixclock set for 60Hz refresh = %u ps\n",
			var->pixclock);
	}

	var->height = -1;
	var->width = -1;
	var->grayscale = 0;

	/* Copy nonstd field to/from sync for fbset usage */
	var->sync |= var->nonstd;
	var->nonstd |= var->sync;

	return 0;
}