C++ JPEG_MSG函数代码示例

kal_uint32 jpeg_drv_enc_set_dst_buff(kal_uint32 dst_addr, kal_uint32 stall_size, kal_uint32 init_offset, kal_uint32 offset_mask)
{
    if (stall_size < 624)
    {
        JPEG_MSG("JPEGENC:stall offset less than 624 to write header %d!!\n",stall_size);        
        return 0;
    }

   if (offset_mask & 0x0F)
   {
      JPEG_MSG("JPEGENC: set offset addr %x\n", offset_mask);
      //return 0;
   }

   IMG_REG_WRITE( (init_offset & (~0xF)), REG_ADDR_JPEG_ENC_OFFSET_ADDR);   //REG_JPEG_ENC_OFFSET_ADDR = init_offset & (~0xF);

   IMG_REG_WRITE( (offset_mask & 0xF), REG_ADDR_JPEG_ENC_BYTE_OFFSET_MASK);   //REG_JPEG_ENC_BYTE_OFFSET_MASK = (offset_mask & 0xF);
   
   IMG_REG_WRITE( (dst_addr & (~0xF)), REG_ADDR_JPEG_ENC_DST_ADDR0);   //REG_JPEG_ENC_DST_ADDR0  = dst_addr & (~0xF);
   
   IMG_REG_WRITE( ((dst_addr + stall_size) & (~0xF)), REG_ADDR_JPEG_ENC_STALL_ADDR0);   //REG_JPEG_ENC_STALL_ADDR0 = (dst_addr + stall_size) & (~0xF);
   

   return 1;
}

static int __init jpeg_init(void)
{
    int ret;

    JPEG_MSG("JPEG Codec initialize\n");

    #if 0
    JPEG_MSG("Register the JPEG Codec device\n");
    if(platform_device_register(&jpeg_device))
    {
        JPEG_ERR("failed to register jpeg codec device\n");
        ret = -ENODEV;
        return ret;
    }
    #endif
    
    JPEG_MSG("Register the JPEG Codec driver\n");    
    if(platform_driver_register(&jpeg_driver))
    {
        JPEG_ERR("failed to register jpeg codec driver\n");
        platform_device_unregister(&jpeg_device);
        ret = -ENODEV;
        return ret;
    }
    cmdqCoreRegisterCB(CMDQ_GROUP_JPEG,
                       cmdqJpegClockOn,
                       cmdqJpegDumpInfo,
                       cmdqJpegResetEng,
                       cmdqJpegClockOff);
    return 0;
}

void jpeg_drv_enc_power_on(void)
{  
#ifdef FPGA_VERSION   
    IMG_REG_WRITE( (0), JPEG_EARLY_MM_BASE);  
    JPEG_MSG("JPEG Encoder RESET_MM_BASE!!\n");
#endif
    JPEG_MSG("JPEG Encoder Power On\n");
}

static int jpeg_remove(struct platform_device *pdev)
{
	JPEG_MSG("JPEG Codec remove\n");
	//unregister_chrdev(JPEGDEC_MAJOR, JPEGDEC_DEVNAME);
#ifndef FPGA_VERSION
	free_irq(MT_JPEG_CODEC_IRQ_ID, NULL);
#endif
	JPEG_MSG("Done\n");
	return 0;
}

static int jpeg_probe(struct platform_device *pdev)
{
    struct class_device;
    
	int ret;
    struct class_device *class_dev = NULL;
    
    JPEG_MSG("-------------jpeg driver probe-------\n");
	ret = alloc_chrdev_region(&jpeg_devno, 0, 1, JPEG_DEVNAME);

	if(ret)
	{
	    JPEG_ERR("Error: Can't Get Major number for JPEG Device\n");
	}
	else
	{
	    JPEG_MSG("Get JPEG Device Major number (%d)\n", jpeg_devno);
    }

	jpeg_cdev = cdev_alloc();
    jpeg_cdev->owner = THIS_MODULE;
	jpeg_cdev->ops = &jpeg_fops;

	ret = cdev_add(jpeg_cdev, jpeg_devno, 1);

    jpeg_class = class_create(THIS_MODULE, JPEG_DEVNAME);
    class_dev = (struct class_device *)device_create(jpeg_class, NULL, jpeg_devno, NULL, JPEG_DEVNAME);

    spin_lock_init(&jpeg_dec_lock);
    spin_lock_init(&jpeg_enc_lock);

    // initial codec, register codec ISR
    dec_status = 0;
    enc_status = 0;
    _jpeg_dec_int_status = 0;
    _jpeg_enc_int_status = 0;

#ifndef FPGA_VERSION
    init_waitqueue_head(&dec_wait_queue);
    init_waitqueue_head(&enc_wait_queue);

    enable_irq(MT_JPEG_CODEC_IRQ_ID);
    if(request_irq(MT_JPEG_CODEC_IRQ_ID, jpeg_drv_isr, IRQF_TRIGGER_LOW, "jpeg_driver" , NULL))
    {
        JPEG_ERR("JPEG Codec Driver request irq failed\n");
    }
#endif
	JPEG_MSG("JPEG Probe Done\n");

	NOT_REFERENCED(class_dev);
	return 0;
}

void jpeg_drv_enc_dump_reg(void)
{
    unsigned int reg_value = 0;
    unsigned int index = 0;

    JPEG_MSG("===== JPEG ENC DUMP =====\n");
    for(index = 0x100 ; index < JPEG_ENC_REG_COUNT ; index += 4){
#ifdef FPGA_VERSION      
        reg_value = *(volatile kal_uint32 *)(JPEG_ENC_BASE + index);
#else        
        reg_value = ioread32(JPEG_ENC_BASE + index);
#endif        
        JPEG_MSG("+0x%x 0x%08x\n", index, reg_value);
    }
}

int jpeg_drv_dec_wait_one_row(JPEG_DEC_DRV_IN *config)
{
	unsigned int timeout = 0x2FFFFF;
	unsigned int irq_status;

	unsigned int tri_cnt = ++config->pauseRowCnt;	/* 1; */
	unsigned int MCU_cnt = 0;
	unsigned int base_Y = config->buffer_Y_PA;	/* 0x89080000; */
	unsigned int base_CB = config->buffer_Cb_PA;	/* 0x89040000; */
	unsigned int base_CR = config->buffer_Cr_PA;	/* 0x89100000; */
	unsigned int ring_row_index = tri_cnt % config->tileBufRowNum;

	/* for( tri_cnt = 1 ; tri_cnt <= 60 ; tri_cnt++) */
	{
		/* wait done */
		if (config->decodeMode == JPEG_DEC_MODE_MCU_ROW) {
			while ((REG_JPGDEC_INTERRUPT_STATUS & BIT_INQST_MASK_ALLIRQ) == 0) {
				timeout--;
				if (timeout == 0)
					break;
			}
		} else {
			while ((REG_JPGDEC_INTERRUPT_STATUS & BIT_INQST_MASK_ALLIRQ) == 0) {
				timeout--;
				if (timeout == 0)
					break;
			}

		}
		irq_status = REG_JPGDEC_INTERRUPT_STATUS;

		MCU_cnt = config->mcuPerRow * (tri_cnt + 1);
		/* MCU_cnt = config->u4McuNumInRow * (tri_cnt+1) ; */

		JPEG_MSG
		    ("JPEG_DEC_WAIT_DONE: tri_cnt %d, irq %x, MCUinRow %d, p_idx %d, %x %x %x!!\n",
		     tri_cnt, irq_status, config->mcuPerRow, MCU_cnt,
		     base_Y + ring_row_index * (config->buffer_Y_row_size),
		     base_CB + ring_row_index * (config->buffer_C_row_size),
		     base_CR + ring_row_index * (config->buffer_C_row_size));

		jpeg_drv_dec_set_dst_bank0(base_Y + ring_row_index * (config->buffer_Y_row_size),
					   base_CB + ring_row_index * (config->buffer_C_row_size),
					   base_CR + ring_row_index * (config->buffer_C_row_size));

		jpeg_drv_dec_set_pause_mcu_idx(MCU_cnt - 1);

		IMG_REG_WRITE((irq_status), REG_ADDR_JPGDEC_INTERRUPT_STATUS);

		    /* Debug: jpeg_drv_dec_dump_reg(); */
		    if (timeout == 0) {
			JPEG_ERR("Error! Decode Timeout.\n");
			jpeg_drv_dec_dump_reg();
			return 0;
		}

		JPEG_ERR("JPEG Decode Success, st %x!!\n", irq_status);
	}
	return 1;
}

kal_uint32 jpeg_drv_enc_warm_reset(void)
{
    kal_uint32 timeout = 0xFFFFF;
    
    REG_JPEG_ENC_CTRL &= ~JPEG_ENC_CTRL_ENABLE_BIT;
    //REG_JPEG_ENC_CTRL |= JPEG_ENC_CTRL_ENABLE_BIT;


    while (0 == (REG_JPEG_ENC_DEBUG_INFO0 & JPEG_ENC_DEBUG_INFO0_GMC_IDLE_MASK))
    {
        timeout--;
        if (0 == timeout)
        {
            JPEG_MSG("Wait for GMC IDLE timeout\n");
            return 0;
        }
    }
       
    REG_JPEG_ENC_RSTB &= ~(JPEG_ENC_RST_BIT);
    REG_JPEG_ENC_RSTB |= JPEG_ENC_RST_BIT;
    
    IMG_REG_WRITE( (0), REG_ADDR_JPEG_ENC_CODEC_SEL);  //REG_JPEG_ENC_CODEC_SEL = 0;

    _jpeg_enc_int_status = 0;

    return 1;
}

unsigned int jpeg_drv_dec_get_decMCU(void)
{
   unsigned int u4Value;
   u4Value = REG_JPGDEC_MCU_CNT ;
   JPEG_MSG("JPED_DEC_DRV: MCU_CNT %x!!\n", u4Value);
   return u4Value;
   
}

unsigned int jpeg_drv_dec_get_decState(void)
{
   unsigned int u4Value;
   u4Value = REG_JPGDEC_STATUS ;
   JPEG_MSG("JPED_DEC_DRV: STATUS %x!!\n", u4Value);
   return u4Value;
   
}

void jpeg_drv_dec_start(void)
{
#ifndef JPEG_DEC_IRQ_ENHANCE
	JPEG_MSG("JPGDC jpeg_drv_dec_start:  unmask jpeg irq!\n");
	/* unmask jpeg irq */
	IMG_REG_WRITE(0x37, REG_ADDR_JPGDEC_IRQ_EN);
#else
	unsigned int reg_value;

	JPEG_MSG("JPGDC jpeg_drv_dec_start: JPEG_DEC_IRQ_ENHANCE!\n");
	IMG_REG_READ(reg_value, REG_ADDR_JPGDEC_IRQ_EN);
	reg_value |= BIT_DEC_IRQ_EN_DEBUG_BRP_FLAG;

	IMG_REG_WRITE(reg_value, REG_ADDR_JPGDEC_IRQ_EN);
#endif

	IMG_REG_WRITE(0, REG_ADDR_JPGDEC_TRIG);	/* REG_JPGDEC_TRIG = 0; */
}

kal_uint32 jpeg_drv_enc_set_chroma_addr(kal_uint32 src_chroma_addr)
{
	if (src_chroma_addr & 0x0F) {
		JPEG_MSG("JPEGENC: set CHROMA addr not align (%x)!!\n", src_chroma_addr);
		/* return 0; */
	}

	IMG_REG_WRITE((src_chroma_addr), REG_ADDR_JPEG_ENC_SRC_CHROMA_ADDR);

	return 1;
}

kal_uint32 jpeg_drv_enc_set_offset_addr(kal_uint32 offset)
{
	if (offset & 0x0F) {
		JPEG_MSG("JPEGENC:WARN set offset addr %x\n", offset);
		/* return 0; */
	}

	IMG_REG_WRITE((offset), REG_ADDR_JPEG_ENC_OFFSET_ADDR);	/* REG_JPEG_ENC_OFFSET_ADDR = offset; */

	return 1;
}

kal_uint32 jpeg_drv_enc_set_memory_stride(kal_uint32 mem_stride)
{
    if ( mem_stride & 0x0F )
    {
        JPEG_MSG("JPEGENC: set memory stride failed, not align to 0x1f (%x)!!\n", mem_stride);
        return 0;
    }
    
    IMG_REG_WRITE( (mem_stride), REG_ADDR_JPEG_ENC_STRIDE);  //REG_JPEG_ENC_STRIDE = (mem_stride);
    
    return 1;
}

kal_uint32 jpeg_drv_enc_set_luma_addr(kal_uint32 src_luma_addr)
{
    if (src_luma_addr & 0x0F)
    {
        JPEG_MSG("JPEGENC: set LUMA addr not align (%x)!!\n", src_luma_addr);
        //return 0;
    }

    IMG_REG_WRITE( (src_luma_addr), REG_ADDR_JPEG_ENC_SRC_LUMA_ADDR);  //REG_JPEG_ENC_SRC_LUMA_ADDR = src_luma_addr;

    return 1;
}