C++ IntEnable函数代码示例

void PSO_Timers()
{
	uint32_t ui32Period;

	SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
	TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC);

	ui32Period = (SysCtlClockGet() / 10) / 2;
	TimerLoadSet(TIMER0_BASE, TIMER_A, ui32Period -1);

	IntEnable(INT_TIMER0A);
	TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
	IntMasterEnable();

	TimerEnable(TIMER0_BASE, TIMER_A);

//	ROM_TimerControlEvent(WTIMER1_BASE,	TIMER_BOTH,TIMER_EVENT_BOTH_EDGES);
//	ROM_TimerControlEvent(WTIMER5_BASE,	TIMER_BOTH,TIMER_EVENT_BOTH_EDGES);
//
//	ROM_TimerConfigure(WTIMER1_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_A_CAP_TIME|TIMER_CFG_B_CAP_TIME);	// Timer 1-A and -B events edge-timer
//	ROM_TimerConfigure(WTIMER5_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_A_CAP_TIME|TIMER_CFG_B_CAP_TIME);	// Timer 1-A and -B events edge-timer
//	//
//	ROM_GPIOPinTypeTimer(GPIO_PORTC_BASE,GPIO_PIN_6);	// Set Port PC6 as Capture
//	ROM_GPIOPinConfigure(GPIO_PC6_WT1CCP0);
//
//	ROM_GPIOPinTypeTimer(GPIO_PORTC_BASE,GPIO_PIN_7);	// Set Port PC7 as Capture
//	ROM_GPIOPinConfigure(GPIO_PC7_WT1CCP1);
//
//	ROM_GPIOPinTypeTimer(GPIO_PORTD_BASE,GPIO_PIN_6);	// Set Port PD6 as Capture
//	ROM_GPIOPinConfigure(GPIO_PD6_WT5CCP0);
//
//	ROM_GPIOPinTypeTimer(GPIO_PORTD_BASE,GPIO_PIN_7);	// Set Port PD7 as Capture
//	ROM_GPIOPinConfigure(GPIO_PD7_WT5CCP1);
//
//	TimerSynchronize(TIMER0_BASE, WTIMER_1A_SYNC|WTIMER_1B_SYNC|WTIMER_5A_SYNC|WTIMER_5B_SYNC);
//
//	// Timer Interrupt Configuration
//	ROM_IntEnable(INT_WTIMER1A); 	// Enable Wide Timer 1-A Interrupt (Macro shall be used individually)
//	ROM_IntEnable(INT_WTIMER1B); 	// Enable Wide Timer 1-B Interrupt (Macro shall be used individually)
//	ROM_IntEnable(INT_WTIMER5A); 	// Enable Wide Timer 5-A Interrupt (Macro shall be used individually)
//	ROM_IntEnable(INT_WTIMER5B); 	// Enable Wide Timer 5-B Interrupt (Macro shall be used individually)
//	ROM_TimerIntEnable(WTIMER1_BASE, TIMER_CAPA_EVENT|TIMER_CAPB_EVENT);
//	ROM_TimerIntEnable(WTIMER5_BASE, TIMER_CAPA_EVENT|TIMER_CAPB_EVENT);
//	ROM_TimerEnable(WTIMER1_BASE, TIMER_BOTH);
//	ROM_TimerEnable(WTIMER5_BASE, TIMER_BOTH);
//	ROM_IntMasterEnable();

}

/**
 * In this function, the hardware should be initialized.
 * Called from stellarisif_init().
 *
 * @param netif the already initialized lwip network interface structure
 *        for this ethernetif
 */
static void
stellarisif_hwinit(struct netif *netif)
{
  u32_t temp;
  //struct stellarisif *stellarisif = netif->state;

  /* set MAC hardware address length */
  netif->hwaddr_len = ETHARP_HWADDR_LEN;

  /* set MAC hardware address */
  EthernetMACAddrSet(ETH_BASE, &(netif->hwaddr[0]));

  /* maximum transfer unit */
  netif->mtu = 1500;

  /* device capabilities */
  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
  netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;

  /* Do whatever else is needed to initialize interface. */
  /* Disable all Ethernet Interrupts. */
  EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
     ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
  temp = EthernetIntStatus(ETH_BASE, false);
  EthernetIntClear(ETH_BASE, temp);

  /* Initialize the Ethernet Controller. */
  EthernetInitExpClk(ETH_BASE, SysCtlClockGet());

  /*
   * Configure the Ethernet Controller for normal operation.
   * - Enable TX Duplex Mode
   * - Enable TX Padding
   * - Enable TX CRC Generation
   * - Enable RX Multicast Reception
   */
  EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN |ETH_CFG_TX_CRCEN |
    ETH_CFG_TX_PADEN | ETH_CFG_RX_AMULEN));

  /* Enable the Ethernet Controller transmitter and receiver. */
  EthernetEnable(ETH_BASE);

  /* Enable the Ethernet Interrupt handler. */
  IntEnable(INT_ETH);

  /* Enable Ethernet TX and RX Packet Interrupts. */
  EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
}

void turret_init(void) {
	pwm_init();
	adc_init();

	SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
	GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2);
	GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2);

	SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER4);
	TimerConfigure(TIMER4_BASE, TIMER_CFG_A_PERIODIC | TIMER_CFG_B_PERIODIC | TIMER_CFG_SPLIT_PAIR); //Timer B pour les actionneurs
	TimerLoadSet(TIMER4_BASE, TIMER_A, SysCtlClockGet()/50);
	IntEnable(INT_TIMER4A);
	TimerIntEnable(TIMER4_BASE, TIMER_TIMA_TIMEOUT);
	TimerEnable(TIMER4_BASE, TIMER_A);
	TimerEnable(TIMER4_BASE, TIMER_B);
}

void UART_init(void) {
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
	SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
	
	UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
	GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
		
	UARTFIFOEnable(UART0_BASE);
	UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
	UARTIntClear(UART0_BASE, 0xFFFFFFFF);

	IntEnable(INT_UART0);
	UARTIntEnable(UART0_BASE, UART_INT_RX);
	
	uart_transmit("AmpTraXX2!\n", 11);
}

//*****************************************************************************
//
//! Registers an interrupt handler for the watchdog timer interrupt.
//!
//! \param ui32Base is the base address of the watchdog timer module.
//! \param pfnHandler is a pointer to the function to be called when the
//! watchdog timer interrupt occurs.
//!
//! This function does the actual registering of the interrupt handler.  This
//! function also enables the global interrupt in the interrupt controller; the
//! watchdog timer interrupt must be enabled via WatchdogEnable().  It is the
//! interrupt handler's responsibility to clear the interrupt source via
//! WatchdogIntClear().
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
//!
//! \note For parts with a watchdog timer module that has the ability to
//! generate an NMI instead of a standard interrupt, this function registers
//! the standard watchdog interrupt handler.  To register the NMI watchdog
//! handler, use IntRegister() to register the handler for the
//! \b FAULT_NMI interrupt.
//!
//! \return None.
//
//*****************************************************************************
void WatchdogIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
	//
	// Check the arguments.
	//
	ASSERT((ui32Base == WATCHDOG0_BASE) || (ui32Base == WATCHDOG1_BASE));

	//
	// Register the interrupt handler.
	//
	IntRegister(INT_WATCHDOG_TM4C123, pfnHandler);

	//
	// Enable the watchdog timer interrupt.
	//
	IntEnable(INT_WATCHDOG_TM4C123);
}

void configure_uart_printf(void) {
	g_ulBase = UART3_BASE;

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3);
    GPIOPinConfigure(GPIO_PC6_U3RX);
    GPIOPinConfigure(GPIO_PC7_U3TX);
    GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_6 | GPIO_PIN_7);

    UARTConfigSetExpClk(UART3_BASE, SysCtlClockGet(), 38400,
                            (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                             UART_CONFIG_PAR_NONE));

    IntEnable(INT_UART3);
    UARTIntEnable(UART3_BASE, UART_INT_RX | UART_INT_TX);
}

void UART0_init(void)
{
	SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
		SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
	    GPIOPinConfigure(GPIO_PA0_U0RX);
	    GPIOPinConfigure(GPIO_PA1_U0TX);
	    GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
	    UARTClockSourceSet(UART0_BASE, UART_CLOCK_PIOSC);
	    UARTStdioConfig(0, 115200, 16000000);

	    IntMasterEnable();                                              //全局中断使能
		IntEnable(INT_UART0);                                           //使能串口0中断
		UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);          //使能串口0接收中断和接收超时中断
		UARTEnable(UART0_BASE);                                        //使能串口1（UARTO）发送和接收

}

static void ConfigureIntUART(void)
{
#ifdef _TMS320C6X
	IntRegister(C674X_MASK_INT4, UARTIsr);
	IntEventMap(C674X_MASK_INT4, SYS_INT_UART2_INT);
	IntEnable(C674X_MASK_INT4);
#else
    /* Registers the UARTIsr in the Interrupt Vector Table of AINTC. */
    IntRegister(SYS_INT_UARTINT2, UARTIsr);

    /* Map the channel number 2 of AINTC to UART2 system interrupt. */
    IntChannelSet(SYS_INT_UARTINT2, 2);

    IntSystemEnable(SYS_INT_UARTINT2);
#endif
}

void delay_msec(unsigned int delay_time)
{
 TimerInterrupt = 0;

 TimerLoadSet(GPTIMER3_BASE, GPTIMER_A, ((32000/20) * delay_time));
 
 IntMasterEnable();
 TimerIntEnable(GPTIMER3_BASE, GPTIMER_TIMA_TIMEOUT);
 IntEnable(INT_TIMER3A);
 TimerEnable(GPTIMER3_BASE, GPTIMER_A);
 while(TimerInterrupt != TIME_REACHED);

 TimerInterrupt = 0;
       
       
}

void InitTimer2(uint32_t ui32SysClock)
{
  // Enable the peripherals.
  SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER2);

  // Configure the 32-bit periodic timer.
  TimerConfigure(TIMER2_BASE, TIMER_CFG_PERIODIC);
  TimerLoadSet(TIMER2_BASE, TIMER_A, ui32SysClock / F_INTERRUPTS);

  // Setup the interrupts for the timer timeouts.
  IntEnable(INT_TIMER2A);
  TimerIntEnable(TIMER2_BASE, TIMER_TIMA_TIMEOUT);

  // Enable the timer.
  TimerEnable(TIMER2_BASE, TIMER_A);
}

/*
 * function: InitSamplingTimer
 * return: none
 * */
void InitSamplingTimer() {
	SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);

	TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC);
	TimerControlTrigger(TIMER0_BASE, TIMER_A, true);
	TimerLoadSet(TIMER0_BASE, TIMER_A, LoadTimer);
	/*
	 * timer set : 20 (us)
	 * */
// Enable the sampling interrupt
	IntEnable(INT_TIMER0A);
// When timer hits zero, call interrupt
	TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
// Start the sampling timer
	TimerEnable(TIMER0_BASE, TIMER_A);
}

void    InitUart2(void)
{
  SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
  SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

  GPIOPinConfigure(GPIO_PA6_U2RX);
  GPIOPinConfigure(GPIO_PA7_U2TX);
  GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_6 | GPIO_PIN_7);

  UARTFIFOLevelSet(UART2_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8);
  UARTTxIntModeSet(UART2_BASE, UART_TXINT_MODE_EOT);
  UARTFIFOEnable(UART2_BASE);

  IntEnable(INT_UART2);
  UARTIntEnable(UART2_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX);
}

void    InitUart4(void)
{
  SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4);
  SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

  GPIOPinConfigure(GPIO_PA2_U4RX);
  GPIOPinConfigure(GPIO_PA3_U4TX);
  GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3);

  UARTFIFOLevelSet(UART4_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8);
  UARTTxIntModeSet(UART4_BASE, UART_TXINT_MODE_EOT);
  UARTFIFOEnable(UART4_BASE);

  IntEnable(INT_UART4);
  UARTIntEnable(UART4_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX);
}

void    InitUart0(void)
{
  SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
  SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

  GPIOPinConfigure(GPIO_PA0_U0RX);
  GPIOPinConfigure(GPIO_PA1_U0TX);
  GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);

  UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8);
  UARTTxIntModeSet(UART0_BASE, UART_TXINT_MODE_EOT);
  UARTFIFOEnable(UART0_BASE);

  IntEnable(INT_UART0);
  UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT | UART_INT_TX);
}

//*****************************************************************************
//
//! Initialization the I2C bus module.
//!
//! \param bus specifies the i2c bus data structure.
//!
//! This function initialization the I2C hardware bus, it will open the i2c peripheral
//! and config the I2C gpio
//!
//! \return 0 is OK.
//
//*****************************************************************************
int ipmi_i2c_bus_init(ipmi_i2c_bus *bus)
{
    //
    // Check the arguments.
    //
    ASSERT(bus->sys_peripheral);
    ASSERT(bus->i2c_scl_periph);
    ASSERT(bus->i2c_sda_periph);
    ASSERT(bus->i2c_scl_gpio_port);
    ASSERT(bus->i2c_sda_gpio_port);
    ASSERT(bus->i2c_scl_gpio_pin);
    ASSERT(bus->i2c_sda_gpio_pin);
    ASSERT(bus->i2c_hw_master_base);

    // 初始化链表结构
    INIT_LIST_HEAD(&bus->list);

    // 初始化系统硬件外设
    SysCtlPeripheralEnable(bus->sys_peripheral);

    // 初始化SCL管脚硬件外设
    SysCtlPeripheralEnable(bus->i2c_scl_periph);
    if (bus->i2c_scl_gpio_mux)
        GPIOPinConfigure(bus->i2c_scl_gpio_mux);
    GPIOPinTypeI2C(bus->i2c_scl_gpio_port, bus->i2c_scl_gpio_pin);

    // 初始化SDA管脚硬件外设
    SysCtlPeripheralEnable(bus->i2c_sda_periph);
    if (bus->i2c_sda_gpio_mux)
        GPIOPinConfigure(bus->i2c_sda_gpio_mux);
    GPIOPinTypeI2C(bus->i2c_sda_gpio_port, bus->i2c_sda_gpio_pin);

    // 设备使能，开中断
    I2CMasterInit(bus->i2c_hw_master_base, false);
    if (bus->i2c_int)
    {
        //I2CIntRegister(bus->i2c_hw_master_base);
        IntEnable(bus->i2c_int);
        I2CMasterIntEnable(bus->i2c_hw_master_base);
    }
    I2CMasterEnable(bus->i2c_hw_master_base);

    list_add(&bus->list, &ipmi_i2c_bus_root.head);
    ipmi_i2c_bus_root.count++;

    return 0;
}