本文整理汇总了C++中IRQ_EINT函数的典型用法代码示例。如果您正苦于以下问题：C++ IRQ_EINT函数的具体用法？C++ IRQ_EINT怎么用？C++ IRQ_EINT使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了IRQ_EINT函数的15个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: bt_host_wake_irq_handler
irqreturn_t bt_host_wake_irq_handler(int irq, void *dev_id)
{
disable_irq(IRQ_EINT(22));
schedule_work(&bt_host_wake_work);
return IRQ_HANDLED;
}示例2: bt_host_wake_work_func
static void bt_host_wake_work_func(struct work_struct *ignored)
{
int gpio_val;
gpio_val = gpio_get_value(GPIO_BT_HOST_WAKE);
printk(KERN_DEBUG "[BT] GPIO_BT_HOST_WAKE = %d\n", gpio_val);
/*
if(gpio_val == GPIO_LEVEL_LOW)
{
//wake_unlock^M
printk("[BT]:wake_unlock \n");
wake_unlock(&rfkill_wake_lock);
}
else
{
//wake_lock
printk("[BT]:wake_lock \n");
wake_lock(&rfkill_wake_lock);
}
*/
if(gpio_val == GPIO_LEVEL_HIGH)
{
printk(KERN_DEBUG "[BT] wake_lock timeout = 5 sec\n");
wake_lock_timeout(&rfkill_wake_lock, 5*HZ);
}
enable_irq(IRQ_EINT(22));
}示例3: universal_sdhci2_cfg_ext_cd
void universal_sdhci2_cfg_ext_cd(void)
{
printk(KERN_DEBUG "Universal :SD Detect configuration\n");
s3c_gpio_cfgpin(GPIO_T_FLASH_DETECT, S3C_GPIO_SFN(GPIO_T_FLASH_DETECT_AF));
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
}示例4: s5pv310_irq_demux_eint16_31
static void s5pv310_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = get_irq_chip(irq);
u32 a16_23, a24_31;
if (chip->ack)
chip->ack(irq);
a16_23 = s5pv310_irq_demux_eint(irq, IRQ_EINT(16));
a24_31 = s5pv310_irq_demux_eint(irq, IRQ_EINT(24));
if (!a16_23 && !a24_31)
do_bad_IRQ(irq, desc);
chip->unmask(irq);
}示例5: universal_sdhci2_cfg_ext_cd
void universal_sdhci2_cfg_ext_cd(void)
{
printk(" Universal :SD Detect configuration \n");
#if defined(CONFIG_MACH_S5PC110_P1)
s3c_gpio_cfgpin(GPIO_T_FLASH_DETECT, S3C_GPIO_SFN(GPIO_T_FLASH_DETECT_AF));
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
#else
if(((HWREV >= 7) || (HWREV == 0x3)) && (HWREV !=8))
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
else
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_DOWN);
#endif
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
}示例6: s5p_init_irq_eint
int __init s5p_init_irq_eint(void)
{
int irq;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
set_irq_chip(irq, &s5p_irq_vic_eint);
for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
set_irq_chip(irq, &s5p_irq_eint);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
return 0;
}示例7: s5p64x0_irq_demux_eint
/*
* s5p64x0_irq_demux_eint
*
* This function demuxes the IRQ from the group0 external interrupts,
* from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
* the specific handlers s5p64x0_irq_demux_eintX_Y.
*/
static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
{
u32 status = __raw_readl(S5P64X0_EINT0PEND);
u32 mask = __raw_readl(S5P64X0_EINT0MASK);
unsigned int irq;
status &= ~mask;
status >>= start;
status &= (1 << (end - start + 1)) - 1;
for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
if (status & 1)
generic_handle_irq(irq);
status >>= 1;
}
}示例8: tiny6410_keys_irq
static irqreturn_t tiny6410_keys_irq(int irq, void *dev_id)
{
unsigned int tmp;
irq_dev = (struct key_desc *)dev_id;
if ((irq_dev->irq == IRQ_EINT(19)) || (irq_dev->irq == IRQ_EINT(20))) {
tmp = readl(S3C64XX_GPLDAT);
irq_dev->pin_val = tmp & (1<<irq_dev->pin);
}else {
tmp = readl(S3C64XX_GPNDAT);
irq_dev->pin_val = tmp & (1<<irq_dev->pin);
}
/* Start the timer after 10ms */
mod_timer(&keys_timers, jiffies+HZ/100);
return IRQ_RETVAL(IRQ_HANDLED);
}示例9: s3c64xx_init_irq_eint
int __init s3c64xx_init_irq_eint(void)
{
int irq;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
set_irq_chip(irq, &s3c_irq_eint);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
set_irq_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
set_irq_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
set_irq_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
set_irq_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
return 0;
}示例10: s5pv310_init_irq_eint
int __init s5pv310_init_irq_eint(void)
{
int irq;
for( irq = 0 ; irq <= 31 ; irq++) {
set_irq_chip(IRQ_EINT(irq), &s5pv310_irq_eint);
set_irq_handler(IRQ_EINT(irq), handle_level_irq);
set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
}
set_irq_chained_handler(IRQ_EINT16_31, s5pv310_irq_demux_eint16_31);
for ( irq = 0 ; irq <= 15 ; irq++)
set_irq_chained_handler(s5pv310_get_irq_nr(irq), s5pv310_irq_eint0_15);
return 0;
}示例11: s5pc210_extint_to_irq
static int s5pc210_extint_to_irq(struct gpio_chip *gpio, unsigned int offset)
{
struct s3c_gpio_chip *chip = to_s3c_gpio(gpio);
int irq;
irq = (chip->group * 8) + offset;
return IRQ_EINT(irq);
}示例12: s5pc1xx_gpiolib_to_eint
static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
{
int base;
base = chip->base - S5PC100_GPH0(0);
if (base == 0)
return IRQ_EINT(offset);
base = chip->base - S5PC100_GPH1(0);
if (base == 0)
return IRQ_EINT(8 + offset);
base = chip->base - S5PC100_GPH2(0);
if (base == 0)
return IRQ_EINT(16 + offset);
base = chip->base - S5PC100_GPH3(0);
if (base == 0)
return IRQ_EINT(24 + offset);
return -EINVAL;
}示例13: init_gpio
static void init_gpio(void)
{
int i;
for(i =0;i < KEYNUM;i++)
{
s3c_gpio_cfgpin(S3C64XX_GPN(i),2);
irq_set_irq_type(IRQ_EINT(i),dev_info[i].flags);
}
}示例14: s5p_init_irq_eint
static int __init s5p_init_irq_eint(void)
{
int irq;
if (of_have_populated_dt())
return -ENODEV;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
irq_set_chip(irq, &s5p_irq_vic_eint);
for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
return 0;
}示例15: s5p64xx_pm_configure_extint
static void s5p64xx_pm_configure_extint(void)
{
#if 0
s3c_gpio_cfgpin(S5P64XX_GPN(10), S5P64XX_GPN10_EINT10);
s3c_gpio_setpull(S5P64XX_GPN(10), S3C_GPIO_PULL_UP);
#else
__raw_writel((__raw_readl(S5P64XX_GPNCON) & ~(0x3 << 20)) |
(0x2 << 20), S5P64XX_GPNCON);
__raw_writel((__raw_readl(S5P64XX_GPNPUD) & ~(0x3 << 20)) |
(0x2 << 20), S5P64XX_GPNPUD);
#endif
udelay(50);
__raw_writel((__raw_readl(S5P64XX_EINT0CON0) & ~(0x7 << 20)) |
(0x2 << 20), S5P64XX_EINT0CON0);
__raw_writel(1UL << (IRQ_EINT(10) - IRQ_EINT(0)), S5P64XX_EINT0PEND);
__raw_writel(__raw_readl(S5P64XX_EINT0MASK)&~(1UL << (IRQ_EINT(10) - IRQ_EINT(0))), S5P64XX_EINT0MASK);
}