C++ GPIO_PIN函数代码示例

int main(int argc, char ** argv)
{
    int board, i, j;
    int retSize = -1;
    char *devName = GPIO_IR_DEV;
    int pin = GPIO_PIN(7);
    char modStr[BUF_SIZE];
    struct input_event evKey;
    
    if ((board = boardInit()) < 0)
        printf("Fail to init board\n");
    if (board == BOARD_NANOPI_T2)
        pin = GPIO_PIN(15);
    sprintf(modStr, "modprobe %s gpio=%d", IR_DRIVER_MODULE, pintoGPIO(pin));
    system(modStr);
    signal(SIGINT, IRIntHandler);
    sleep(1);
    irFD = openHW(devName, O_RDWR);
    if (irFD < 0) {
        printf("Fail to open GPIO IR device\n");
        return -1;
    }
    printf("Press the IR remoter\n");
    for (i=0; i<IR_EVENT_TIMES; i++) {
        if (selectHW(irFD, 0, 0) == 1) {
            retSize = readHW(irFD, &evKey, sizeof(struct input_event));
            for (j=0; j<(int) retSize / sizeof(struct input_event); j++)
                printf("%2d: Type=%d, Code=%d, Value=%x\n", i, evKey.type, evKey.code, evKey.value);
        }
    }
    closeHW(irFD);
    system("rmmod "IR_DRIVER_MODULE);
    return 0;
}

int __init archos_accel_init(struct mma7456l_pdata *pdata)
{
	const struct archos_accel_config *accel_cfg;
	
	accel_cfg = omap_get_config( ARCHOS_TAG_ACCEL, struct archos_accel_config );
	if (accel_cfg == NULL) {
		printk(KERN_DEBUG "archos_accel_init: no board configuration found\n");
		return -ENODEV;
	}
	if ( hardware_rev >= accel_cfg->nrev ) {
		printk(KERN_DEBUG "archos_accel_init: hardware_rev (%i) >= nrev (%i)\n",
			hardware_rev, accel_cfg->nrev);
		return -ENODEV;
	}

	accel_gpio = accel_cfg->rev[hardware_rev];

	/* irq needed by the driver */
	pdata->irq1 = gpio_to_irq(GPIO_PIN( accel_gpio.accel_int1 ));
	pdata->irq2 = gpio_to_irq(GPIO_PIN( accel_gpio.accel_int2 ));
	printk("archos_accel_init: irq1 %d, irq2 %d\n",pdata->irq1,pdata->irq2);

	GPIO_INIT_INPUT( accel_gpio.accel_int1 );
	GPIO_INIT_INPUT( accel_gpio.accel_int2 );
	omap_set_gpio_debounce(GPIO_PIN( accel_gpio.accel_int1 ),1);
	omap_set_gpio_debounce(GPIO_PIN( accel_gpio.accel_int2 ),1);

	return 0;
}

static int panel_init(struct omap_display_data *ddata)
{
	pr_debug("panel_init [%s]\n", ddata->panel_name);

	GPIO_INIT_OUTPUT(display_gpio.lcd_pwon);
	GPIO_INIT_OUTPUT(display_gpio.lcd_rst);
	GPIO_INIT_OUTPUT(display_gpio.lcd_pci);
	GPIO_INIT_OUTPUT(display_gpio.disp_select);
	GPIO_INIT_OUTPUT(display_gpio.cpldreset);

#if !defined(CONFIG_FB_OMAP_BOOTLOADER_INIT)
	if (GPIO_EXISTS(display_gpio.lcd_pwon))
		omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_pwon), 0);
	if (GPIO_EXISTS(display_gpio.lcd_rst))
		omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_rst), 0);
	if (GPIO_EXISTS(display_gpio.lcd_pci))
		omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_pci), 0);

	/* reset and enable the CPLD */
	if (GPIO_EXISTS(display_gpio.cpldreset))
		omap_set_gpio_dataout( GPIO_PIN(display_gpio.cpldreset), 0);
	mdelay(2);
	if (GPIO_EXISTS(display_gpio.cpldreset))
		omap_set_gpio_dataout( GPIO_PIN(display_gpio.cpldreset), 1);
#endif
	return 0;
}

static int __init wl127x_vio_leakage_fix(void)
{
	int ret = 0;
	const struct archos_wifi_bt_config *conf = &wifi_bt_dev_conf;
	struct archos_gpio bten_gpio;
	
	if (hardware_rev >= conf->nrev)
		return -ENODEV;
	
	bten_gpio = conf->rev[hardware_rev].bt_power;
	
	ret = gpio_request(GPIO_PIN(bten_gpio), "wl127x_bten");
	if (ret < 0) {
		printk(KERN_ERR "wl127x_bten gpio_%d request fail",
						GPIO_PIN(bten_gpio));
		goto fail;
	}

	gpio_direction_output(GPIO_PIN(bten_gpio), 1);
	mdelay(10);
	gpio_direction_output(GPIO_PIN(bten_gpio), 0);
	udelay(64);

	gpio_free(GPIO_PIN(bten_gpio));

fail:
	return ret;
}

bool DigitalInputPin::Value()
{
    int ret = 0;
    switch( GPIOPorts[ (int)_pin ] )
    {
        case PortA:
        {
            ret = GPIOA_PDIR & GPIO_PDIR_PDI( GPIO_PIN( GPIOPinNumbers[ (int)_pin ] ) );
            break;
        }
        case PortB:
        {
            ret = GPIOB_PDIR & GPIO_PDIR_PDI( GPIO_PIN( GPIOPinNumbers[ (int)_pin ] ) );
            break;
        }
        case PortC:
        {
            ret = GPIOC_PDIR & GPIO_PDIR_PDI( GPIO_PIN( GPIOPinNumbers[ (int)_pin ] ) );
            break;
        }
        case PortD:
        {
            ret = GPIOD_PDIR & GPIO_PDIR_PDI( GPIO_PIN( GPIOPinNumbers[ (int)_pin ] ) );
            break;
        }
        case PortE:
        {
            ret = GPIOE_PDIR & GPIO_PDIR_PDI( GPIO_PIN( GPIOPinNumbers[ (int)_pin ] ) );
            break;
        }
    }
    return ret;
}

/* export usbsata_power to drivers for power management */
void usbsata_power(int on_off)
{
	if (satavcc == on_off)
		return;

	printk("usbsata_power %i\n", on_off);
	satavcc = on_off;

	if (on_off) {
		omap_set_gpio_dataout(GPIO_PIN(gpio_hdd_pwron), on_off);
		msleep(100);
#ifdef DELAY_500GB_SEAGATE
		msleep(400);
#endif
		omap_set_gpio_dataout(GPIO_PIN(gpio_sata_pwron), on_off);
#ifdef DELAY_500GB_SEAGATE
		msleep(500);
#endif
		//clk_enable(clkout1);
		//archos_enable_ehci( 1 );
	} else {
		omap_set_gpio_dataout(GPIO_PIN(gpio_hdd_pwron), on_off);
		omap_set_gpio_dataout(GPIO_PIN(gpio_sata_pwron), on_off);
		/* wait another 100ms to propagate the disconnect through
		 * the phy, then switch if off */
		//msleep(100);
		//archos_enable_ehci( 0 );
		//clk_disable(clkout1);
	}		
}

int __init archos_accel_init(struct mma7660fc_pdata *pdata)
{
	struct archos_accel_conf accel_gpio;
	const struct archos_accel_config *accel_cfg;
	
	accel_cfg = omap_get_config( ARCHOS_TAG_ACCEL, struct archos_accel_config );
	if (accel_cfg == NULL) {
		printk(KERN_DEBUG "archos_accel_init: no board configuration found\n");
		return -ENODEV;
	}
	if ( hardware_rev >= accel_cfg->nrev ) {
		printk(KERN_DEBUG "archos_accel_init: hardware_rev (%i) >= nrev (%i)\n",
			hardware_rev, accel_cfg->nrev);
		return -ENODEV;
	}

	accel_gpio = accel_cfg->rev[hardware_rev];

	/* irq needed by the driver */
	if (GPIO_PIN( accel_gpio.accel_int1 ) != -1)
		pdata->irq = gpio_to_irq(GPIO_PIN( accel_gpio.accel_int1 ));
	else
		pdata->irq = -1;
	printk("archos_accel_init: irq %d\n",pdata->irq);

	archos_gpio_init_input( &accel_gpio.accel_int1, "accel_int1");
	return 0;
}

void gpio_set_pin(PIN pin, bool set)
{
	if (set)
        GPIO[GPIO_PORT(pin)]->BSRR = 1 << GPIO_PIN(pin);
	else
        GPIO[GPIO_PORT(pin)]->BRR = 1 << GPIO_PIN(pin);
}

int main(int argc, char ** argv)
{
    int ret = -1;
    int dhtTemp=0, dhtHdty=0, board;
    char modStr[BUF_SIZE];
    int pin = GPIO_PIN(7);

    if ((board = boardInit()) < 0) {
        printf("Fail to init board\n");
        return -1;
    }    
    if (board == BOARD_NANOPI_T2)
        pin = GPIO_PIN(15);
    
    sprintf(modStr, "modprobe %s gpio=%d", DRIVER_MODULE, pintoGPIO(pin));
    system(modStr);
    if ((ret = dht11Read(DHT_HUMIDITY, &dhtHdty)) != -1) {
        printf("The humidity is %d\n", dhtHdty);
    } else {
        printf("Faided to get humidity\n");
    }
    if ((ret = dht11Read(DHT_TEMP, &dhtTemp)) != -1) {
        printf("The temperature is %d\n", dhtTemp);
    } else {
        printf("Faided to get temperature\n");
    }
    system("rmmod "DRIVER_MODULE);
    return ret;
}

__LINK_C error_t hw_gpio_configure_interrupt(pin_id_t pin_id, gpio_inthandler_t callback, uint8_t event_mask)
{
    if((GPIO_PIN(pin_id) >= NUM_GPIOINT) || (gpio_callback[GPIO_PIN(pin_id)] != 0x00)) return EINVAL;
   
    start_atomic();
    GPio_edge *TGpio        = (GPio_edge *) SFRADR_GPIO_EDGE1;
    gpio_callback[GPIO_PIN(pin_id)]   = callback;
    TGpio->old_in           = TGpio->in;

    TGpio->edge = 0x1; // Clear all edges
    TGpio->level_sel |= (1<<GPIO_PIN(pin_id));// Select pin to interrupt

    if (event_mask == GPIO_RISING_EDGE)
        TGpio->rs_edge_sel = 0x1;
    else if (event_mask == GPIO_FALLING_EDGE)
        TGpio->fl_edge_sel = 0x1;
    else
    {
        end_atomic();
        return FAIL;
    }

    end_atomic();

    return SUCCESS;
}

static int nl5550_probe(struct platform_device *pdev)
{
	int ret;
	struct nl5550_struct *nl5550 = pdev->dev.platform_data;
	struct archos_gps_conf *conf = &nl5550->gps_conf;
	
	GPIO_INIT_OUTPUT(conf->gps_enable);
	GPIO_INIT_INPUT(conf->gps_int);
	
	omap_cfg_reg(AD25_34XX_UART2_RX);
	omap_cfg_reg(AA25_34XX_UART2_TX);

	INIT_WORK(&nl5550->work, nl5550_irq_worker);

	ret = request_irq(OMAP_GPIO_IRQ(GPIO_PIN(conf->gps_int)), 
			nl5550_isr, IRQF_TRIGGER_RISING, "nl5550", nl5550);
	if (ret < 0) {
		dev_err(&pdev->dev, "nl5550_probe: cannot register irq %d\n", 
				OMAP_GPIO_IRQ(GPIO_PIN(conf->gps_int)));
		return ret;
	}

	ret = device_create_file(&pdev->dev, &dev_attr_enable);
	if (ret < 0)
		dev_dbg(&pdev->dev, "cannot add enable attr\n");
	ret = device_create_file(&pdev->dev, &dev_attr_intr);
	if (ret < 0)
		dev_dbg(&pdev->dev, "cannot add intr attr\n");
	
	wake_lock_init(&nl5550->wake_lock, WAKE_LOCK_SUSPEND, "nl5550");

	nl5550->pdev = pdev;
	return 0;
}

static int qrd_gpios_request_enable(const struct msm_gpio *table, int size)
{
	int i;
	const struct msm_gpio *g;
	struct gpiomux_setting setting;

	int rc = msm_gpios_request(table, size);

	if (!rc){
		for (i = 0; i < size; i++) {
			g = table + i;
			/* use msm_gpiomux_write which can save old configuration */
			setting.func = GPIO_FUNC(g->gpio_cfg);
			setting.dir = GPIO_DIR(g->gpio_cfg);
			setting.pull = GPIO_PULL(g->gpio_cfg);
			setting.drv = GPIO_DRVSTR(g->gpio_cfg);
			msm_gpiomux_write(GPIO_PIN(g->gpio_cfg), GPIOMUX_ACTIVE, &setting, NULL);
			pr_debug("I2C pin %d func %d dir %d pull %d drvstr %d\n",
				GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
				GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
				GPIO_DRVSTR(g->gpio_cfg));
		}
	}
	return rc;
}

int cam_init() {
	//
	// disable interrupt
	//
	disable_irq(64);
	
	//
	// FTM2 configuration
	//
	
	// enable the clock for FTM2
	SIM_SCGC3 |= SIM_SCGC3_FTM2_MASK;
	
	// enable write-able mode for FTM2
	FTM2_MODE |= FTM_MODE_WPDIS_MASK;
	
	// turn off Status and Control
	FTM2_SC = 0;
	
	// makes the initial counter value for FTM2
	FTM2_CNTIN = 0;
	
	// writing any value to CNT loads the counter with CNTIN for FTM 2
	FTM2_CNT = 0;
	
	// CHIE enables interrupts as an ISR (used by ADC function after
	// clock pulses)
	FTM2_C0SC = FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK | FTM_CnSC_CHIE_MASK;
	
	// when counter == mod, the counter resets, set MOD value
	FTM2_MOD = CAM_MOD_INIT;
	FTM2_C0V = 0;
	
	// set clock prescaler for FTM2
	FTM2_SC |= FTM_SC_PS(2);
	
	// set main clock as BUS clock (50 MHz) for FTM2
	FTM2_SC |= FTM_SC_CLKS(1);	
	
	//
	// GPIO configuration for top level pins
	//
		
	// enable the clock for Port A
	SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;
	// set Port A Pin 14 for GPIO functionality (A22)
	PORTA_PCR14 = (0|PORT_PCR_MUX(1));
	// set Port A Pin 14 for output to drive the SI pulse
	GPIOA_PDDR |= GPIO_PDDR_PDD(GPIO_PIN(14));
	
	// set Port A Pin 10 for GPIO functionality (B66)
	PORTA_PCR10 = (0|PORT_PCR_MUX(3));
	// set Port A Pin 10 for output to drive the camera clock
	GPIOA_PDDR |= GPIO_PDDR_PDD(GPIO_PIN(10));

	
	
	return CAM_RET_SUCCESS;
}

int __init  archos_usb2sata_init(void) {
	int ret;
	const struct archos_sata_config *sata_cfg;
	sata_cfg = omap_get_config( ARCHOS_TAG_SATA, struct archos_sata_config );
	if (sata_cfg == NULL) {
		printk(KERN_DEBUG "archos_sata_init: no board configuration found\n");
		return -ENODEV;
	}
	if (hardware_rev >= sata_cfg->nrev) {
		printk(KERN_DEBUG "archos_sata_init: hardware_rev (%i) >= nrev (%i)\n",
				hardware_rev, sata_cfg->nrev);
		return -ENODEV;
	}

	printk(KERN_DEBUG "archos_usb2sata_init\n");

	clkout1 = clk_get(NULL, "sys_clkout1");
	if (IS_ERR(clkout1)) {
		printk(KERN_ERR "clk_get(sys_clkout1) failed\n");
		return PTR_ERR(clkout1);
	}

	/* sysfs setup */
	ret = platform_device_register(&usb2sata_device);
	if (ret)
		return ret;

	/* SATA bridge */
	gpio_sata_pwron = sata_cfg->rev[hardware_rev].sata_power;
	
	ret = device_create_file(&usb2sata_device.dev, &dev_attr_satavcc);
	if (ret == 0) {
		printk(KERN_DEBUG "archos_usb2sata_init: sata_pwron on GPIO%i\n",
				GPIO_PIN(gpio_sata_pwron));
		GPIO_INIT_OUTPUT(gpio_sata_pwron);
		omap_set_gpio_dataout(GPIO_PIN(gpio_sata_pwron), 0);
	}

	/* HDD power switch */
	gpio_hdd_pwron = sata_cfg->rev[hardware_rev].hdd_power;
	printk(KERN_DEBUG "archos_usb2sata_init: sata_pwron on GPIO%i\n",
			GPIO_PIN(gpio_hdd_pwron));
	GPIO_INIT_OUTPUT(gpio_hdd_pwron);
	omap_set_gpio_dataout(GPIO_PIN(gpio_hdd_pwron), 0);

	/* SATA_RDY signal */
	gpio_sata_rdy = sata_cfg->rev[hardware_rev].sata_ready;
	ret = device_create_file(&usb2sata_device.dev, &dev_attr_satardy);
	if (ret == 0) {
		printk(KERN_DEBUG "archos_usb2sata_init: sata_ready on GPIO%i\n",
				GPIO_PIN(gpio_sata_rdy));
		GPIO_INIT_INPUT(gpio_sata_rdy);
	}

	clk_enable(clkout1);
	usbsata_power(0);

	return 0;
}

void stm32_gpio_disable_exti(GPIO_DRV* gpio, PIN pin)
{
    EXTI->IMR &= ~(1ul << GPIO_PIN(pin));
    EXTI->EMR &= ~(1ul << GPIO_PIN(pin));

    EXTI->RTSR &= ~(1ul << GPIO_PIN(pin));
    EXTI->FTSR &= ~(1ul << GPIO_PIN(pin));
}