本文整理汇总了C++中FLASH_SetLatency函数的典型用法代码示例。如果您正苦于以下问题:C++ FLASH_SetLatency函数的具体用法?C++ FLASH_SetLatency怎么用?C++ FLASH_SetLatency使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了FLASH_SetLatency函数的15个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于系统推荐出更棒的C++代码示例。
示例1: RCC_Configuration
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* Enable the FSMC Clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC,ENABLE);
/* Enable AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO|RCC_APB2Periph_USART1 , ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1 , ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 |RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 , ENABLE);
}
}
示例2: SetHSICLKToMSI
/**
* @brief To select MSI as System clock source
* @caller ADC_Icc_Test
* @param Frequence, DIV by 2 ot not , With or without RTC
* @retval None
*/
void SetHSICLKToMSI(uint32_t freq,bool div2,bool With_RTC)
{
/* RCC system reset */
RCC_DeInit();
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_0);
/* Disable Prefetch Buffer */
FLASH_PrefetchBufferCmd(DISABLE);
/* Disable 64-bit access */
FLASH_ReadAccess64Cmd(DISABLE);
/* Disable FLASH during SLeep */
FLASH_SLEEPPowerDownCmd(ENABLE);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 3 (1.2V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range3);
/* Wait Until the Voltage Regulator is ready */
while (PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{}
/* To configure the MSI frequency */
RCC_MSIRangeConfig(freq);
/* Select MSI as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_MSI);
/* Wait till MSI is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x00)
{}
if (div2)
{
RCC_HCLKConfig(RCC_SYSCLK_Div2);
}
RCC_HSICmd(DISABLE);
/* Disable HSE clock */
RCC_HSEConfig(RCC_HSE_OFF);
/* Disable LSE clock */
if (! With_RTC)
RCC_LSEConfig(RCC_LSE_OFF);
/* Disable LSI clock */
RCC_LSICmd(DISABLE);
}
示例3: PreSetupHardware
static void PreSetupHardware(void) {
extern unsigned int *__Vectors;
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS) {
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08) {}
}
/* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |
RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD |
RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF |
RCC_APB2Periph_GPIOG | RCC_APB2Periph_AFIO |
RCC_APB2Periph_USART1 | RCC_APB2Periph_SPI1
, ENABLE);
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable DMA1 clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* Enable USART2 clock */
/* Enable UART4 clock */
/* TIM2 clock enable */
/* TIM3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | RCC_APB1Periph_PWR |
RCC_APB1Periph_BKP | RCC_APB1Periph_TIM2 |
RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 |
RCC_APB1Periph_UART4, ENABLE);
NVIC_SetVectorTable((unsigned int)&__Vectors, 0x0);
}
示例4: CLOCK_FLASH_config
void CLOCK_FLASH_config()
{
// クロックの状態を初期値に戻す
RCC_DeInit();
// wait stateの設定
if (VoltageRange_x == VoltageRange_2) FLASH_SetLatency(FLASH_Latency_6);
else if(VoltageRange_x == VoltageRange_3) FLASH_SetLatency(FLASH_Latency_5);
else while(1);
// ART Acceleratorの設定
FLASH_PrefetchBufferCmd(ENABLE);
FLASH_InstructionCacheCmd(ENABLE);
FLASH_DataCacheCmd(ENABLE);
// HSIのキャリブレーション値を設定する
RCC_AdjustHSICalibrationValue(HSICalibrationValue);
// PLLの設定をする (max. 168 MHz)
// PLLM: division factor, 2-63 --> 1-2 MHz (2MHz is recommended)
// PLLN: multiplication factor, 64-432 --> 64-432 MHz
// PLLP: division factor, 2, 4, 6, or 8 --> max 168 MHz
// PLLQ: division factor, 2-15 --> 48 MHz
RCC_PLLConfig(RCC_PLLSource_HSI, 8, 168, 2, 7); // HSI / 8 * 168 / 2 = 168 MHz
//RCC_PLLConfig(RCC_PLLSource_HSI, 8, 168, 4, 7); // HSI / 8 * 168 / 4 = 84 MHz
RCC_PLLCmd(ENABLE);
while( RCC_GetFlagStatus(RCC_FLAG_PLLRDY) != SET);
// HCLKの分周比を設定する (max. 168 MHz)
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2の分周比を設定する (max. 84 MHz)
RCC_PCLK2Config(RCC_HCLK_Div2);
// PLCK1の分周比を設定する (max. 42 MHz)
RCC_PCLK1Config(RCC_HCLK_Div4);
// SYSCLKのクロックソースをPLLに切り替える
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource() != 0x08);
}
示例5: rcc_init
/*==================================================================================
* 函 数 名: rcc_init
* 参 数: None
* 功能描述: rcc初始化
* 返 回 值: None
* 备 注: 初始化系统时钟,需要注意stm32f10x.h中对系统时钟的定义
* 作 者: gaodb
* 创建时间: 2012.10
==================================================================================*/
static void rcc_init(void)
{
ErrorStatus HSEStartUpStatus;
RCC_DeInit();
wait_sys_peri_ready();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
RCC_HSEConfig(RCC_HSE_Bypass);//外部晶振为24M有源晶振
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
FLASH_SetLatency(FLASH_Latency_2);
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);//低速时钟最高36M
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
/* PLLCLK = 24MHz * 3 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_3);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
RCC_ClockSecuritySystemCmd(ENABLE); //Enable CSSON(Clock securuty system)
/* Enable the LSI OSC */
RCC_LSICmd(ENABLE); //为独立看门狗提供时钟
/* Wait till LSI is ready */
while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET)
{}
}
示例6: RCC_Configuration
/*******************************************************************************
* 配置RCC
*******************************************************************************/
void RCC_Configuration(void)
{
//复位RCC外部设备寄存器到默认值
RCC_DeInit(); //将RRC寄存器设为缺省值
//打开外部高速晶振
RCC_HSEConfig(RCC_HSE_ON);
//等待外部高速时钟准备好
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS) //外部高速时钟已经准别好
{
//开启FLASH的预取功能
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
//FLASH延迟2个周期
FLASH_SetLatency(FLASH_Latency_2);
//配置AHB(HCLK)时钟=SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//配置APB2(PCLK2)钟=AHB时钟
RCC_PCLK2Config(RCC_HCLK_Div1);
//配置APB1(PCLK1)钟=AHB 1/2时钟
RCC_PCLK1Config(RCC_HCLK_Div2);
//配置PLL时钟 == 外部高速晶体时钟*9 PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
//使能PLL时钟
RCC_PLLCmd(ENABLE);
//等待PLL时钟就绪
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
//配置系统时钟 = PLL时钟
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//检查PLL时钟是否作为系统时钟
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
//开启GPIO时钟
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOx, ENABLE);
//开启串口时钟
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
}
示例7: Tekdaqc_CalibrationInit
/**
* Initializes the calibration table for read operations.
*
* @param none
* @retval bool Always TRUE.
*/
bool Tekdaqc_CalibrationInit(void) {
FLASH_SetLatency(CALIBRATION_LATENCY);
CAL_TEMP_LOW = (*(__IO float*) CAL_TEMP_LOW_ADDR);
CAL_TEMP_HIGH = (*(__IO float*) CAL_TEMP_HIGH_ADDR);
CAL_TEMP_STEP = (*(__IO float*) CAL_TEMP_STEP_ADDR);
CAL_TEMP_CNT = (*(__IO uint32_t*) CAL_TEMP_CNT_ADDR);
COLD_JUNCTION_OFFSET_CAL = (*(__IO uint32_t*) COLD_JUNCTION_OFFSET_ADDR);
COLD_JUNCTION_GAIN_CAL = (*(__IO uint32_t*) COLD_JUNCTION_GAIN_CAL);
CALIBRATION_VALID = (*(__IO uint8_t*) CAL_VALID_ADDR) != 0xFF;
return TRUE;
}
示例8: RCC_Configuration
/*******************************************************************************
* ����RCC
*******************************************************************************/
void RCC_Configuration(void)
{
//��λRCC�ⲿ�豸�Ĵ�����Ĭ��ֵ
RCC_DeInit(); //��RRC�Ĵ�����Ϊȱʡֵ
//�����ⲿ���پ���
RCC_HSEConfig(RCC_HSE_ON);
//�ȴ��ⲿ����ʱ������
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS) //�ⲿ����ʱ���Ѿ�����
{
//����FLASH��Ԥȡ����
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
//FLASH�ӳ�2������
FLASH_SetLatency(FLASH_Latency_2);
//����AHB(HCLK)ʱ��=SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//����APB2(PCLK2)��=AHBʱ��
RCC_PCLK2Config(RCC_HCLK_Div1);
//����APB1(PCLK1)��=AHB 1/2ʱ��
RCC_PCLK1Config(RCC_HCLK_Div2);
//����PLLʱ�� == �ⲿ���پ���ʱ��*9 PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
//ʹ��PLLʱ��
RCC_PLLCmd(ENABLE);
//�ȴ�PLLʱ�Ӿ���
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
//����ϵͳʱ�� = PLLʱ��
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//����PLLʱ���Ƿ���Ϊϵͳʱ��
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
//����GPIOʱ��
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOx, ENABLE);
//��������ʱ��
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
}
示例9: RCC_Configuration
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : Configures the different system clocks.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* GPIOB Periph clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
/* I2C1 and I2C2 Periph clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1 | RCC_APB1Periph_I2C2, ENABLE);
}
示例10: RCC_Configuration
void RCC_Configuration(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2); // 36MZH
/* On STICE the PLL output clock is fixed to 48 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP |
RCC_APB1Periph_TIM2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIO_DISCONNECT |
RCC_APB2Periph_SPI1 | RCC_APB2Periph_GPIOB, ENABLE);
}
示例11: initPowerSubsystem
void initPowerSubsystem() {
RCC_MSIRangeConfig(RCC_MSIRange_4);
new_power_state = POWER_STATE_MED_SPEED;
currentCPU_HZ = powerStateClockFrequency(new_power_state);
SysTick_Config(powerStateClockFrequency(new_power_state) / configTICK_RATE_HZ);
current_power_state = new_power_state;
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range3);
FLASH_SetLatency(FLASH_Latency_0);
FLASH_PrefetchBufferCmd(DISABLE);
FLASH_ReadAccess64Cmd(DISABLE);
}
示例12: SetSysClock72
void SetSysClock72(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus != SUCCESS)
{
ErrorLoop();
};
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
}
示例13: System_ClockConfig
/**
* @fn void System_ClockConfig(void)
* @brief
* @li 시스템 클럭을 설정한다.
* @remarks
* @param void
* @return void
*/
void System_ClockConfig(void)
{
__IO ErrorStatus HSEStartUpStatus = SUCCESS;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* AHB 클럭설정 : HCLK = SYSCLK = 72MHz */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* APB2( high-speed ) 클럭 설정 PCLK2 = HCLK = 72MHz */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* APB1 (low-speed) 클럭 설정 PCLK1 = HCLK/2 = 36MHz */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLL 설정 : PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
}
示例14: ClkSwitch2HseSystemInit
void ClkSwitch2HseSystemInit (void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
RCC_HSICmd(DISABLE); //Turn of the internal RC;
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 10MHz * 7 = 70 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
}
示例15: fdi_clock_start_high_speed_internal
void fdi_clock_start_high_speed_internal(void) {
RCC_HSICmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
FLASH_SetLatency(FLASH_Latency_2);
RCC_PLLCmd(DISABLE);
RCC_PLLConfig(RCC_PLLSource_HSI, 16, 336, 4, 7); // SYSCLK 84MHz & USB 48MHz
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
}