C++ DEVCB_CPU_INPUT_LINE函数代码示例

{
	int state = !m_dma_eop || m_uart_dr || m_uart_tbre || m_fdc_dd0 || m_fdc_dd1 || m_fdc->get_irq() || m_fpu_irq || m_bus_irq2;

	pic8259_ir2_w(m_pic, state);
}

static IRQ_CALLBACK( wangpc_irq_callback )
{
	wangpc_state *state = device->machine().driver_data<wangpc_state>();

	return pic8259_acknowledge(state->m_pic);
}

static const struct pic8259_interface pic_intf =
{
	DEVCB_CPU_INPUT_LINE(I8086_TAG, INPUT_LINE_IRQ0),
	DEVCB_LINE_VCC,
	DEVCB_NULL
};


//-------------------------------------------------
//  I8255A_INTERFACE( ppi_intf )
//-------------------------------------------------

READ8_MEMBER( wangpc_state::ppi_pa_r )
{
	/*

        bit     description

	PORT_BIT( 0x040, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("B 6") PORT_CODE(KEYCODE_6_PAD)
	PORT_BIT( 0x080, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("B 7") PORT_CODE(KEYCODE_1_PAD)
	PORT_BIT( 0x100, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("B 8") PORT_CODE(KEYCODE_2_PAD)
	PORT_BIT( 0x200, IP_ACTIVE_HIGH, IPT_KEYPAD ) PORT_NAME("B 9") PORT_CODE(KEYCODE_3_PAD)

	PORT_START("CLEAR")
	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYPAD ) PORT_NAME("Clear") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_CHANGED_MEMBER(DEVICE_SELF, studio2_state, reset_w, 0)
INPUT_PORTS_END

/* Video */

static CDP1861_INTERFACE( studio2_cdp1861_intf )
{
	CDP1802_TAG,
	SCREEN_TAG,
	DEVCB_CPU_INPUT_LINE(CDP1802_TAG, COSMAC_INPUT_LINE_INT),
	DEVCB_CPU_INPUT_LINE(CDP1802_TAG, COSMAC_INPUT_LINE_DMAOUT),
	DEVCB_CPU_INPUT_LINE(CDP1802_TAG, COSMAC_INPUT_LINE_EF1)
};

static const rgb_t VISICOM_PALETTE[] =
{
    MAKE_RGB(0x00, 0x80, 0x00),
    MAKE_RGB(0x00, 0x00, 0xff),
    MAKE_RGB(0x00, 0xff, 0x00),
    MAKE_RGB(0xff, 0x00, 0x00)
};

READ_LINE_MEMBER( mpt02_state::rdata_r )
{
	return BIT(m_color, 0);

	CDP1869_PAL,
	cidelsa_pcb_r,
	cidelsa_charram_r,
	cidelsa_charram_w,
	DEVCB_DRIVER_LINE_MEMBER(cidelsa_state, prd_w)
};

static CDP1869_INTERFACE( draco_vis_intf )
{
	SCREEN_TAG,
	0,
	CDP1869_PAL,
	draco_pcb_r,
	draco_charram_r,
	draco_charram_w,
	DEVCB_CPU_INPUT_LINE(CDP1802_TAG, COSMAC_INPUT_LINE_EF1)
};

/* Video Start */

void cidelsa_state::video_start()
{
	// allocate memory
	m_pcbram = auto_alloc_array(machine(), UINT8, CIDELSA_CHARRAM_SIZE);
	m_charram = auto_alloc_array(machine(), UINT8, CIDELSA_CHARRAM_SIZE);

	// register for state saving
	save_item(NAME(m_cdp1869_pcb));
	save_pointer(NAME(m_pcbram), CIDELSA_CHARRAM_SIZE);
	save_pointer(NAME(m_charram), CIDELSA_CHARRAM_SIZE);
}

	PORT_CONFNAME( 0x03, 0x03, "IDA character set")
	PORT_CONFSETTING(0x00, "Greek")
	PORT_CONFSETTING(0x01, "Norwegian (Codepage 860)")
	PORT_CONFSETTING(0x02, "Portugese (Codepage 865)")
	PORT_CONFSETTING(0x03, "Default (Codepage 437)")
	PORT_CONFNAME( 0x1C, 0x00, "CGA monitor type")
	PORT_CONFSETTING(0x00, "Colour RGB")
	PORT_CONFSETTING(0x04, "Mono RGB")
	PORT_CONFSETTING(0x0C, "Television")
	PORT_BIT ( 0xE0, 0x40, IPT_UNUSED ) /* Chipset is always PPC512 */

INPUT_PORTS_END

static const pc_lpt_interface pc_lpt_config =
{
	DEVCB_CPU_INPUT_LINE("maincpu", 0)
};

static const floppy_format_type ibmpc_floppy_formats[] = {
	FLOPPY_PC_FORMAT,
	FLOPPY_MFI_FORMAT,
	NULL
};

static SLOT_INTERFACE_START( ibmpc_floppies )
	SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
SLOT_INTERFACE_END

SLOT_INTERFACE_START(amstr_com)
	SLOT_INTERFACE("microsoft_mouse", MSFT_SERIAL_MOUSE)
	SLOT_INTERFACE("mouse_systems_mouse", MSYSTEM_SERIAL_MOUSE)

        CA1: N/C
        CA2: input: "TDISP" (one of the higher bits in the video line counter, a mirror of the D5 bit from beezer_line_r), done in /video/beezer.c
        CB1: ASH1 to via 1
        CB2: ASH2 to via 1
    /IRQ: to main m6809 cpu
    /RES: from main reset generator/watchdog/button

    TODO: find a better way to attach ca2 read to beezer_line_r
    */
const via6522_interface b_via_0_interface =
{
	/*inputs : A/B         */ DEVCB_DRIVER_MEMBER(beezer_state,b_via_0_pa_r), DEVCB_DRIVER_MEMBER(beezer_state,b_via_0_pb_r),
	/*inputs : CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_DEVICE_LINE_MEMBER("via6522_1", via6522_device, read_ca2), DEVCB_DRIVER_LINE_MEMBER(beezer_state, b_via_0_ca2_r), DEVCB_DEVICE_LINE_MEMBER("via6522_1", via6522_device, read_ca1),
	/*outputs: A/B         */ DEVCB_DRIVER_MEMBER(beezer_state,b_via_0_pa_w), DEVCB_DRIVER_MEMBER(beezer_state,b_via_0_pb_w),
	/*outputs: CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DEVICE_LINE_MEMBER("via6522_1", via6522_device, write_ca1),
	/*irq                  */ DEVCB_CPU_INPUT_LINE("maincpu", M6809_IRQ_LINE)
};

/* VIA 1 (U18 @3C on schematics)
    port A:
        bits 7-0: input/output: pbus
    port B:
        bit 7: output: TIMER1 OUT (used to gate NOISE (see below) to clock channel 1 of 6840, plus acts as channel 0 by itself)
        bit 6: input: NOISE (from mm5837 14-bit LFSR, which also connects to clock above)
        bit 5: output?: N/C
        bit 4: output?: FMSEL1 (does not appear elsewhere on schematics! what does this do? needs tracing) - always 0?
        bit 3: output?: FMSEL0 (does not appear elsewhere on schematics! what does this do? needs tracing) - always 0?
        bit 2: output?: AM (does not appear elsewhere on schematics! what does this do? needs tracing) - always 0?
        bit 1: output: FM or AM (appears to control some sort of suppression or filtering change of the post-DAC amplifier when enabled, only during the TIMER1 OUT time-slot of the multiplexer, see page 1B 3-3 of schematics) - always 0? why is there a special circuit for it?
        bit 0: output?: DMOD DISABLE (does not appear elsewhere on schematics! what does this do? needs tracing) - on startup is 0, turns to 1 and stays that way?
    port C:

	return data;
}

WRITE_LINE_MEMBER( grip_device::speaker_w )
{
	int level = state && ((m_vol1 << 1) | m_vol0);

	m_speaker->level_w(level);
}

static Z80STI_INTERFACE( sti_intf )
{
	0,                                                      // serial receive clock
	0,                                                      // serial transmit clock
	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),         // interrupt
	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, grip_device, sti_gpio_r),    // GPIO read
	DEVCB_NULL,                                             // GPIO write
	DEVCB_NULL,                                             // serial input
	DEVCB_NULL,                                             // serial output
	DEVCB_NULL,                                             // timer A output
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, grip_device, speaker_w),    // timer B output
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF, z80sti_device, tc_w),                                // timer C output
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF, z80sti_device, rc_w)                                 // timer D output
};


//-------------------------------------------------
//  z80_daisy_config grip_daisy_chain
//-------------------------------------------------

const via6522_interface mirage_via =
{
	DEVCB_HANDLER(mirage_via_read_porta),
	DEVCB_HANDLER(mirage_via_read_portb),
	DEVCB_HANDLER(mirage_via_read_ca1),
	DEVCB_HANDLER(mirage_via_read_cb1),
	DEVCB_HANDLER(mirage_via_read_ca2),
	DEVCB_HANDLER(mirage_via_read_cb2),
	DEVCB_HANDLER(mirage_via_write_porta),
	DEVCB_HANDLER(mirage_via_write_portb),
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_CPU_INPUT_LINE("maincpu", M6809_IRQ_LINE)
};

static ACIA6850_INTERFACE( mirage_acia6850_interface )
{
	0,				// tx clock
	0,				// rx clock
	DEVCB_NULL,			// rx in
	DEVCB_NULL,			// rx out
	DEVCB_NULL,			// cts in
	DEVCB_NULL,			// rts out
	DEVCB_NULL,			// dcd in
	DEVCB_CPU_INPUT_LINE("maincpu", M6809_FIRQ_LINE)
};

static LEGACY_FLOPPY_OPTIONS_START(mirage)

	m_pias->cb1_w(m_cb1);
}

static const pia6821_interface pia21_intf =
{
	DEVCB_DRIVER_MEMBER(s7_state, dac_r),       /* port A in */
	DEVCB_NULL,     /* port B in */
	DEVCB_NULL,     /* line CA1 in */
	DEVCB_LINE_GND,     /* line CB1 in */
	DEVCB_LINE_VCC,     /* line CA2 in */
	DEVCB_NULL,     /* line CB2 in */
	DEVCB_DRIVER_MEMBER(s7_state, sound_w),     /* port A out */
	DEVCB_DRIVER_MEMBER(s7_state, sol2_w),      /* port B out */
	DEVCB_DRIVER_LINE_MEMBER(s7_state, pia21_ca2_w),        /* line CA2 out */
	DEVCB_DRIVER_LINE_MEMBER(s7_state, pia21_cb2_w),        /* line CB2 out */
	DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),        /* IRQA */
	DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)     /* IRQB */
};

static const pia6821_interface pia22_intf =
{
	DEVCB_NULL,     /* port A in */
	DEVCB_NULL,     /* port B in */
	DEVCB_LINE_GND,     /* line CA1 in */
	DEVCB_LINE_GND,     /* line CB1 in */
	DEVCB_NULL,     /* line CA2 in */
	DEVCB_NULL,     /* line CB2 in */
	DEVCB_DRIVER_MEMBER(s7_state, sol0_w),      /* port A out */
	DEVCB_DRIVER_MEMBER(s7_state, sol1_w),      /* port B out */
	DEVCB_DRIVER_LINE_MEMBER(s7_state, pia22_ca2_w),        /* line CA2 out */
	DEVCB_DRIVER_LINE_MEMBER(s7_state, pia22_cb2_w),        /* line CB2 out */

	if (offset == 0x10)
	{
		m_crtc->dack_w(space, 0, data);
	}
	else
	{
		return prog_space.write_byte(offset, data);
	}
}

// busack on cpu connects to bai pin
static Z80DMA_INTERFACE( dma_intf )
{
	//DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT), //busreq - connects to busreq on cpu
	DEVCB_DRIVER_LINE_MEMBER(zorba_state, busreq_w), //busreq - connects to busreq on cpu
	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), //int/pulse - connects to IRQ0 on cpu
	DEVCB_NULL, //ba0 - not connected
	DEVCB_DRIVER_MEMBER(zorba_state, memory_read_byte),
	DEVCB_DRIVER_MEMBER(zorba_state, memory_write_byte),
	DEVCB_DRIVER_MEMBER(zorba_state, io_read_byte),
	DEVCB_DRIVER_MEMBER(zorba_state, io_write_byte),
};

static SLOT_INTERFACE_START( zorba_floppies )
	SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
SLOT_INTERFACE_END

// COM port
static const i8251_interface u0_intf =
{
	DEVCB_NULL,

		else
		{
			state->m_i8751_return = port | 0x8000;
			device_set_input_line(device, 6, HOLD_LINE);
			state->m_i8751_needs_ack = 1;
		}

		state->m_latch = 0;
	}

	device_set_input_line(device, 7, HOLD_LINE);	/* VBL */
}

static const ym3526_interface ym3526_config =
{
	DEVCB_CPU_INPUT_LINE("audiocpu", M6502_IRQ_LINE)
};

/*************************************
 *
 *  Machine driver
 *
 *************************************/

static MACHINE_START( karnov )
{
	karnov_state *state = machine.driver_data<karnov_state>();

	state->m_maincpu = machine.device("maincpu");
	state->m_audiocpu = machine.device("audiocpu");

*/

WRITE_LINE_MEMBER( luxor_55_21046_device::dma_int_w )
{
	m_dma_irq = state;

	// FDC and DMA interrupts are wire-ORed to the Z80
	device_set_input_line(m_maincpu, INPUT_LINE_IRQ0, m_fdc_irq | m_dma_irq);
}

static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }

static Z80DMA_INTERFACE( dma_intf )
{
	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_HALT),
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, luxor_55_21046_device, dma_int_w),
	DEVCB_NULL,
	DEVCB_MEMORY_HANDLER(Z80_TAG, PROGRAM, memory_read_byte),
	DEVCB_MEMORY_HANDLER(Z80_TAG, PROGRAM, memory_write_byte),
	DEVCB_MEMORY_HANDLER(Z80_TAG, IO, memory_read_byte),
	DEVCB_MEMORY_HANDLER(Z80_TAG, IO, memory_write_byte)
};


//-------------------------------------------------
//  wd17xx_interface fdc_intf
//-------------------------------------------------

WRITE_LINE_MEMBER( luxor_55_21046_device::fdc_intrq_w )
{

		data &= m_io_x3->read();
	if (!BIT(m_keylatch, 4))
		data &= m_io_x4->read();
	if (!BIT(m_keylatch, 5))
		data &= m_io_x5->read();
	if (!BIT(m_keylatch, 6))
		data &= m_io_x6->read();
	if (!BIT(m_keylatch, 7))
		data &= m_io_x7->read();

	return data;
};

Z80PIO_INTERFACE( super80_pio_intf )
{
	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
	DEVCB_NULL,
	DEVCB_DRIVER_MEMBER(super80_state, pio_port_a_w),
	DEVCB_NULL,         /* portA ready active callback (not used in super80) */
	DEVCB_DRIVER_MEMBER(super80_state,pio_port_b_r),
	DEVCB_NULL,
	DEVCB_NULL          /* portB ready active callback (not used in super80) */
};


/**************************** CASSETTE ROUTINES *****************************************************************/

void super80_state::super80_cassette_motor( UINT8 data )
{
	if (data)
		m_cassette->change_state(CASSETTE_MOTOR_DISABLED,CASSETTE_MASK_MOTOR);

	DEVCB_LINE(h19_ace_irq), // interrupt
	DEVCB_NULL,
	DEVCB_NULL
};

static const mc6845_interface h19_crtc6845_interface =
{
	"screen",
	8 /*?*/,
	NULL,
	h19_update_row,
	NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_NULL,
	DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_NMI), // frame pulse
	NULL
};

/* F4 Character Displayer */
static const gfx_layout h19_charlayout =
{
	8, 10,					/* 8 x 10 characters */
	128,					/* 128 characters */
	1,					/* 1 bits per pixel */
	{ 0 },					/* no bitplanes */
	/* x offsets */
	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	/* y offsets */
	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8 },
	8*16					/* every char takes 16 bytes */

WRITE_LINE_MEMBER( imi5000h_device::ctc_z1_w )
{
	m_ctc->trg2(state);
	m_ctc->trg3(state);
}

WRITE_LINE_MEMBER( imi5000h_device::ctc_z2_w )
{
	//m_memory_enable = state;
	m_maincpu->set_input_line(INPUT_LINE_NMI, state);
}

static Z80CTC_INTERFACE( ctc_intf )
{
	DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z0_w),
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z1_w),
	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z2_w)
};


//-------------------------------------------------
//  Z80PIO_INTERFACE( pio0_intf )
//-------------------------------------------------

READ8_MEMBER( imi5000h_device::pio0_pa_r )
{
	/*

	    bit     description

}

static const pia6821_interface d6800_mc6821_intf =
{
	DEVCB_DRIVER_MEMBER(d6800_state, d6800_keyboard_r), /* port A input */
	DEVCB_DRIVER_MEMBER(d6800_state, d6800_cassette_r), /* port B input */
	DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_keydown_r), /* CA1 input */
	DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_rtc_pulse), /* CB1 input */
	DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_fn_key_r),  /* CA2 input */
	DEVCB_NULL,                     /* CB2 input */
	DEVCB_DRIVER_MEMBER(d6800_state, d6800_keyboard_w), /* port A output */
	DEVCB_DRIVER_MEMBER(d6800_state, d6800_cassette_w), /* port B output */
	DEVCB_NULL,                     /* CA2 output */
	DEVCB_DRIVER_LINE_MEMBER(d6800_state, d6800_screen_w),  /* CB2 output */
	DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE),    /* IRQA output */
	DEVCB_CPU_INPUT_LINE("maincpu", M6800_IRQ_LINE)     /* IRQB output */
};

/* Machine Initialization */

void d6800_state::machine_start()
{
}

void d6800_state::machine_reset()
{
	m_beeper->set_state(0);
	m_rtc = 0;
	m_cass_data[0] = 0;
	m_cass_data[1] = 0;