C++ DEFINE_TEST_CASE函数代码示例

/**
 * \brief Run IOPORT unit tests
 *
 * Initializes the clock system, board and serial output, then sets up the
 * IOPORT Service unit test suite and runs it.
 */
int main(void)
{
	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.charlength = CONF_TEST_CHARLENGTH,
		.paritytype = CONF_TEST_PARITY,
		.stopbits   = CONF_TEST_STOPBITS,
	};

	board_init();
	sysclk_init();
	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);

	DEFINE_TEST_CASE(ioport_port_test, NULL, run_ioport_port_test, NULL,
			"Test setting of various IOPORT functions");
	DEFINE_TEST_CASE(ioport_pin_test, NULL, run_ioport_pin_test, NULL,
			"Test IOPORT pin level is getting changed");

	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(ioport_test) = {
		&ioport_port_test,
		&ioport_pin_test,
	};

	/* Define the test suite */
	DEFINE_TEST_SUITE(ioport_suite, ioport_test,
			"MEGARF IOPORT test suite");

	/* Run all tests in the suite */
	test_suite_run(&ioport_suite);

	while (1) {
		/* Intentionally left empty. */
	}
}

/**
 * \brief Run TRNG unit tests
 *
 * Initializes the system and serial output, then sets up the
 * TRNG unit test suite and runs it.
 */
int main(void)
{
	system_init();
	cdc_uart_init();

	/* Define Test Cases */
	DEFINE_TEST_CASE(trng_polling_read_test,
			NULL,
			run_trng_polling_read_test,
			NULL,
			"Testing TRNG polling read");

	DEFINE_TEST_CASE(trng_callback_read_test,
			NULL,
			run_trng_callback_read_test,
			NULL,
			"Testing TRNG callback read");

	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(trng_tests) = {
		&trng_polling_read_test,
		&trng_callback_read_test,
	};

	/* Define the test suite */
	DEFINE_TEST_SUITE(trng_test_suite, trng_tests,
			"SAM TRNG driver test suite");

	/* Run all tests in the suite*/
	test_suite_run(&trng_test_suite);

	while (true) {
		/* Intentionally left empty */
	}
}

void main_cdc_set_dtr(bool b_enable)
{
	if (b_enable) {
		DEFINE_TEST_CASE(at86rfx_init_test, NULL, run_at86rfx_init_test,
				NULL, "AT86RFx initialization");
		DEFINE_TEST_CASE(at86rfx_reg_access_test, NULL,
				run_at86rfx_reg_access_test, NULL,
				"Read/write AT86RFx register access");
		DEFINE_TEST_CASE(at86rfx_tx_test, NULL, run_at86rfx_tx_test,
				NULL, "AT86RFx frame transmission");

		// Put test case addresses in an array.
		DEFINE_TEST_ARRAY(at86rfx_tests) = {
		&at86rfx_init_test,
					&at86rfx_reg_access_test,
					&at86rfx_tx_test};

		// Define the test suite.
		DEFINE_TEST_SUITE(at86rfx_suite, at86rfx_tests,
				"AT86RFx component unit test suite");

		// Run all tests in the test suite.
		test_suite_run(&at86rfx_suite);
	} else {

	}
}

/**
 * \brief Run Sleep Manager unit tests
 *
 * Initializes the clock system, board and serial output, then sets up the
 * Sleep Manager unit test suite and runs it.
 */
int main(void)
{
    const usart_serial_options_t usart_serial_options = {
        .baudrate   = CONF_TEST_BAUDRATE,
        .charlength = CONF_TEST_CHARLENGTH,
        .paritytype = CONF_TEST_PARITY,
        .stopbits   = CONF_TEST_STOPBITS,
    };

    board_init();
    sysclk_init();
    stdio_serial_init(CONF_TEST_USART, &usart_serial_options);

    DEFINE_TEST_CASE(sleep_trigger_test, NULL, run_sleep_trigger_test, NULL,
                     "Test sleep interrupt is getting triggered");
    DEFINE_TEST_CASE(set_functions_test, NULL, run_set_functions_test, NULL,
                     "Test setting of various lock modes");

    /* Put test case addresses in an array */
    DEFINE_TEST_ARRAY(sleep_manager_tests) = {
        &set_functions_test,
        &sleep_trigger_test,
    };

    /* Define the test suite */
    DEFINE_TEST_SUITE(sleep_manager_suite, sleep_manager_tests,
                      "MEGARF SLEEP MANAGER test suite");

    /* Run all tests in the suite */
    test_suite_run(&sleep_manager_suite);

    while (1) {
        /* Intentionally left empty. */
    }
}

void main_cdc_set_dtr(bool b_enable)
{
	if (b_enable) {
		DEFINE_TEST_CASE(nlme_reset_test, NULL, run_nlme_reset_test,
				NULL, "NWK Reset request");
		DEFINE_TEST_CASE(nlme_start_test, NULL, run_nlme_start_test,
				NULL, "NWK Start request");
		DEFINE_TEST_CASE(zid_rec_connect_test, NULL,
				run_zid_rec_connect_test,
				NULL, "Push button pairing Request");

		/* Put test case addresses in an array. */
		DEFINE_TEST_ARRAY(nwk_tests) = {
			&nlme_reset_test,
			&nlme_start_test,
			&zid_rec_connect_test
		};

		/* Define the test suite. */
		DEFINE_TEST_SUITE(nwk_suite, nwk_tests,
				"NWK unit test suite");

		/* Run all tests in the test suite. */
		test_suite_run(&nwk_suite);
	} else {
	}
}

/**
 * \brief Run ADC unit tests
 *
 * Initializes the system and serial output, then sets up the
 * ADC unit test suite and runs it.
 */
int main(void)
{
	system_init();
	delay_init();
	cdc_uart_init();
	test_dac_init();

	/* Define Test Cases */
	DEFINE_TEST_CASE(adc_init_test,
			NULL,
			run_adc_init_test,
			NULL,
			"Testing ADC Initialization");

	DEFINE_TEST_CASE(adc_polled_mode_test,
			NULL,
			run_adc_polled_mode_test,
			NULL,
			"Testing ADC single ended mode by polling");

	DEFINE_TEST_CASE(adc_callback_mode_test,
			setup_adc_callback_mode_test,
			run_adc_callback_mode_test,
			cleanup_adc_callback_mode_test,
			"Testing ADC single ended mode by interrupt");

	DEFINE_TEST_CASE(adc_average_mode_test,
			setup_adc_average_mode_test,
			run_adc_average_mode_test,
			NULL,
			"Testing ADC average mode");

	DEFINE_TEST_CASE(adc_window_mode_test,
			setup_adc_window_mode_test,
			run_adc_window_mode_test,
			cleanup_adc_window_mode_test,
			"Testing ADC window mode");

	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(adc_tests) = {
		&adc_init_test,
		&adc_polled_mode_test,
		&adc_callback_mode_test,
		&adc_average_mode_test,
		&adc_window_mode_test,
	};

	/* Define the test suite */
	DEFINE_TEST_SUITE(adc_test_suite, adc_tests,
			"SAM ADC driver test suite");

	/* Run all tests in the suite*/
	test_suite_run(&adc_test_suite);

	while (true) {
		/* Intentionally left empty */
	}
}

/**
 * \brief Run AFEC driver unit tests.
 */
int main(void)
{
	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.paritytype = CONF_TEST_PARITY
	};

	/* Initialize the system clock and board */
	sysclk_init();
	board_init();

	sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);

	afec_enable(AFEC0);

	struct afec_config afec_cfg;

	afec_get_config_defaults(&afec_cfg);
	afec_init(AFEC0, &afec_cfg);

	/*
	 * Because the internal ADC offset is 0x800, it should cancel it and shift
	 * down to 0.
	 */
	afec_channel_set_analog_offset(AFEC0, AFEC_CHANNEL_1, 0x800);

	afec_channel_enable(AFEC0, AFEC_CHANNEL_1);

#if defined(__GNUC__)
	setbuf(stdout, NULL);
#endif

	/* Define all the test cases */
	DEFINE_TEST_CASE(afec_tc_trig_test, NULL, run_afec_tc_trig_test, NULL,
			"AFEC TC Trig test");
	DEFINE_TEST_CASE(afec_comp_test, NULL, run_afec_comp_test,
			NULL, "AFEC Comparison Window test");

	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(afec_tests) = {
		&afec_tc_trig_test,
		&afec_comp_test,
	};

	/* Define the test suite */
	DEFINE_TEST_SUITE(afec_suite, afec_tests,
			"SAM AFEC driver test suite");

	/* Run all tests in the test suite */
	test_suite_run(&afec_suite);

	while (1) {
		/* Busy-wait forever. */
	}
}

/**
 * \brief Run WDT unit tests
 *
 * Initializes the system and serial output, then sets up the
 * WDT unit test suite and runs it.
 */
int main(void)
{
	/* Check whether reset cause was Watchdog */
#if (SAML21)
	wdr_flag = (system_get_reset_cause() & RSTC_RCAUSE_WDT);
#else
	wdr_flag = (system_get_reset_cause() & PM_RCAUSE_WDT);
#endif
	system_init();

	/* Reset the Watchdog count */
	wdt_reset_count();

	struct wdt_conf config_wdt;
	/* Get the Watchdog default configuration */
	wdt_get_config_defaults(&config_wdt);
	if(wdr_flag) {
		config_wdt.enable = false;
	}
	/* Set the desired configuration */
#if !(SAML21)
	config_wdt.clock_source         = CONF_WDT_GCLK_GEN;
#endif
	config_wdt.timeout_period       = CONF_WDT_TIMEOUT_PERIOD;
	config_wdt.early_warning_period = CONF_WDT_EARLY_WARNING_PERIOD;
	wdt_set_config(&config_wdt);

	cdc_uart_init();

	DEFINE_TEST_CASE(wdt_early_warning_test, NULL,
			run_wdt_early_warning_test, wait_for_wdt_reset,
			"WDT Early Warning Test");

	DEFINE_TEST_CASE(reset_cause_test, NULL,
			run_reset_cause_test, NULL,
			"Confirming Watchdog Reset");

	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(wdt_tests) = {
			&wdt_early_warning_test,
			&reset_cause_test,
			};

	/* Define the test suite */
	DEFINE_TEST_SUITE(wdt_suite, wdt_tests,
			"SAM WDT driver test suite");

	/* Run all tests in the suite*/
	test_suite_run(&wdt_suite);

	while (1) {
		/* Intentionally left empty */
	}

}

/**
 * \brief Run spinner widget unit tests
 */
int main (void)
{
	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.charlength = CONF_TEST_CHARLENGTH,
		.paritytype = CONF_TEST_PARITY,
		.stopbits   = CONF_TEST_STOPBITS,
	};

	sysclk_init();
	board_init();
	gfx_mono_init();

	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);


	// Define all the test cases
	DEFINE_TEST_CASE(single_spinner_spincollection_test, NULL,
			run_single_spinner_spincollection_test, NULL,
			"Single spinners in spincollection test");
	DEFINE_TEST_CASE(two_spinners_spincollection_test, NULL,
			run_two_spinners_spincollection_test, NULL,
			"Two spinners in spincollection test");
	DEFINE_TEST_CASE(three_spinners_spincollection_test, NULL,
			run_three_spinners_spincollection_test, NULL,
			"Three spinners in spincollection test");
	DEFINE_TEST_CASE(cancel_spinner_spincollection_test, NULL,
			run_cancel_spinner_spincollection_test, NULL,
			"Cancel spinner choice test");
	DEFINE_TEST_CASE(event_back_spincollection_test, NULL,
			run_event_back_spincollection_test, NULL,
			"Event back spincollection test");

	// Put test case addresses in an array
	DEFINE_TEST_ARRAY(spinctrl_tests) = {
		&single_spinner_spincollection_test,
		&two_spinners_spincollection_test,
		&three_spinners_spincollection_test,
		&event_back_spincollection_test,
		&cancel_spinner_spincollection_test,
	};

	// Define the test suite
	DEFINE_TEST_SUITE(spinctrl_suite, spinctrl_tests,
			"Spinner widget with test suite");

	// Set up the test data pointer and run all tests in the suite
	test_suite_run(&spinctrl_suite);

	while (1) {
		/* Intentionally left empty. */
	}
}

/**
 * \brief Run CRC driver unit tests
 */
int main (void)
{
	const usart_serial_options_t usart_serial_options = {
		.baudrate     = CONF_TEST_BAUDRATE,
		.charlength   = CONF_TEST_CHARLENGTH,
		.paritytype   = CONF_TEST_PARITY,
		.stopbits     = CONF_TEST_STOPBITS,
	};

	sysclk_init();
	board_init();
	sleepmgr_init();

	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);

	DEFINE_TEST_CASE(crc_32bit_io_test, NULL,
		run_32bit_io_test,
		NULL, "32bit CRC on simulated IO data test");

	DEFINE_TEST_CASE(crc_16bit_io_test, NULL,
		run_16bit_io_test,
		NULL, "16bit CRC on simulated IO data test");

	DEFINE_TEST_CASE(crc_32bit_dma_test, NULL, run_32bit_dma_test,
		NULL, "32bit CRC DMA data test");

	DEFINE_TEST_CASE(crc_16bit_dma_test, NULL, run_16bit_dma_test,
		NULL, "16bit CRC DMA data test");

	DEFINE_TEST_CASE(crc_32bit_flash_range_test, NULL, run_flash_test,
		NULL, "32bit CRC flash range test");

	// Put test case addresses in an array
	DEFINE_TEST_ARRAY(crc_tests) = {
		&crc_32bit_io_test,
		&crc_16bit_io_test,
		&crc_32bit_dma_test,
		&crc_16bit_dma_test,
		&crc_32bit_flash_range_test,
	};

	// Define the test suite
	DEFINE_TEST_SUITE(crc_suite, crc_tests, "XMEGA CRC driver test suite");

	test_suite_run(&crc_suite);

	while (1) {
		// Intentionally left blank
	}
}

/**
 * \brief Run MEM2MEM driver unit tests.
 */
int main(void)
{
	uint32_t i;
	const usart_serial_options_t uart_serial_options = {
		.baudrate = CONF_TEST_BAUDRATE,
		.paritytype = CONF_TEST_PARITY
	};

	/* Initialize the system. */
	sysclk_init();
	board_init();

	/* Configure console UART. */
	sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
	stdio_serial_init(CONF_TEST_UART, &uart_serial_options);

	/* Initialize src buffer */
	for (i = 0; i < MEM_SIZE8/2; i ++) {
		src_mem8[i] = (i % 10) + '0';
	}
	for (;i < MEM_SIZE8; i ++) {
		src_mem8[i] = (i % ('z'-'a')) + 'a';
	}

	/* Define all the test cases */
	DEFINE_TEST_CASE(low_level_test, NULL, run_low_level_transfer_test,
			NULL, "Low Level APIs data transfer test");
	DEFINE_TEST_CASE(transfer_wait_test, NULL, run_transfer_wait_test,
			NULL, "M2M APIs data transfer wait test");
	DEFINE_TEST_CASE(transfer_job_test, NULL, run_transfer_job_test,
			NULL, "M2M APIs data transfer job test");

	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(mem2mem_tests) = {
		&low_level_test,
		&transfer_wait_test,
		&transfer_job_test
	};

	/* Define the test suite */
	DEFINE_TEST_SUITE(mem2mem_suite, mem2mem_tests,
			"SAM MEM2MEM driver test suite");

	/* Run all tests in the test suite */
	test_suite_run(&mem2mem_suite);

	while (1) {
		/* Busy-wait forever */
	}
}

/**
 * \brief Run ADC unit tests
 *
 * Initializes the clock system, board and serial output, then sets up the
 * ADC unit test suite and runs it.
 */
int main(void)
{

	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.charlength = CONF_TEST_CHARLENGTH,
		.paritytype = CONF_TEST_PARITY,
		.stopbits   = CONF_TEST_STOPBITS,
	};

	board_init();
	sysclk_init();
	sleepmgr_init();
	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);

	// Define single ended conversion test cases
	DEFINE_TEST_CASE(single_ended_12bit_conversion_test, NULL,
			run_single_ended_12bit_conversion_test, NULL,
			"Single ended conversion with 12-bit result");
	DEFINE_TEST_CASE(single_ended_8bit_conversion_test, NULL,
			run_single_ended_8bit_conversion_test, NULL,
			"Single ended conversion with 8-bit result");

	// Define differential conversion test cases
	DEFINE_TEST_CASE(differential_conversion_test, NULL,
			run_differential_12bit_conversion_test, NULL,
			"Differential conversion with 12-bit result");
	DEFINE_TEST_CASE(differential_conversion_with_gain_test, NULL,
			run_differential_12bit_with_gain_conversion_test, NULL,
			"Differential conversion with 12-bit result and gain");

	// Put test case addresses in an array
	DEFINE_TEST_ARRAY(adc_tests) = {
		&single_ended_12bit_conversion_test,
		&single_ended_8bit_conversion_test,
		&differential_conversion_test,
		&differential_conversion_with_gain_test,
	};

	// Define the test suite
	DEFINE_TEST_SUITE(adc_suite, adc_tests,
			"XMEGA ADC driver test suite");

	// Run all tests in the suite
	test_suite_run(&adc_suite);

	while (1) {
		// Intentionally left empty.
	}
}

/**
 * \brief Run DataFlash component unit tests
 *
 * Initializes the clock system, board, serial output and DataFlash, then sets
 * up the DataFlash unit test suite and runs it.
 */
int main(void)
{
	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.charlength = CONF_TEST_CHARLENGTH,
		.paritytype = CONF_TEST_PARITY,
		.stopbits   = CONF_TEST_STOPBITS,
	};

	// Initialize the board and all the peripheral required
	sysclk_init();
	board_init();
	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);
	at45dbx_init();

	// Define all the test cases
	DEFINE_TEST_CASE(memory_check_test, NULL, run_memory_check_test, NULL,
			"Memory check");
	DEFINE_TEST_CASE(byte_access_test, NULL, run_byte_access_test, NULL,
			"Read/write byte access");
	DEFINE_TEST_CASE(sector_access_test, NULL, run_sector_access_test, NULL,
			"Read/write sector access");
	DEFINE_TEST_CASE(multiple_sector_access_test, NULL,
			run_multiple_sector_access_test, NULL,
			"Read/write multiple sector access");
	DEFINE_TEST_CASE(memory_range_check_test, NULL,
			run_memory_range_check_test, NULL,
			"Memory range address check");

	// Put test case addresses in an array.
	DEFINE_TEST_ARRAY(memory_tests) = {
		&memory_check_test,
		&byte_access_test,
		&sector_access_test,
		&multiple_sector_access_test,
		&memory_range_check_test
	};

	// Define the test suite.
	DEFINE_TEST_SUITE(memory_suite, memory_tests,
			"AT45dbx component unit test suite");

	// Run all tests in the test suite.
	test_suite_run(&memory_suite);

	while (1) {
		// Intentionally left empty.
	};
}

/**
 * \brief Application entry point for AT30TS(E)75x unit tests.
 *
 * \return Unused (ANSI-C compatibility).
 */
int main(void)
{
	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.charlength = CONF_TEST_CHARLENGTH,
		.paritytype = CONF_TEST_PARITY,
		.stopbits   = CONF_TEST_STOPBITS
	};

	sysclk_init();
	board_init();
	/* Initialize AT30TS(E)75x */
	at30tse_init();

	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);

	/* Define all the test cases */
	DEFINE_TEST_CASE(at30tse_test_read_temperature,
			NULL, run_test_read_temperature, NULL,
			"at30tse read temperature test");
#if BOARD_USING_AT30TSE != AT30TS75
	DEFINE_TEST_CASE(at30tse_test_write_data,
			NULL, run_test_write_data, NULL,
			"at30tse write data test");
	DEFINE_TEST_CASE(at30tse_test_read_data,
			NULL, run_test_read_compare_data, NULL,
			"at30tse read and compare data test");
#endif
	/* Put test case addresses in an array */
	DEFINE_TEST_ARRAY(at30tse_test_array) = {
			&at30tse_test_read_temperature,
#if BOARD_USING_AT30TSE != AT30TS75
			&at30tse_test_write_data,
			&at30tse_test_read_data,
#endif
	};

	/* Define the test suite */
	DEFINE_TEST_SUITE(at30tse_suite, at30tse_test_array,
			"at30tse driver test suite");

	/* Run all tests in the test suite */
	test_suite_run(&at30tse_suite);

	while (1) {
		/* Busy-wait forever */
	}
}

/**
 * \brief Run unit tests for MT48LC16m16a2tg7 SDRAM
 * \return 0  which should never occur.
 */
int main (void)
{

	const usart_serial_options_t usart_serial_options = {
		.baudrate   = CONF_TEST_BAUDRATE,
		.charlength = CONF_TEST_CHARLENGTH,
		.paritytype = CONF_TEST_PARITY,
		.stopbits   = CONF_TEST_STOPBITS,
	};
	sysclk_init();
	board_init();
	stdio_serial_init(CONF_TEST_USART, &usart_serial_options);
	sdramc_init(sysclk_get_cpu_hz());

	// Define all the test cases
	DEFINE_TEST_CASE(data_integrity_test, NULL, run_data_integrity_test,
			NULL, "Data integrity test");

	// Put test case addresses in an array
	DEFINE_TEST_ARRAY(ebi_sdram_tests) = {
		&data_integrity_test,
	};

	// Define the test suite
	DEFINE_TEST_SUITE(ebi_sdram_suite, ebi_sdram_tests,
			"UC3 EBI driver w/ SDRAM test suite");

	// Set up the test data pointer and run all tests in the suite
	test_set_data(&params);
	test_suite_run(&ebi_sdram_suite);

	while (true);

	return (0);
}