C++ CyIntDisable函数代码示例

    /*******************************************************************************
    * Function Name: UART_Debug_UartInit
    ********************************************************************************
    *
    * Summary:
    *  Configures the SCB for the UART operation.
    *
    * Parameters:
    *  None
    *
    * Return:
    *  None
    *
    *******************************************************************************/
    void UART_Debug_UartInit(void)
    {
        /* Configure UART interface */
        UART_Debug_CTRL_REG = UART_Debug_UART_DEFAULT_CTRL;

        /* Configure sub-mode: UART, SmartCard or IrDA */
        UART_Debug_UART_CTRL_REG = UART_Debug_UART_DEFAULT_UART_CTRL;

        /* Configure RX direction */
        UART_Debug_UART_RX_CTRL_REG = UART_Debug_UART_DEFAULT_UART_RX_CTRL;
        UART_Debug_RX_CTRL_REG      = UART_Debug_UART_DEFAULT_RX_CTRL;
        UART_Debug_RX_FIFO_CTRL_REG = UART_Debug_UART_DEFAULT_RX_FIFO_CTRL;
        UART_Debug_RX_MATCH_REG     = UART_Debug_UART_DEFAULT_RX_MATCH_REG;

        /* Configure TX direction */
        UART_Debug_UART_TX_CTRL_REG = UART_Debug_UART_DEFAULT_UART_TX_CTRL;
        UART_Debug_TX_CTRL_REG      = UART_Debug_UART_DEFAULT_TX_CTRL;
        UART_Debug_TX_FIFO_CTRL_REG = UART_Debug_UART_DEFAULT_TX_FIFO_CTRL;

    #if !(UART_Debug_CY_SCBIP_V0 || UART_Debug_CY_SCBIP_V1)
        UART_Debug_UART_FLOW_CTRL_REG = UART_Debug_UART_DEFAULT_FLOW_CTRL;
    #endif /* !(UART_Debug_CY_SCBIP_V0 || UART_Debug_CY_SCBIP_V1) */

        /* Configure interrupt with UART handler but do not enable it */
    #if(UART_Debug_SCB_IRQ_INTERNAL)
        CyIntDisable    (UART_Debug_ISR_NUMBER);
        CyIntSetPriority(UART_Debug_ISR_NUMBER, UART_Debug_ISR_PRIORITY);
        (void) CyIntSetVector(UART_Debug_ISR_NUMBER, &UART_Debug_SPI_UART_ISR);
    #endif /* (UART_Debug_SCB_IRQ_INTERNAL) */

        /* Configure WAKE interrupt */
    #if(UART_Debug_UART_RX_WAKEUP_IRQ)
        CyIntDisable    (UART_Debug_RX_WAKE_ISR_NUMBER);
        CyIntSetPriority(UART_Debug_RX_WAKE_ISR_NUMBER, UART_Debug_RX_WAKE_ISR_PRIORITY);
        (void) CyIntSetVector(UART_Debug_RX_WAKE_ISR_NUMBER, &UART_Debug_UART_WAKEUP_ISR);
    #endif /* (UART_Debug_UART_RX_WAKEUP_IRQ) */

        /* Configure interrupt sources */
        UART_Debug_INTR_I2C_EC_MASK_REG = UART_Debug_UART_DEFAULT_INTR_I2C_EC_MASK;
        UART_Debug_INTR_SPI_EC_MASK_REG = UART_Debug_UART_DEFAULT_INTR_SPI_EC_MASK;
        UART_Debug_INTR_SLAVE_MASK_REG  = UART_Debug_UART_DEFAULT_INTR_SLAVE_MASK;
        UART_Debug_INTR_MASTER_MASK_REG = UART_Debug_UART_DEFAULT_INTR_MASTER_MASK;
        UART_Debug_INTR_RX_MASK_REG     = UART_Debug_UART_DEFAULT_INTR_RX_MASK;
        UART_Debug_INTR_TX_MASK_REG     = UART_Debug_UART_DEFAULT_INTR_TX_MASK;

    #if(UART_Debug_INTERNAL_RX_SW_BUFFER_CONST)
        UART_Debug_rxBufferHead     = 0u;
        UART_Debug_rxBufferTail     = 0u;
        UART_Debug_rxBufferOverflow = 0u;
    #endif /* (UART_Debug_INTERNAL_RX_SW_BUFFER_CONST) */

    #if(UART_Debug_INTERNAL_TX_SW_BUFFER_CONST)
        UART_Debug_txBufferHead = 0u;
        UART_Debug_txBufferTail = 0u;
    #endif /* (UART_Debug_INTERNAL_TX_SW_BUFFER_CONST) */
    }

/*******************************************************************************
* Function Name: SPIM_DisableInt
********************************************************************************
*
* Summary:
*  Disable internal interrupt generation.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Theory:
*  Disable the internal interrupt output -or- the interrupt component itself.
*
*******************************************************************************/
void SPIM_DisableInt(void) 
{
    #if(SPIM_InternalTxInterruptEnabled)    
        CyIntDisable(SPIM_TX_ISR_NUMBER);
    #endif /* SPIM_InternalTxInterruptEnabled */
    
    #if(SPIM_InternalRxInterruptEnabled)           
        CyIntDisable(SPIM_RX_ISR_NUMBER);
    #endif /* SPIM_InternalRxInterruptEnabled */
}

/*******************************************************************************
* Function Name: emFile_SPI0_DisableInt
********************************************************************************
*
* Summary:
*  Disable internal interrupt generation.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Theory:
*  Disable the internal interrupt output -or- the interrupt component itself.
*
*******************************************************************************/
void emFile_SPI0_DisableInt(void) 
{
    #if(emFile_SPI0_InternalTxInterruptEnabled)    
        CyIntDisable(emFile_SPI0_TX_ISR_NUMBER);
    #endif /* emFile_SPI0_InternalTxInterruptEnabled */
    
    #if(emFile_SPI0_InternalRxInterruptEnabled)           
        CyIntDisable(emFile_SPI0_RX_ISR_NUMBER);
    #endif /* emFile_SPI0_InternalRxInterruptEnabled */
}

/*******************************************************************************
* Function Name: USBFS_1_Stop
********************************************************************************
*
* Summary:
*  This function shuts down the USB function including to release
*  the D+ Pullup and disabling the SIE.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Global variables:
*   USBFS_1_configuration: Contains current configuration number
*       which is set by the Host using SET_CONFIGURATION request.
*       Initialized to zero in this API.
*   USBFS_1_deviceAddress: Contains current device address. This
*       variable is initialized to zero in this API. Host starts to communicate
*      to device with address 0 and then set it to whatever value using
*      SET_ADDRESS request.
*   USBFS_1_deviceStatus: initialized to 0.
*       This is two bit variable which contain power status in first bit
*       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote
*       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.
*   USBFS_1_configurationChanged: This variable is set to one after
*       SET_CONFIGURATION request and cleared in this function.
*   USBFS_1_intiVar variable is set to zero
*
*******************************************************************************/
void USBFS_1_Stop(void) 
{

    #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)
        USBFS_1_Stop_DMA(USBFS_1_MAX_EP);     /* Stop all DMAs */
    #endif   /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */

    /* Disable the SIE */
    USBFS_1_CR0_REG &= (uint8)(~USBFS_1_CR0_ENABLE);
    /* Disable the d+ pullup */
    USBFS_1_USBIO_CR1_REG &= (uint8)(~USBFS_1_USBIO_CR1_USBPUEN);
    /* Disable USB in ACT PM */
    USBFS_1_PM_ACT_CFG_REG &= (uint8)(~USBFS_1_PM_ACT_EN_FSUSB);
    /* Disable USB block for Standby Power Mode */
    USBFS_1_PM_STBY_CFG_REG &= (uint8)(~USBFS_1_PM_STBY_EN_FSUSB);

    /* Disable the reset and EP interrupts */
    CyIntDisable(USBFS_1_BUS_RESET_VECT_NUM);
    CyIntDisable(USBFS_1_EP_0_VECT_NUM);
    #if(USBFS_1_EP1_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_1_VECT_NUM);
    #endif   /* End USBFS_1_EP1_ISR_REMOVE */
    #if(USBFS_1_EP2_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_2_VECT_NUM);
    #endif   /* End USBFS_1_EP2_ISR_REMOVE */
    #if(USBFS_1_EP3_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_3_VECT_NUM);
    #endif   /* End USBFS_1_EP3_ISR_REMOVE */
    #if(USBFS_1_EP4_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_4_VECT_NUM);
    #endif   /* End USBFS_1_EP4_ISR_REMOVE */
    #if(USBFS_1_EP5_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_5_VECT_NUM);
    #endif   /* End USBFS_1_EP5_ISR_REMOVE */
    #if(USBFS_1_EP6_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_6_VECT_NUM);
    #endif   /* End USBFS_1_EP6_ISR_REMOVE */
    #if(USBFS_1_EP7_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_7_VECT_NUM);
    #endif   /* End USBFS_1_EP7_ISR_REMOVE */
    #if(USBFS_1_EP8_ISR_REMOVE == 0u)
        CyIntDisable(USBFS_1_EP_8_VECT_NUM);
    #endif   /* End USBFS_1_EP8_ISR_REMOVE */

    /* Clear all of the component data */
    USBFS_1_configuration = 0u;
    USBFS_1_interfaceNumber = 0u;
    USBFS_1_configurationChanged = 0u;
    USBFS_1_deviceAddress  = 0u;
    USBFS_1_deviceStatus = 0u;
    USBFS_1_initVar = 0u;

}

    /*******************************************************************************
    * Function Name: SERIAL_UartInit
    ********************************************************************************
    *
    * Summary:
    *  Configures the SCB for the UART operation.
    *
    * Parameters:
    *  None
    *
    * Return:
    *  None
    *
    *******************************************************************************/
    void SERIAL_UartInit(void)
    {
        /* Configure UART interface */
        SERIAL_CTRL_REG = SERIAL_UART_DEFAULT_CTRL;

        /* Configure sub-mode: UART, SmartCard or IrDA */
        SERIAL_UART_CTRL_REG = SERIAL_UART_DEFAULT_UART_CTRL;

        /* Configure RX direction */
        SERIAL_UART_RX_CTRL_REG = SERIAL_UART_DEFAULT_UART_RX_CTRL;
        SERIAL_RX_CTRL_REG      = SERIAL_UART_DEFAULT_RX_CTRL;
        SERIAL_RX_FIFO_CTRL_REG = SERIAL_UART_DEFAULT_RX_FIFO_CTRL;
        SERIAL_RX_MATCH_REG     = SERIAL_UART_DEFAULT_RX_MATCH_REG;

        /* Configure TX direction */
        SERIAL_UART_TX_CTRL_REG = SERIAL_UART_DEFAULT_UART_TX_CTRL;
        SERIAL_TX_CTRL_REG      = SERIAL_UART_DEFAULT_TX_CTRL;
        SERIAL_TX_FIFO_CTRL_REG = SERIAL_UART_DEFAULT_TX_FIFO_CTRL;

        /* Configure interrupt with UART handler but do not enable it */
    #if(SERIAL_SCB_IRQ_INTERNAL)
        CyIntDisable    (SERIAL_ISR_NUMBER);
        CyIntSetPriority(SERIAL_ISR_NUMBER, SERIAL_ISR_PRIORITY);
        (void) CyIntSetVector(SERIAL_ISR_NUMBER, &SERIAL_SPI_UART_ISR);
    #endif /* (SERIAL_SCB_IRQ_INTERNAL) */

        /* Configure WAKE interrupt */
    #if(SERIAL_UART_RX_WAKEUP_IRQ)
        CyIntDisable    (SERIAL_RX_WAKE_ISR_NUMBER);
        CyIntSetPriority(SERIAL_RX_WAKE_ISR_NUMBER, SERIAL_RX_WAKE_ISR_PRIORITY);
        (void) CyIntSetVector(SERIAL_RX_WAKE_ISR_NUMBER, &SERIAL_UART_WAKEUP_ISR);
    #endif /* (SERIAL_UART_RX_WAKEUP_IRQ) */

        /* Configure interrupt sources */
        SERIAL_INTR_I2C_EC_MASK_REG = SERIAL_UART_DEFAULT_INTR_I2C_EC_MASK;
        SERIAL_INTR_SPI_EC_MASK_REG = SERIAL_UART_DEFAULT_INTR_SPI_EC_MASK;
        SERIAL_INTR_SLAVE_MASK_REG  = SERIAL_UART_DEFAULT_INTR_SLAVE_MASK;
        SERIAL_INTR_MASTER_MASK_REG = SERIAL_UART_DEFAULT_INTR_MASTER_MASK;
        SERIAL_INTR_RX_MASK_REG     = SERIAL_UART_DEFAULT_INTR_RX_MASK;
        SERIAL_INTR_TX_MASK_REG     = SERIAL_UART_DEFAULT_INTR_TX_MASK;

    #if(SERIAL_INTERNAL_RX_SW_BUFFER_CONST)
        SERIAL_rxBufferHead     = 0u;
        SERIAL_rxBufferTail     = 0u;
        SERIAL_rxBufferOverflow = 0u;
    #endif /* (SERIAL_INTERNAL_RX_SW_BUFFER_CONST) */

    #if(SERIAL_INTERNAL_TX_SW_BUFFER_CONST)
        SERIAL_txBufferHead = 0u;
        SERIAL_txBufferTail = 0u;
    #endif /* (SERIAL_INTERNAL_TX_SW_BUFFER_CONST) */
    }

/*******************************************************************************
* Function Name: quaddec_right_SetCounter
********************************************************************************
*
* Summary:
*  Sets the current value of the counter.
*
* Parameters:  
*  value:  The new value. Parameter type is signed and per the counter size  
*  setting.  
*
* Return: 
*  None.
*
* Global variables:
*  quaddec_right_count32SoftPart - modified to set hi 16 bit for current value 
*  of the 32-bit counter, when Counter size equal 32-bit.
*
* Reentrant:
*  No.
*
*******************************************************************************/
void quaddec_right_SetCounter(int32 value)
{    
    #if ((quaddec_right_COUNTER_SIZE == 8u) || (quaddec_right_COUNTER_SIZE == 16u))        
        uint16 count;         
    #endif  /* (quaddec_right_COUNTER_SIZE == 8u) || (quaddec_right_COUNTER_SIZE == 16u) */   
    
    #if (quaddec_right_COUNTER_SIZE == 8u)     
    
        count = (value ^ 0x80u);
        quaddec_right_Cnt8_WriteCounter(count);
        
    #endif  /* quaddec_right_COUNTER_SIZE == 8u */
    
    #if (quaddec_right_COUNTER_SIZE == 16u) 
    
        count = (value ^ 0x8000u);
        quaddec_right_Cnt16_WriteCounter(count);
        
    #endif  /* quaddec_right_COUNTER_SIZE == 16u */
    
    #if (quaddec_right_COUNTER_SIZE == 32u)
    
        CyIntDisable(quaddec_right_ISR_NUMBER);
        
        quaddec_right_Cnt16_WriteCounter(0x8000u);
        quaddec_right_count32SoftPart = value;
        
        CyIntEnable(quaddec_right_ISR_NUMBER);
        
    #endif  /* quaddec_right_COUNTER_SIZE == 32u */
}

    /*******************************************************************************
    * Function Name: I2C_1_I2CInit
    ********************************************************************************
    *
    * Summary:
    *  Configures the SCB for the I2C operation.
    *
    * Parameters:
    *  None
    *
    * Return:
    *  None
    *
    *******************************************************************************/
    void I2C_1_I2CInit(void)
    {
        /* Configure I2C interface */
        I2C_1_CTRL_REG     = I2C_1_I2C_DEFAULT_CTRL;
        I2C_1_I2C_CTRL_REG = I2C_1_I2C_DEFAULT_I2C_CTRL;

    #if(I2C_1_CY_SCBIP_V0)
        /* Adjust SDA filter settings. Ticket ID#150521 */
        I2C_1_SET_I2C_CFG_SDA_FILT_TRIM(I2C_1_EC_AM_I2C_CFG_SDA_FILT_TRIM);
    #endif /* (I2C_1_CY_SCBIP_V0) */

        /* Configure RX direction */
        I2C_1_RX_CTRL_REG      = I2C_1_I2C_DEFAULT_RX_CTRL;
        I2C_1_RX_FIFO_CTRL_REG = I2C_1_I2C_DEFAULT_RX_FIFO_CTRL;

        /* Set default address and mask */
        I2C_1_RX_MATCH_REG     = I2C_1_I2C_DEFAULT_RX_MATCH;

        /* Configure TX direction */
        I2C_1_TX_CTRL_REG      = I2C_1_I2C_DEFAULT_TX_CTRL;
        I2C_1_TX_FIFO_CTRL_REG = I2C_1_I2C_DEFAULT_TX_FIFO_CTRL;

        /* Configure interrupt with I2C handler but do not enable it */
        CyIntDisable    (I2C_1_ISR_NUMBER);
        CyIntSetPriority(I2C_1_ISR_NUMBER, I2C_1_ISR_PRIORITY);
    #if(!I2C_1_I2C_EXTERN_INTR_HANDLER)
        (void) CyIntSetVector(I2C_1_ISR_NUMBER, &I2C_1_I2C_ISR);
    #endif /* (I2C_1_I2C_EXTERN_INTR_HANDLER) */

        /* Configure interrupt sources */
    #if(!I2C_1_CY_SCBIP_V1_I2C_ONLY)
        I2C_1_INTR_SPI_EC_MASK_REG = I2C_1_I2C_DEFAULT_INTR_SPI_EC_MASK;
    #endif /* (!I2C_1_CY_SCBIP_V1_I2C_ONLY) */

        I2C_1_INTR_I2C_EC_MASK_REG = I2C_1_I2C_DEFAULT_INTR_I2C_EC_MASK;
        I2C_1_INTR_SLAVE_MASK_REG  = I2C_1_I2C_DEFAULT_INTR_SLAVE_MASK;
        I2C_1_INTR_MASTER_MASK_REG = I2C_1_I2C_DEFAULT_INTR_MASTER_MASK;
        I2C_1_INTR_RX_MASK_REG     = I2C_1_I2C_DEFAULT_INTR_RX_MASK;
        I2C_1_INTR_TX_MASK_REG     = I2C_1_I2C_DEFAULT_INTR_TX_MASK;

        /* Configure global variables */
        I2C_1_state = I2C_1_I2C_FSM_IDLE;

    #if(I2C_1_I2C_SLAVE)
        /* Internal slave variable */
        I2C_1_slStatus        = 0u;
        I2C_1_slRdBufIndex    = 0u;
        I2C_1_slWrBufIndex    = 0u;
        I2C_1_slOverFlowCount = 0u;
    #endif /* (I2C_1_I2C_SLAVE) */

    #if(I2C_1_I2C_MASTER)
    /* Internal master variable */
        I2C_1_mstrStatus     = 0u;
        I2C_1_mstrRdBufIndex = 0u;
        I2C_1_mstrWrBufIndex = 0u;
    #endif /* (I2C_1_I2C_MASTER) */
    }

/*******************************************************************************
* Function Name: USBUART_Resume
********************************************************************************
*
* Summary:
*  This function enables the USBFS block after power down mode.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Global variables:
*  USBUART_backup - checked.
*
* Reentrant:
*  No.
*
*******************************************************************************/
void USBUART_Resume(void) 
{
    uint8 enableInterrupts;
    enableInterrupts = CyEnterCriticalSection();

    if(USBUART_backup.enableState != 0u)
    {
        #if(USBUART_DP_ISR_REMOVE == 0u)
            CyIntDisable(USBUART_DP_INTC_VECT_NUM);
        #endif /*  USBUART_DP_ISR_REMOVE */

        /* Enable USB block */
        USBUART_PM_ACT_CFG_REG |= USBUART_PM_ACT_EN_FSUSB;
        /* Enable USB block for Standby Power Mode */
        USBUART_PM_STBY_CFG_REG |= USBUART_PM_STBY_EN_FSUSB;
        /* Enable core clock */
        USBUART_USB_CLK_EN_REG |= USBUART_USB_CLK_ENABLE;

        /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/
        USBUART_PM_USB_CR0_REG |= USBUART_PM_USB_CR0_REF_EN;
        /* The reference will be available ~40us after power restored */
        CyDelayUs(40u);
        /* Return VRegulator*/
        USBUART_CR1_REG |= USBUART_backup.mode;
        CyDelayUs(0u);  /*~50ns delay */
        /* Enable USBIO */
        USBUART_PM_USB_CR0_REG |= USBUART_PM_USB_CR0_PD_N;
        CyDelayUs(2u);
        /* Set the USBIO pull-up enable */
        USBUART_PM_USB_CR0_REG |= USBUART_PM_USB_CR0_PD_PULLUP_N;

        /* Re-init Arbiter configuration for DMA transfers */
        #if(USBUART_EP_MM != USBUART__EP_MANUAL)
            /* Usb arb interrupt enable */
            USBUART_ARB_INT_EN_REG = USBUART_ARB_INT_MASK;
            #if(USBUART_EP_MM == USBUART__EP_DMAMANUAL)
                USBUART_ARB_CFG_REG = USBUART_ARB_CFG_MANUAL_DMA;
            #endif   /*  USBUART_EP_MM == USBUART__EP_DMAMANUAL */
            #if(USBUART_EP_MM == USBUART__EP_DMAAUTO)
                /*Set cfg cmplt this rises DMA request when the full configuration is done */
                USBUART_ARB_CFG_REG = USBUART_ARB_CFG_AUTO_DMA | USBUART_ARB_CFG_AUTO_MEM;
            #endif   /*  USBUART_EP_MM == USBUART__EP_DMAAUTO */
        #endif   /*  USBUART_EP_MM != USBUART__EP_MANUAL */

        /* STALL_IN_OUT */
        CY_SET_REG8(USBUART_EP0_CR_PTR, USBUART_MODE_STALL_IN_OUT);
        /* Enable the SIE with a last address */
        USBUART_CR0_REG |= USBUART_CR0_ENABLE;
        CyDelayCycles(1u);
        /* Finally, Enable d+ pullup and select iomode to USB mode*/
        CY_SET_REG8(USBUART_USBIO_CR1_PTR, USBUART_USBIO_CR1_USBPUEN);

        /* Restore USB register settings */
        USBUART_RestoreConfig();
    }

    CyExitCriticalSection(enableInterrupts);
}

/*******************************************************************************
* Function Name: SPI_Init
********************************************************************************
*
* Summary:
*  Inits/Restores default SPIM configuration provided with customizer.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Side Effects:
*  When this function is called it initializes all of the necessary parameters
*  for execution. i.e. setting the initial interrupt mask, configuring the
*  interrupt service routine, configuring the bit-counter parameters and
*  clearing the FIFO and Status Register.
*
* Reentrant:
*  No.
*
*******************************************************************************/
void SPI_Init(void) 
{
    /* Initialize the Bit counter */
    SPI_COUNTER_PERIOD_REG = SPI_BITCTR_INIT;

    /* Init TX ISR  */
    #if(0u != SPI_INTERNAL_TX_INT_ENABLED)
        CyIntDisable         (SPI_TX_ISR_NUMBER);
        CyIntSetPriority     (SPI_TX_ISR_NUMBER,  SPI_TX_ISR_PRIORITY);
        (void) CyIntSetVector(SPI_TX_ISR_NUMBER, &SPI_TX_ISR);
    #endif /* (0u != SPI_INTERNAL_TX_INT_ENABLED) */

    /* Init RX ISR  */
    #if(0u != SPI_INTERNAL_RX_INT_ENABLED)
        CyIntDisable         (SPI_RX_ISR_NUMBER);
        CyIntSetPriority     (SPI_RX_ISR_NUMBER,  SPI_RX_ISR_PRIORITY);
        (void) CyIntSetVector(SPI_RX_ISR_NUMBER, &SPI_RX_ISR);
    #endif /* (0u != SPI_INTERNAL_RX_INT_ENABLED) */

    /* Clear any stray data from the RX and TX FIFO */
    SPI_ClearFIFO();

    #if(SPI_RX_SOFTWARE_BUF_ENABLED)
        SPI_rxBufferFull  = 0u;
        SPI_rxBufferRead  = 0u;
        SPI_rxBufferWrite = 0u;
    #endif /* (SPI_RX_SOFTWARE_BUF_ENABLED) */

    #if(SPI_TX_SOFTWARE_BUF_ENABLED)
        SPI_txBufferFull  = 0u;
        SPI_txBufferRead  = 0u;
        SPI_txBufferWrite = 0u;
    #endif /* (SPI_TX_SOFTWARE_BUF_ENABLED) */

    (void) SPI_ReadTxStatus(); /* Clear Tx status and swStatusTx */
    (void) SPI_ReadRxStatus(); /* Clear Rx status and swStatusRx */

    /* Configure TX and RX interrupt mask */
    SPI_TX_STATUS_MASK_REG = SPI_TX_INIT_INTERRUPTS_MASK;
    SPI_RX_STATUS_MASK_REG = SPI_RX_INIT_INTERRUPTS_MASK;
}

/*******************************************************************************
* Function Name: emFile_SPI0_Stop
********************************************************************************
*
* Summary:
*  Disable the SPI Master component.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Theory:
*  Disable the clock input to enable operation.
*
*******************************************************************************/
void emFile_SPI0_Stop(void) 
{
    uint8 enableInterrupts = 0u;    
    
    enableInterrupts = CyEnterCriticalSection();
    
    emFile_SPI0_TX_STATUS_ACTL_REG &= ~emFile_SPI0_INT_ENABLE;
    emFile_SPI0_RX_STATUS_ACTL_REG &= ~emFile_SPI0_INT_ENABLE;
    
    CyExitCriticalSection(enableInterrupts);
    
    #if(emFile_SPI0_InternalClockUsed)    
        emFile_SPI0_IntClock_Disable();        
    #endif /* emFile_SPI0_InternalClockUsed */
    
    #if(emFile_SPI0_InternalTxInterruptEnabled)    
        CyIntDisable(emFile_SPI0_TX_ISR_NUMBER);        
    #endif /* emFile_SPI0_InternalTxInterruptEnabled */
    
    #if(emFile_SPI0_InternalRxInterruptEnabled)    
        CyIntDisable(emFile_SPI0_RX_ISR_NUMBER);        
    #endif /* emFile_SPI0_InternalRxInterruptEnabled */
}

/*******************************************************************************
* Function Name: SPIM_Stop
********************************************************************************
*
* Summary:
*  Disable the SPI Master component.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
* Theory:
*  Disable the clock input to enable operation.
*
*******************************************************************************/
void SPIM_Stop(void) 
{
    uint8 enableInterrupts = 0u;    
    
    enableInterrupts = CyEnterCriticalSection();
    
    SPIM_TX_STATUS_ACTL_REG &= ~SPIM_INT_ENABLE;
    SPIM_RX_STATUS_ACTL_REG &= ~SPIM_INT_ENABLE;
    
    CyExitCriticalSection(enableInterrupts);
    
    #if(SPIM_InternalClockUsed)    
        SPIM_IntClock_Disable();        
    #endif /* SPIM_InternalClockUsed */
    
    #if(SPIM_InternalTxInterruptEnabled)    
        CyIntDisable(SPIM_TX_ISR_NUMBER);        
    #endif /* SPIM_InternalTxInterruptEnabled */
    
    #if(SPIM_InternalRxInterruptEnabled)    
        CyIntDisable(SPIM_RX_ISR_NUMBER);        
    #endif /* SPIM_InternalRxInterruptEnabled */
}

/*******************************************************************************
* Function Name: quaddec_right_Init
********************************************************************************
*
* Summary:   
*  Inits/Restores default QuadDec configuration provided with customizer.
*
* Parameters:  
*  None.
*
* Return: 
*  None.
*
*******************************************************************************/
void quaddec_right_Init(void) 
{      
    #if (quaddec_right_COUNTER_SIZE == 32u)
      
        /* Disable Interrupt. */
        CyIntDisable(quaddec_right_ISR_NUMBER);
        
        /* Set the ISR to point to the quaddec_right_isr Interrupt. */
        CyIntSetVector(quaddec_right_ISR_NUMBER, quaddec_right_ISR);
        
        /* Set the priority. */
        CyIntSetPriority(quaddec_right_ISR_NUMBER, quaddec_right_ISR_PRIORITY);       
        
    #endif /* quaddec_right_COUNTER_SIZE == 32u */    
}

/*******************************************************************************
* Function Name: CapSense_CSD_Sleep
********************************************************************************
*
* Summary:
*  Disables the Active mode power.
*
* Parameters:
*  None
*
* Return:
*  None
*
* Global Variables:
*  CapSense_CSD_backup - used to save the component state before entering the sleep 
*  mode.
*
*******************************************************************************/
void CapSense_CSD_Sleep(void)
{
	CapSense_CSD_SaveConfig();
		
	/* Disable interrupt */
	CyIntDisable(CapSense_CSD_ISR_NUMBER);
	
	CapSense_CSD_CSD_CFG_REG &= ~(CapSense_CSD_CSD_CFG_SENSE_COMP_EN | CapSense_CSD_CSD_CFG_SENSE_EN);
	
	#if(CapSense_CSD_IDAC_CNT == 2u)
		CapSense_CSD_CSD_CFG_REG &= ~(CapSense_CSD_CSD_CFG_ENABLE);
	#endif /* (CapSense_CSD_IDAC_CNT == 2u) */
	
	/* Disable Clocks */
    CapSense_CSD_SenseClk_Stop();
    CapSense_CSD_SampleClk_Stop();
}

    /*******************************************************************************
    * Function Name: SPI_SpiInit
    ********************************************************************************
    *
    * Summary:
    *  Configures the SCB for the SPI operation.
    *
    * Parameters:
    *  None
    *
    * Return:
    *  None
    *
    *******************************************************************************/
    void SPI_SpiInit(void)
    {
        /* Configure SPI interface */
        SPI_CTRL_REG     = SPI_SPI_DEFAULT_CTRL;
        SPI_SPI_CTRL_REG = SPI_SPI_DEFAULT_SPI_CTRL;

        /* Configure TX and RX direction */
        SPI_RX_CTRL_REG      = SPI_SPI_DEFAULT_RX_CTRL;
        SPI_RX_FIFO_CTRL_REG = SPI_SPI_DEFAULT_RX_FIFO_CTRL;

        /* Configure TX and RX direction */
        SPI_TX_CTRL_REG      = SPI_SPI_DEFAULT_TX_CTRL;
        SPI_TX_FIFO_CTRL_REG = SPI_SPI_DEFAULT_TX_FIFO_CTRL;

        /* Configure interrupt with SPI handler but do not enable it */
    #if(SPI_SCB_IRQ_INTERNAL)
            CyIntDisable    (SPI_ISR_NUMBER);
            CyIntSetPriority(SPI_ISR_NUMBER, SPI_ISR_PRIORITY);
            (void) CyIntSetVector(SPI_ISR_NUMBER, &SPI_SPI_UART_ISR);
    #endif /* (SPI_SCB_IRQ_INTERNAL) */

        /* Configure interrupt sources */
        SPI_INTR_I2C_EC_MASK_REG = SPI_SPI_DEFAULT_INTR_I2C_EC_MASK;
        SPI_INTR_SPI_EC_MASK_REG = SPI_SPI_DEFAULT_INTR_SPI_EC_MASK;
        SPI_INTR_SLAVE_MASK_REG  = SPI_SPI_DEFAULT_INTR_SLAVE_MASK;
        SPI_INTR_MASTER_MASK_REG = SPI_SPI_DEFAULT_INTR_MASTER_MASK;
        SPI_INTR_RX_MASK_REG     = SPI_SPI_DEFAULT_INTR_RX_MASK;
        SPI_INTR_TX_MASK_REG     = SPI_SPI_DEFAULT_INTR_TX_MASK;

        /* Set active SS0 for master */
    #if (SPI_SPI_MASTER_CONST)
        SPI_SpiSetActiveSlaveSelect(SPI_SPI_SLAVE_SELECT0);
    #endif /* (SPI_SPI_MASTER_CONST) */

    #if(SPI_INTERNAL_RX_SW_BUFFER_CONST)
        SPI_rxBufferHead     = 0u;
        SPI_rxBufferTail     = 0u;
        SPI_rxBufferOverflow = 0u;
    #endif /* (SPI_INTERNAL_RX_SW_BUFFER_CONST) */

    #if(SPI_INTERNAL_TX_SW_BUFFER_CONST)
        SPI_txBufferHead = 0u;
        SPI_txBufferTail = 0u;
    #endif /* (SPI_INTERNAL_TX_SW_BUFFER_CONST) */
    }

/*******************************************************************************
* Function Name: CapSense_Sleep
********************************************************************************
*
* Summary:
*  Disables Active mode power.
*
* Parameters:
*  None
*
* Return:
*  None
*
* Global Variables:
*  CapSense_backup - used to save component state before enter sleep 
*  mode.
*
*******************************************************************************/
void CapSense_Sleep(void)
{
	CapSense_SaveConfig();
		
	/* Disable interrupt */
	CyIntDisable(CapSense_ISR_NUMBER);
	
	CapSense_CSD_CFG_REG &= ~(CapSense_CSD_CFG_SENSE_EN);
	CyDelayUs(100u);
	CapSense_CSD_CFG_REG &= ~(CapSense_CSD_CFG_SENSE_COMP_EN);
	
	CapSense_CSD_CFG_REG &= ~(CapSense_CSD_CFG_ENABLE);
	
	/* Disable the Clocks */
    CapSense_CSD_Clk1_Stop();
    CapSense_CSD_Clk2_Stop();
	
	/* Clear all sensors */
    CapSense_ClearSensors();
}