C++ BRDATA函数代码示例

   cdr_dev      CDR descriptor
   cdr_unit     CDR unit descriptor
   cdr_reg      CDR register list
*/

DIB cdr_dib = { &cdr_chsel, NULL };

UNIT cdr_unit = {
    UDATA (&cdr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_TEXT, 0)
    };

REG cdr_reg[] = {
    { ORDATA (STATE, cdr_sta, 2) },
    { DRDATA (BPTR, cdr_bptr, 5), PV_LEFT },
    { BRDATA (BUF, cdr_bbuf, 8, 36, CD_BINLNT) },
    { DRDATA (POS, cdr_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TSTART, cdr_tstart, 24), PV_LEFT + REG_NZ },
    { DRDATA (TSTOP, cdr_tstop, 24), PV_LEFT + REG_NZ },
    { DRDATA (TLEFT, cdr_tleft, 24), PV_LEFT + REG_NZ },
    { DRDATA (TRIGHT, cdr_tright, 24), PV_LEFT + REG_NZ },
    { NULL }  };

MTAB cdr_mod[] = {
    { UNIT_CBN, UNIT_CBN, "column binary", "BINARY", &cd_set_mode },
    { UNIT_CBN, UNIT_CBN, "text", "TEXT", &cd_set_mode },
    { 0 }
    };

DEVICE cdr_dev = {
    "CDR", &cdr_unit, cdr_reg, cdr_mod,

   clk_mod      CLK modifiers
   clk_reg      CLK register list
*/

DIB clk_dib = { &clkio, CLK };

UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0) };

REG clk_reg[] = {
    { ORDATA (SEL, clk_select, 3) },
    { DRDATA (CTR, clk_ctr, 14) },
    { FLDATA (CTL, clk.control, 0) },
    { FLDATA (FLG, clk.flag, 0) },
    { FLDATA (FBF, clk.flagbuf, 0) },
    { FLDATA (ERR, clk_error, CLK_V_ERROR) },
    { BRDATA (TIME, clk_time, 10, 24, 8) },
    { DRDATA (IPTICK, clk_tick, 24), PV_RSPC | REG_RO },
    { ORDATA (SC, clk_dib.select_code, 6), REG_HRO },
    { ORDATA (DEVNO, clk_dib.select_code, 6), REG_HRO },
    { NULL }
    };

MTAB clk_mod[] = {
    { UNIT_DIAG, UNIT_DIAG, "diagnostic mode", "DIAG", NULL },
    { UNIT_DIAG, 0, "calibrated", "CALIBRATED", NULL },
    { MTAB_XTD | MTAB_VDV,            0, "SC",    "SC",    &hp_setsc,  &hp_showsc,  &clk_dev },
    { MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "DEVNO", "DEVNO", &hp_setdev, &hp_showdev, &clk_dev },
    { 0 }
    };

DEVICE clk_dev = {

t_stat dcs_vlines (UNIT *uptr, int32 val, char *cptr, void *desc);
void dcs_reset_ln (int32 ln);
void dcs_scan_next (t_bool unlk);

/* DCS data structures

   dcs_dev      DCS device descriptor
   dcs_unit     DCS unit descriptor
   dcs_reg      DCS register list
   dcs_mod      DCS modifiers list
*/

UNIT dcs_unit = { UDATA (&dcsi_svc, UNIT_ATTABLE, 0) };

REG dcs_reg[] = {
    { BRDATA (BUF, dcs_buf, 8, 8, DCS_LINES) },
    { BRDATA (FLAGS, dcs_flg, 8, 1, DCS_LINES) },
    { FLDATA (SCNF, iosta, IOS_V_DCS) },
    { ORDATA (SCAN, dcs_scan, 5) },
    { ORDATA (SEND, dcs_send, 5) },
    { DRDATA (SBSLVL, dcs_sbs, 4), REG_HRO },
    { NULL }
    };

MTAB dcs_mod[] = {
    { MTAB_XTD|MTAB_VDV, 0, "SBSLVL", "SBSLVL",
      &dev_set_sbs, &dev_show_sbs, (void *) &dcs_sbs },
    { MTAB_XTD | MTAB_VDV, 0, "LINES", "LINES",
      &dcs_vlines, &tmxr_show_lines, (void *) &dcs_desc },
    { MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
      &tmxr_dscln, NULL, (void *) &dcs_desc },

UNIT fl_unit = { UDATA (&fl_svc,
      UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF, FL_SIZE) };

REG fl_reg[] = {
    { HRDATA (FNC, fl_fnc, 8) },
    { HRDATA (ES, fl_esr, 8) },
    { HRDATA (ECODE, fl_ecode, 8) },
    { HRDATA (TA, fl_track, 8) },
    { HRDATA (SA, fl_sector, 8) },
    { DRDATA (STATE, fl_state, 4), REG_RO },
    { DRDATA (BPTR, fl_bptr, 7)  },
    { DRDATA (CTIME, fl_cwait, 24), PV_LEFT },
    { DRDATA (STIME, fl_swait, 24), PV_LEFT },
    { DRDATA (XTIME, fl_xwait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, fl_stopioe, 0) },
    { BRDATA (DBUF, fl_buf, 16, 8, FL_NUMBY) },
    { BRDATA (COMM, comm_region, 16, 8, COMM_LNT) },
    { NULL }
    };

MTAB fl_mod[] = {
    { UNIT_WLK, 0, "write enabled", "WRITEENABLED", NULL },
    { UNIT_WLK, UNIT_WLK, "write locked", "LOCKED", NULL },
    { 0 }
    };

DEVICE fl_dev = {
    "RX", &fl_unit, fl_reg, fl_mod,
    1, DEV_RDX, 20, 1, DEV_RDX, 8,
    NULL, NULL, &fl_reset,
    NULL, NULL, NULL,

	{ ORDATA (RXTA, rx_track, 8) },
	{ ORDATA (RXSA, rx_sector, 8) },
	{ ORDATA (STAPTR, rx_state, 3), REG_RO },
	{ ORDATA (BUFPTR, bptr, 7)  },
	{ FLDATA (INT, int_req, INT_V_RX) },
	{ FLDATA (ERR, rx_csr, CSR_V_ERR) },
	{ FLDATA (TR, rx_csr, RXCS_V_TR) },
	{ FLDATA (IE, rx_csr, CSR_V_IE) },
	{ FLDATA (DONE, rx_csr, RXCS_V_DONE) },
	{ DRDATA (CTIME, rx_cwait, 24), PV_LEFT },
	{ DRDATA (STIME, rx_swait, 24), PV_LEFT },
	{ DRDATA (XTIME, rx_xwait, 24), PV_LEFT },
	{ FLDATA (FLG0, rx_unit[0].flags, UNIT_V_WLK), REG_HRO },
	{ FLDATA (FLG1, rx_unit[1].flags, UNIT_V_WLK), REG_HRO },
	{ FLDATA (STOP_IOE, rx_stopioe, 0) },
	{ BRDATA (**BUF, buf, 8, 8, RX_NUMBY), REG_HRO },
	{ NULL }  };

MTAB rx_mod[] = {
	{ UNIT_WLK, 0, "write enabled", "ENABLED", NULL },
	{ UNIT_WLK, UNIT_WLK, "write locked", "LOCKED", NULL },
	{ 0 }  };

DEVICE rx_dev = {
	"RX", rx_unit, rx_reg, rx_mod,
	RX_NUMDR, 8, 20, 1, 8, 8,
	NULL, NULL, &rx_reset,
	&rx_boot, NULL, NULL };

/* I/O dispatch routine, I/O addresses 17777170 - 17777172

   ttix_dev     TTIx device descriptor
   ttix_unit    TTIx unit descriptor
   ttix_reg     TTIx register list
   ttix_mod     TTIx modifiers list
*/

DIB ttix_dib = { 
    DEV_TTO1, 8, NULL,
    { &ttox, &ttix, &ttox, &ttix, &ttox, &ttix, &ttox, &ttix }
    };

UNIT ttix_unit = { UDATA (&ttix_svc, UNIT_IDLE|UNIT_ATTABLE, 0), KBD_POLL_WAIT };

REG ttix_reg[] = {
    { BRDATA (BUF, ttix_buf, 8, 8, TTX_MAXL) },
    { ORDATA (DONE, ttix_done, TTX_MAXL) },
    { FLDATA (INT, int_hwre[API_TTI1], INT_V_TTI1) },
    { DRDATA (TIME, ttix_unit.wait, 24), REG_NZ + PV_LEFT },
    { ORDATA (DEVNUM, ttix_dib.dev, 6), REG_HRO },
    { NULL }
    };

MTAB ttix_mod[] = {
    { MTAB_XTD | MTAB_VDV, 0, "LINES", "LINES",
      &ttx_vlines, &tmxr_show_lines, (void *) &ttx_desc },
    { UNIT_ATT, UNIT_ATT, "summary", NULL,
      NULL, &tmxr_show_summ, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
      &tmxr_dscln, NULL, (void *) &ttx_desc },
    { MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,

             UNIT_ROABLE+(TYPE_5440 << UNIT_V_DTYPE), SIZE_5440) },
    { UDATA (&dp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
             UNIT_ROABLE+(TYPE_5440 << UNIT_V_DTYPE), SIZE_5440) },
    { UDATA (&dp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
             UNIT_ROABLE+(TYPE_5440 << UNIT_V_DTYPE), SIZE_5440) }
    };

REG dp_reg[] = {
    { HRDATA (CMD, dp_cmd, 3) },
    { HRDATA (STA, dp_sta, 8) },
    { HRDATA (BUF, dp_db, 8) },
    { HRDATA (PLAT, dp_plat, 1) },
    { HRDATA (HDSC, dp_hdsc, 6) },
    { HRDATA (CYL, dp_cyl, 9) },
    { HRDATA (SVUN, dp_svun, 8), REG_HIDDEN },
    { BRDATA (DBUF, dpxb, 16, 8, DP_NUMBY) },
    { HRDATA (DBPTR, dp_bptr, 9), REG_RO },
    { FLDATA (FIRST, dp_1st, 0) },
    { GRDATA (IREQ, int_req[l_DPC], 16, DP_NUMDR + 1, i_DPC) },
    { GRDATA (IENB, int_enb[l_DPC], 16, DP_NUMDR + 1, i_DPC) },
    { BRDATA (IARM, dpd_arm, 16, 1, DP_NUMDR) },
    { DRDATA (RTIME, dp_rtime, 0), PV_LEFT | REG_NZ },
    { DRDATA (STIME, dp_stime, 0), PV_LEFT | REG_NZ },
    { DRDATA (WTIME, dp_wtime, 0), PV_LEFT | REG_NZ },
    { URDATA (UCYL, dp_unit[0].CYL, 16, 9, 0,
              DP_NUMDR, REG_RO) },
    { URDATA (UST, dp_unit[0].STD, 16, 8, 0,
              DP_NUMDR, REG_RO) },
    { URDATA (CAPAC, dp_unit[0].capac, 10, T_ADDR_W, 0,
              DP_NUMDR, PV_LEFT | REG_HRO) },
    { HRDATA (DEVNO, dp_dib.dno, 8), REG_HRO },

    { ORDATA (RXES, rx_esr, 8) },
    { ORDATA (RXERR, rx_ecode, 8) },
    { ORDATA (RXTA, rx_track, 8) },
    { ORDATA (RXSA, rx_sector, 8) },
    { DRDATA (STAPTR, rx_state, 3), REG_RO },
    { DRDATA (BUFPTR, rx_bptr, 7)  },
    { FLDATA (INT, IREQ (RX), INT_V_RX) },
    { FLDATA (ERR, rx_csr, RXCS_V_ERR) },
    { FLDATA (TR, rx_csr, RXCS_V_TR) },
    { FLDATA (IE, rx_csr, RXCS_V_IE) },
    { FLDATA (DONE, rx_csr, RXCS_V_DONE) },
    { DRDATA (CTIME, rx_cwait, 24), PV_LEFT },
    { DRDATA (STIME, rx_swait, 24), PV_LEFT },
    { DRDATA (XTIME, rx_xwait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, rx_stopioe, 0) },
    { BRDATA (SBUF, rx_buf, 8, 8, RX_NUMBY) },
    { ORDATA (DEVADDR, rx_dib.ba, 32), REG_HRO },
    { ORDATA (DEVVEC, rx_dib.vec, 16), REG_HRO },
    { NULL }
    };

MTAB rx_mod[] = {
    { UNIT_WLK, 0, "write enabled", "WRITEENABLED", NULL },
    { UNIT_WLK, UNIT_WLK, "write locked", "LOCKED", NULL },
#if defined (VM_PDP11)
    { MTAB_XTD|MTAB_VDV, 004, "ADDRESS", "ADDRESS",
      &set_addr, &show_addr, NULL },
    { MTAB_XTD | MTAB_VDV, 0, NULL, "AUTOCONFIGURE",
      &set_addr_flt, NULL, NULL },
    { MTAB_XTD|MTAB_VDV, 0, "VECTOR", "VECTOR",
      &set_vec, &show_vec, NULL },

   mux_dev      MUX device descriptor
   mux_unit     MUX unit descriptor
   mux_reg      MUX register list
   mux_mod      MUX modifiers list
*/

dib_t mux_dib = { DVA_MUX, &mux_disp, DIO_MUX, &mux_dio };

UNIT mux_unit[] = {
    { UDATA (&muxc_svc, UNIT_ATTABLE, 0) },
    { UDATA (&muxi_rtc_svc, UNIT_DIS, 0) }
};

REG mux_reg[] = {
    { BRDATA (STA, mux_sta, 16, 8, MUX_LINES) },
    { BRDATA (RBUF, mux_rbuf, 16, 8, MUX_LINES) },
    { BRDATA (XBUF, mux_xbuf, 16, 8, MUX_LINES) },
    { DRDATA (SCAN, mux_scan, 6) },
    { FLDATA (SLCK, mux_slck, 0) },
    { DRDATA (CMD, muxc_cmd, 2) },
    { DRDATA (TPS, mux_tps, 8), REG_HRO },
    { NULL }
};

MTAB mux_mod[] = {
    {   MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
        &tmxr_dscln, NULL, &mux_desc
    },
    {   UNIT_ATT, UNIT_ATT, "summary", NULL,
        NULL, &tmxr_show_summ, (void *) &mux_desc

/* LP data structures

   lp_dev       LP device descriptor
   lp_unit      LP unit descriptors
   lp_reg       LP register list
   lp_mod       LP modifiers list
*/

dib_t lp_dib = { DVA_LP, lp_disp, 0, NULL };

UNIT lp_unit = { UDATA (&lp_svc, UNIT_ATTABLE+UNIT_SEQ, 0), SERIAL_OUT_WAIT };

REG lp_reg[] = {
    { HRDATA (CMD, lp_cmd, 9) },
    { BRDATA (BUF, lp_buf, 16, 7, BUF_LNT4) },
    { FLDATA (PASS, lp_pass, 0) },
    { FLDATA (INH, lp_inh, 0) },
    { FLDATA (RUNAWAY, lp_run, LPDV_V_RUN) },
    { BRDATA (CCT, lp_cct, 8, 8, CCT_LNT) },
    { DRDATA (CCTP, lp_cctp, 8), PV_LEFT },
    { DRDATA (CCTL, lp_cctl, 8), PV_LEFT + REG_HRO + REG_NZ },
    { DRDATA (POS, lp_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TIME, lp_unit.wait, 24), PV_LEFT },
    { FLDATA (STOP_IOE, lp_stopioe, 0) },
    { HRDATA (LASTC, lp_lastcmd, 8), REG_HIDDEN },
    { FLDATA (MODEL, lp_model, 0), REG_HRO },
    { HRDATA (DEVNO, lp_dib.dva, 12), REG_HRO },
    { NULL }
    };

    { GRDATA (RYWC, ry_wc, DEV_RDX, 8, 0) },
    { GRDATA (RYDB, ry_dbr, DEV_RDX, 16, 0) },
    { GRDATA (RYES, ry_esr, DEV_RDX, 12, 0) },
    { GRDATA (RYERR, ry_ecode, DEV_RDX, 8, 0) },
    { GRDATA (RYTA, ry_track, DEV_RDX, 8, 0) },
    { GRDATA (RYSA, ry_sector, DEV_RDX, 8, 0) },
    { DRDATA (STAPTR, ry_state, 4), REG_RO },
    { FLDATA (INT, IREQ (RY), INT_V_RY) },
    { FLDATA (ERR, ry_csr, RYCS_V_ERR) },
    { FLDATA (TR, ry_csr, RYCS_V_TR) },
    { FLDATA (IE, ry_csr, RYCS_V_IE) },
    { FLDATA (DONE, ry_csr, RYCS_V_DONE) },
    { DRDATA (CTIME, ry_cwait, 24), PV_LEFT },
    { DRDATA (STIME, ry_swait, 24), PV_LEFT },
    { DRDATA (XTIME, ry_xwait, 24), PV_LEFT },
    { BRDATA (SBUF, rx2xb, 8, 8, RY_NUMBY) },
    { FLDATA (STOP_IOE, ry_stopioe, 0) },
    { URDATA (CAPAC, ry_unit[0].capac, 10, T_ADDR_W, 0,
              RX_NUMDR, REG_HRO | PV_LEFT) },
    { GRDATA (DEVADDR, ry_dib.ba, DEV_RDX, 32, 0), REG_HRO },
    { GRDATA (DEVVEC, ry_dib.vec, DEV_RDX, 16, 0), REG_HRO },
    { NULL }
    };

MTAB ry_mod[] = {
    { UNIT_WLK, 0, "write enabled", "WRITEENABLED", NULL },
    { UNIT_WLK, UNIT_WLK, "write locked", "LOCKED", NULL },
    { (UNIT_DEN+UNIT_ATT), UNIT_ATT, "single density", NULL, NULL },
    { (UNIT_DEN+UNIT_ATT), (UNIT_DEN+UNIT_ATT), "double density", NULL, NULL },
    { (UNIT_AUTO+UNIT_DEN+UNIT_ATT), 0, "single density", NULL, NULL },
    { (UNIT_AUTO+UNIT_DEN+UNIT_ATT), UNIT_DEN, "double density", NULL, NULL },

/* LPT data structures

   lpt_dev      LPT device descriptor
   lpt_unit     LPT unit descriptors
   lpt_reg      LPT register list
*/

DIB lpt_dib = { d_LPT, -1, v_LPT, NULL, &lpt, NULL };

UNIT lpt_unit = { UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_UC+UNIT_TEXT, 0) };

REG lpt_reg[] = {
    { HRDATA (STA, lpt_sta, 8) },
    { HRDATA (BUF, lpt_unit.buf, 7) },
    { BRDATA (DBUF, lpxb, 16, 7, LPT_WIDTH) },
    { HRDATA (DBPTR, lpt_bptr, 8) },
    { HRDATA (VFUP, lpt_vfup, 8) },
    { HRDATA (VFUL, lpt_vful, 8) },
    { BRDATA (VFUT, lpt_vfut, 16, 8, VFU_LNT) },
    { FLDATA (IREQ, int_req[l_LPT], i_LPT) },
    { FLDATA (IENB, int_enb[l_LPT], i_LPT) },
    { FLDATA (IARM, lpt_arm, 0) },
    { DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (CTIME, lpt_ctime, 24), PV_LEFT },
    { DRDATA (STIME, lpt_stime, 24), PV_LEFT },
    { FLDATA (STOP_IOE, lpt_stopioe, 0) },
    { HRDATA (DEVNO, lpt_dib.dno, 8), REG_HRO },
    { NULL }
    };

static UNIT fif_unit[] = {
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) },
    { UDATA (NULL, UNIT_FIX + UNIT_ATTABLE + UNIT_DISABLE + UNIT_ROABLE, MAX_DSK_SIZE) }
};

static REG fif_reg[] = {
    { DRDATA (DISK,         current_disk,   4)                                          },
    { DRDATA (DSKWL,        warnLevelDSK, 32)                                           },
    { BRDATA (WARNLOCK,     warnLock,       10, 32, NUM_OF_DSK),    REG_CIRC + REG_RO   },
    { BRDATA (WARNATTACHED, warnAttached,   10, 32, NUM_OF_DSK),    REG_CIRC + REG_RO   },
    { DRDATA (WARNDSK11,    warnDSK11, 4),                          REG_RO              },
    { NULL }
};

static MTAB fif_mod[] = {
    { MTAB_XTD|MTAB_VDV, 0,                 "IOBASE",   "IOBASE",   &set_iobase, &show_iobase, NULL },
    { UNIT_DSK_WLK,     0,                  "WRTENB",   "WRTENB",   NULL },
    { UNIT_DSK_WLK,     UNIT_DSK_WLK,       "WRTLCK",   "WRTLCK",   NULL },
    /* quiet, no warning messages       */
    { UNIT_DSK_VERBOSE, 0,                  "QUIET",    "QUIET",    NULL },
    /* verbose, show warning messages   */
    { UNIT_DSK_VERBOSE, UNIT_DSK_VERBOSE,   "VERBOSE",  "VERBOSE",  &fif_set_verbose },
    { 0 }
};

   lpt_reg      LPT register list
*/

DIB lpt_dib = { &lpt_chsel, &lpt_chwr };

UNIT lpt_unit = {
    UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_CONS+UNIT_TEXT, 0)
    };

REG lpt_reg[] = {
    { ORDATA (STATE, lpt_sta, 2) },
    { ORDATA (CMD, lpt_cmd, 2) },
    { ORDATA (CHOB, lpt_chob, 36) },
    { FLDATA (CHOBV, lpt_chob_v, 0) },
    { DRDATA (BPTR, lpt_bptr, 6), PV_LEFT },
    { BRDATA (BUF, lpt_bbuf, 8, 36, LPT_BINLNT) },
    { BRDATA (EBUF, lpt_ebuf, 8, 36, LPT_ECHLNT) },
    { DRDATA (POS, lpt_unit.pos, T_ADDR_W), PV_LEFT },
    { DRDATA (TSTART, lpt_tstart, 24), PV_LEFT + REG_NZ },
    { DRDATA (TSTOP, lpt_tstop, 24), PV_LEFT + REG_NZ },
    { DRDATA (TLEFT, lpt_tleft, 24), PV_LEFT + REG_NZ },
    { DRDATA (TRIGHT, lpt_tright, 24), PV_LEFT + REG_NZ },
    { NULL }
    };

MTAB lpt_mod[] = {
    { UNIT_CONS, UNIT_CONS, "default to console", "DEFAULT" },
    { UNIT_CONS, 0        , "no default device", "NODEFAULT" },
    { UNIT_48, UNIT_48, "48 character chain", "48" },
    { UNIT_48, 0,       "64 character chain", "64" },
    { UNIT_BZ, UNIT_BZ, "business set", "BUSINESS" },

extern int32 eval_int (void);

/* SYSD data structures

   sysd_dev     SYSD device descriptor
   sysd_unit    SYSD units
   sysd_reg     SYSD register list
*/

UNIT sysd_unit = { UDATA (NULL, 0, 0) };

REG sysd_reg[] = {
    { HRDATAD (CONISP, conisp, 32, "console ISP") },
    { HRDATAD (CONPC,   conpc, 32, "console PD") },
    { HRDATAD (CONPSL, conpsl, 32, "console PSL") },
    { BRDATA (BOOTCMD, cpu_boot_cmd, 16, 8, CBUFSIZE), REG_HRO },
    { NULL }
    };

DEVICE sysd_dev = {
    "SYSD", &sysd_unit, sysd_reg, NULL,
    1, 16, 16, 1, 16, 8,
    NULL, NULL, &sysd_reset,
    NULL, NULL, NULL,
    NULL, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, 
    &sysd_description
    };

/* Special boot command, overrides regular boot */

CTAB vax610_cmd[] = {