Golang Link.Diag方法代碼示例

func nacladdr(ctxt *liblink.Link, p *liblink.Prog, a *liblink.Addr) {
	if p.As == ALEAL || p.As == ALEAQ {
		return
	}

	if a.Type_ == D_BP || a.Type_ == D_INDIR+D_BP {
		ctxt.Diag("invalid address: %P", p)
		return
	}

	if a.Type_ == D_INDIR+D_TLS {
		a.Type_ = D_INDIR + D_BP
	} else if a.Type_ == D_TLS {
		a.Type_ = D_BP
	}
	if D_INDIR <= a.Type_ && a.Type_ <= D_INDIR+D_INDIR {
		switch a.Type_ {
		// all ok
		case D_INDIR + D_BP,
			D_INDIR + D_SP,
			D_INDIR + D_R15:
			break

		default:
			if a.Index != D_NONE {
				ctxt.Diag("invalid address %P", p)
			}
			a.Index = uint8(a.Type_ - D_INDIR)
			if a.Index != D_NONE {
				a.Scale = 1
			}
			a.Type_ = D_INDIR + D_R15
			break
		}
	}
}

func progedit(ctxt *liblink.Link, p *liblink.Prog) {
	var literal string
	var s *liblink.LSym
	var tlsfallback *liblink.LSym

	p.From.Class = 0
	p.To.Class = 0

	// Rewrite B/BL to symbol as D_BRANCH.
	switch p.As {

	case AB,
		ABL,
		ADUFFZERO,
		ADUFFCOPY:
		if p.To.Type_ == D_OREG && (p.To.Name == D_EXTERN || p.To.Name == D_STATIC) && p.To.Sym != nil {
			p.To.Type_ = D_BRANCH
		}
		break
	}

	// Replace TLS register fetches on older ARM procesors.
	switch p.As {

	// Treat MRC 15, 0, <reg>, C13, C0, 3 specially.
	case AMRC:
		if p.To.Offset&0xffff0fff == 0xee1d0f70 {

			// Because the instruction might be rewriten to a BL which returns in R0
			// the register must be zero.
			if p.To.Offset&0xf000 != 0 {

				ctxt.Diag("%L: TLS MRC instruction must write to R0 as it might get translated into a BL instruction", p.Lineno)
			}

			if ctxt.Goarm < 7 {
				// Replace it with BL runtime.read_tls_fallback(SB) for ARM CPUs that lack the tls extension.
				if tlsfallback == nil {

					tlsfallback = liblink.Linklookup(ctxt, "runtime.read_tls_fallback", 0)
				}

				// MOVW	LR, R11
				p.As = AMOVW

				p.From.Type_ = D_REG
				p.From.Reg = REGLINK
				p.To.Type_ = D_REG
				p.To.Reg = REGTMP

				// BL	runtime.read_tls_fallback(SB)
				p = liblink.Appendp(ctxt, p)

				p.As = ABL
				p.To.Type_ = D_BRANCH
				p.To.Sym = tlsfallback
				p.To.Offset = 0

				// MOVW	R11, LR
				p = liblink.Appendp(ctxt, p)

				p.As = AMOVW
				p.From.Type_ = D_REG
				p.From.Reg = REGTMP
				p.To.Type_ = D_REG
				p.To.Reg = REGLINK
				break
			}
		}

		// Otherwise, MRC/MCR instructions need no further treatment.
		p.As = AWORD

		break
	}

	// Rewrite float constants to values stored in memory.
	switch p.As {

	case AMOVF:
		if p.From.Type_ == D_FCONST && chipfloat5(ctxt, p.From.U.Dval) < 0 && (chipzero5(ctxt, p.From.U.Dval) < 0 || p.Scond&C_SCOND != C_SCOND_NONE) {
			var i32 uint32
			var f32 float32
			f32 = float32(p.From.U.Dval)
			i32 = math.Float32bits(f32)
			literal = fmt.Sprintf("$f32.%08x", i32)
			s = liblink.Linklookup(ctxt, literal, 0)
			if s.Type_ == 0 {
				s.Type_ = liblink.SRODATA
				liblink.Adduint32(ctxt, s, i32)
				s.Reachable = 0
			}

			p.From.Type_ = D_OREG
			p.From.Sym = s
			p.From.Name = D_EXTERN
			p.From.Offset = 0
		}

	case AMOVD:
//.........這裏部分代碼省略.........

//.........這裏部分代碼省略.........
				q.To.Type_ = D_REG
				q.To.Reg = 5

				q = liblink.Appendp(ctxt, q)
				q.As = ABNE
				q.To.Type_ = D_BRANCH
				p2 = q

				q = liblink.Appendp(ctxt, q)
				q.As = AADD
				q.From.Type_ = D_CONST
				q.From.Offset = 8
				q.Reg = REGSP
				q.To.Type_ = D_REG
				q.To.Reg = 6

				q = liblink.Appendp(ctxt, q)
				q.As = AMOVD
				q.From.Type_ = D_REG
				q.From.Reg = 6
				q.To.Type_ = D_OREG
				q.To.Reg = 3
				q.To.Offset = 0 // Panic.argp

				q = liblink.Appendp(ctxt, q)

				q.As = ANOP
				p1.Pcond = q
				p2.Pcond = q
			}

		case ARETURN:
			if p.From.Type_ == D_CONST {
				ctxt.Diag("using BECOME (%P) is not supported!", p)
				break
			}

			if p.To.Sym != nil { // retjmp
				p.As = ABR
				p.To.Type_ = D_BRANCH
				break
			}

			if cursym.Text.Mark&LEAF != 0 {
				if !(autosize != 0) {
					p.As = ABR
					p.From = zprg.From
					p.To.Type_ = D_SPR
					p.To.Offset = D_LR
					p.Mark |= BRANCH
					break
				}

				p.As = AADD
				p.From.Type_ = D_CONST
				p.From.Offset = int64(autosize)
				p.To.Type_ = D_REG
				p.To.Reg = REGSP
				p.Spadj = -autosize

				q = ctxt.Arch.Prg()
				q.As = ABR
				q.Lineno = p.Lineno
				q.To.Type_ = D_SPR
				q.To.Offset = D_LR
				q.Mark |= BRANCH

//.........這裏部分代碼省略.........
		// 8l -Z means zero the stack frame on entry.
		// This slows down function calls but can help avoid
		// false positives in garbage collection.
		p = liblink.Appendp(ctxt, p)

		p.As = AMOVL
		p.From.Type_ = D_SP
		p.To.Type_ = D_DI

		p = liblink.Appendp(ctxt, p)
		p.As = AMOVL
		p.From.Type_ = D_CONST
		p.From.Offset = int64(autoffset) / 4
		p.To.Type_ = D_CX

		p = liblink.Appendp(ctxt, p)
		p.As = AMOVL
		p.From.Type_ = D_CONST
		p.From.Offset = 0
		p.To.Type_ = D_AX

		p = liblink.Appendp(ctxt, p)
		p.As = AREP

		p = liblink.Appendp(ctxt, p)
		p.As = ASTOSL
	}

	for ; p != nil; p = p.Link {
		a = int(p.From.Type_)
		if a == D_AUTO {
			p.From.Offset += int64(deltasp)
		}
		if a == D_PARAM {
			p.From.Offset += int64(deltasp) + 4
		}
		a = int(p.To.Type_)
		if a == D_AUTO {
			p.To.Offset += int64(deltasp)
		}
		if a == D_PARAM {
			p.To.Offset += int64(deltasp) + 4
		}

		switch p.As {
		default:
			continue

		case APUSHL,
			APUSHFL:
			deltasp += 4
			p.Spadj = 4
			continue

		case APUSHW,
			APUSHFW:
			deltasp += 2
			p.Spadj = 2
			continue

		case APOPL,
			APOPFL:
			deltasp -= 4
			p.Spadj = -4
			continue

		case APOPW,
			APOPFW:
			deltasp -= 2
			p.Spadj = -2
			continue

		case ARET:
			break
		}

		if autoffset != deltasp {
			ctxt.Diag("unbalanced PUSH/POP")
		}

		if autoffset != 0 {
			p.As = AADJSP
			p.From.Type_ = D_CONST
			p.From.Offset = int64(-autoffset)
			p.Spadj = -autoffset
			p = liblink.Appendp(ctxt, p)
			p.As = ARET

			// If there are instructions following
			// this ARET, they come from a branch
			// with the same stackframe, so undo
			// the cleanup.
			p.Spadj = +autoffset
		}

		if p.To.Sym != nil { // retjmp
			p.As = AJMP
		}
	}
}