C++ DBG2函數代碼示例

bool starter_klips_init(void)
{
	struct stat stb;

	if (stat(PROC_KLIPS, &stb) != 0)
	{
		/* ipsec module makes the pf_key proc interface visible */
		if (stat(PROC_MODULES, &stb) == 0)
		{
			ignore_result(system("modprobe -qv ipsec"));
		}

		/* now test again */
		if (stat(PROC_KLIPS, &stb) != 0)
		{
			DBG2(DBG_APP, "kernel appears to lack the KLIPS IPsec stack");
			return FALSE;
		}
	}

	/* load crypto algorithm modules */
	ignore_result(system("modprobe -qv ipsec_aes"));
	ignore_result(system("modprobe -qv ipsec_blowfish"));
	ignore_result(system("modprobe -qv ipsec_sha2"));

	DBG2(DBG_APP, "found KLIPS IPsec stack");
	return TRUE;
}

static void ar9002_hw_setup_calibration(struct ath_hw *ah,
					struct ath9k_cal_list *currCal)
{
	REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
		      AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX,
		      currCal->calData->calCountMax);

	switch (currCal->calData->calType) {
	case IQ_MISMATCH_CAL:
		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
		DBG2("ath9k: "
			"starting IQ Mismatch Calibration\n");
		break;
	case ADC_GAIN_CAL:
		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
		DBG2("ath9k: "
			"starting ADC Gain Calibration\n");
		break;
	case ADC_DC_CAL:
		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
		DBG2("ath9k: "
			"starting ADC DC Calibration\n");
		break;
	}

	REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),
		    AR_PHY_TIMING_CTRL4_DO_CAL);
}

GList* DataStorage::lookup_network(const gchar *a_object_path) {

	GList *item = NULL;

	DBG3();

	if(a_object_path == NULL) {

		ERR("no object_path.");
		return NULL;
	}

	if(m_list_networks == NULL) {

		DBG2("network not found, list is empty.");
		return NULL;
	}

	item = g_list_find_custom(m_list_networks, a_object_path, compare_object_path);
	if(item != NULL) {

		DBG2("network found");
		return item;
	}
	else {

		DBG2("network not found.");
	}

	return NULL;
}

/*
 * vdds_cleanup_hybrid_res -- Cleanup Hybrid resource.
 */
void
vdds_cleanup_hybrid_res(void *arg)
{
	vnet_t *vnetp = arg;
	vnet_dds_info_t *vdds = &vnetp->vdds_info;

	DBG1(vdds, "Hybrid device cleanup...");
	mutex_enter(&vdds->lock);
	if (vdds->task_flags == VNET_DDS_TASK_ADD_SHARE) {
		/*
		 * Task for ADD_SHARE is pending, simply
		 * cleanup the flags, the task will quit without
		 * any changes.
		 */
		vdds->task_flags = 0;
		DBG2(vdds, "Task for ADD is pending, clean flags only");
	} else if ((vdds->hio_dip != NULL) && (vdds->task_flags == 0)) {
		/*
		 * There is no task pending and a hybrid device
		 * is present, so dispatch a task to release the share.
		 */
		vdds->task_flags = VNET_DDS_TASK_REL_SHARE;
		(void) ddi_taskq_dispatch(vdds->dds_taskqp,
		    vdds_process_dds_msg_task, vnetp, DDI_NOSLEEP);
		DBG2(vdds, "Dispatched a task to destroy HIO device");
	}
	/*
	 * Other possible cases include either DEL_SHARE or
	 * REL_SHARE as pending. In that case, there is nothing
	 * to do as a task is already pending to do the cleanup.
	 */
	mutex_exit(&vdds->lock);
	DBG1(vdds, "Hybrid device cleanup complete");
}

/*
 * Disable UST channel for session and domain.
 */
int channel_ust_disable(struct ltt_ust_session *usess,
		struct ltt_ust_channel *uchan)
{
	int ret = LTTNG_OK;

	assert(usess);
	assert(uchan);

	/* Already disabled */
	if (uchan->enabled == 0) {
		DBG2("Channel UST %s already disabled", uchan->name);
		goto end;
	}

	DBG2("Channel %s being disabled in UST global domain", uchan->name);
	/* Disable channel for global domain */
	ret = ust_app_disable_channel_glb(usess, uchan);
	if (ret < 0 && ret != -LTTNG_UST_ERR_EXIST) {
		ret = LTTNG_ERR_UST_CHAN_DISABLE_FAIL;
		goto error;
	}

	uchan->enabled = 0;

	DBG2("Channel %s disabled successfully", uchan->name);

	return LTTNG_OK;

end:
error:
	return ret;
}

void strb_imm(uint8_t rt, uint8_t rn, uint32_t imm32,
		bool index, bool add, bool wback) {
	DBG2("strb r%02d, [r%02d, #%08x]\n", rt, rn, imm32);

	uint32_t rn_val = CORE_reg_read(rn);
	uint32_t rt_val = CORE_reg_read(rt);

	uint32_t offset_addr;
	if (add) {
		offset_addr = rn_val + imm32;
	} else {
		offset_addr = rn_val - imm32;
	}

	uint32_t address;
	if (index) {
		address = offset_addr;
	} else {
		address = rn_val;
	}

	DBG2("address: %08x\n", address);

	write_byte(address, rt_val & 0xff);

	if (wback) {
		CORE_reg_write(rn, offset_addr);
	}

	DBG2("strb_imm ran\n");
}

/*
 * Enable UST channel for session and domain.
 */
int channel_ust_enable(struct ltt_ust_session *usess,
		struct ltt_ust_channel *uchan)
{
	int ret = LTTNG_OK;

	assert(usess);
	assert(uchan);

	/* If already enabled, everything is OK */
	if (uchan->enabled) {
		DBG3("Channel %s already enabled. Skipping", uchan->name);
		ret = LTTNG_ERR_UST_CHAN_EXIST;
		goto end;
	}

	DBG2("Channel %s being enabled in UST domain", uchan->name);

	/*
	 * Enable channel for UST global domain on all applications. Ignore return
	 * value here since whatever error we got, it means that the channel was
	 * not created on one or many registered applications and we can not report
	 * this to the user yet. However, at this stage, the channel was
	 * successfully created on the session daemon side so the enable-channel
	 * command is a success.
	 */
	(void) ust_app_enable_channel_glb(usess, uchan);

	uchan->enabled = 1;
	DBG2("Channel %s enabled successfully", uchan->name);

end:
	return ret;
}

static void ar9003_hw_setup_calibration(struct ath_hw *ah,
					struct ath9k_cal_list *currCal)
{
	/* Select calibration to run */
	switch (currCal->calData->calType) {
	case IQ_MISMATCH_CAL:
		/*
		 * Start calibration with
		 * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
		 */
		REG_RMW_FIELD(ah, AR_PHY_TIMING4,
			      AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
		currCal->calData->calCountMax);
		REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);

		DBG2("ath9k: "
			"starting IQ Mismatch Calibration\n");

		/* Kick-off cal */
		REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
		break;
	case TEMP_COMP_CAL:
		REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
			      AR_PHY_65NM_CH0_THERM_LOCAL, 1);
		REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
			      AR_PHY_65NM_CH0_THERM_START, 1);

		DBG2("ath9k: "
			"starting Temperature Compensation Calibration\n");
		break;
	}
}

/**
 * Load a generic private key from an ASN.1 encoded blob
 */
static private_key_t *parse_private_key(chunk_t blob)
{
	asn1_parser_t *parser;
	chunk_t object, params = chunk_empty;
	int objectID;
	private_key_t *key = NULL;
	key_type_t type = KEY_ANY;

	parser = asn1_parser_create(pkinfoObjects, blob);
	parser->set_flags(parser, FALSE, TRUE);

	while (parser->iterate(parser, &objectID, &object))
	{
		switch (objectID)
		{
			case PKINFO_PRIVATE_KEY_ALGORITHM:
			{
				int oid = asn1_parse_algorithmIdentifier(object,
									parser->get_level(parser) + 1, &params);

				switch (oid)
				{
					case OID_RSA_ENCRYPTION:
						type = KEY_RSA;
						break;
					case OID_EC_PUBLICKEY:
						type = KEY_ECDSA;
						break;
					default:
						/* key type not supported */
						goto end;
				}
				break;
			}
			case PKINFO_PRIVATE_KEY:
			{
				DBG2(DBG_ASN, "-- > --");
				if (params.ptr)
				{
					key = lib->creds->create(lib->creds, CRED_PRIVATE_KEY,
											 type, BUILD_BLOB_ALGID_PARAMS,
											 params, BUILD_BLOB_ASN1_DER,
											 object, BUILD_END);
				}
				else
				{
					key = lib->creds->create(lib->creds, CRED_PRIVATE_KEY,
											 type, BUILD_BLOB_ASN1_DER, object,
											 BUILD_END);
				}
				DBG2(DBG_ASN, "-- < --");
				break;
			}
		}
	}

end:
	parser->destroy(parser);
	return key;
}

EXPORT void CORE_reg_write(int r, uint32_t val) {
	assert(r >= 0 && r < 16 && "CORE_reg_write");
	if (r == SP_REG) {
		SW(physical_sp_p, val & 0xfffffffc);
	} else if (r == LR_REG) {
		SW(&physical_lr, val);
	} else if (r == PC_REG) {
		DBG2("Writing %08x to PC\n", val & 0xfffffffe);
#ifdef NO_PIPELINE
		pipeline_flush_exception_handler(val & 0xfffffffe);
#else
		if (state_is_debugging()) {
			DBG1("PC write + debugging --> flush\n");
			state_pipeline_flush(val & 0xfffffffe);
		} else {
			// Only flush if the new PC differs from predicted in pipeline:
			if (((SR(&if_id_PC) & 0xfffffffe) - 4) == (val & 0xfffffffe)) {
				DBG2("Predicted PC correctly (%08x)\n", val);
			} else {
				state_pipeline_flush(val & 0xfffffffe);
				DBG2("Predicted PC incorrectly\n");
				DBG2("Pred: %08x, val: %08x\n", SR(&if_id_PC), val);
			}
		}
#endif
	}
	else {
		SW(&(physical_reg[r]), val);
	}
}

bool starter_netkey_init(void)
{
	struct stat stb;

	if (stat(PROC_NETKEY, &stb) != 0)
	{
		/* af_key module makes the netkey proc interface visible */
		if (stat(PROC_MODULES, &stb) == 0)
		{
			ignore_result(system("modprobe -qv af_key"));
		}

		/* now test again */
		if (stat(PROC_NETKEY, &stb) != 0)
		{
			DBG2(DBG_APP, "kernel appears to lack the native netkey IPsec stack");
			return FALSE;
		}
	}

	/* make sure that all required IPsec modules are loaded */
	if (stat(PROC_MODULES, &stb) == 0)
	{
		ignore_result(system("modprobe -qv ah4"));
		ignore_result(system("modprobe -qv esp4"));
		ignore_result(system("modprobe -qv ipcomp"));
		ignore_result(system("modprobe -qv xfrm4_tunnel"));
		ignore_result(system("modprobe -qv xfrm_user"));
	}

	DBG2(DBG_APP, "found netkey IPsec stack");
	return TRUE;
}

void set_Arm (unsigned char mode)
{
#ifdef CMM_ARM_EXPERIMENT
	unsigned long cur_pos;
	unsigned char old_mode;
	unsigned char pct_deployed;

	get_ArmPosition(&cur_pos, &old_mode);

	if (mode == old_mode) return;

	if (old_mode != ARM_STOP)
	{
		if (cur_pos != arm_pos)
		{
			pct_deployed = cur_pos / ARM_STROKE_PCT;
#ifdef ARM_POS_DEBUG
			DBG("Arm moved ");
			if (cur_pos > arm_pos)
				DBG2("+%lu", cur_pos - arm_pos);
			else
				DBG2("-%lu", arm_pos - cur_pos);
			DBG3(" to %lu (%lu)\n", cur_pos, pct_deployed);
#endif
			arm_pos = cur_pos;
		}
	}
	else
	{
		pct_deployed = cur_pos / ARM_STROKE_PCT;
	}

	if (mode != ARM_STOP) gettimestamp(&arm_start);
#endif

	switch (mode) {
	default:
	case ARM_STOP:
		ARM(LAT) &= ~(ARM_UPDOWN_MASK | ARM_ONOFF_MASK);
		break;
	case ARM_UP:
		ARM(LAT) &= ~ARM_UPDOWN_MASK;
		ARM(LAT) |=  ARM_ONOFF_MASK;
		break;
	case ARM_DOWN:
		ARM(LAT) |= ARM_UPDOWN_MASK;
		ARM(LAT) |= ARM_ONOFF_MASK;
		break;
	}

#ifdef CMM_ARM_EXPERIMENT
	// % deployed in lower bits, mode in upper bits
	eventlog_track(EVENTLOG_ARM, (((uint16_t)pct_deployed) << 8) | mode);
#else
	eventlog_track(EVENTLOG_ARM, mode);
#endif
}

/**
 * Described in header.
 */
bool pts_dh_group_probe(pts_dh_group_t *dh_groups)
{
	enumerator_t *enumerator;
	diffie_hellman_group_t dh_group;
	const char *plugin_name;
	char format1[] = "  %s PTS DH group %N[%s] available";
	char format2[] = "  %s PTS DH group %N not available";

	*dh_groups = PTS_DH_GROUP_NONE;

	enumerator = lib->crypto->create_dh_enumerator(lib->crypto);
	while (enumerator->enumerate(enumerator, &dh_group, &plugin_name))
	{
		if (dh_group == MODP_1024_BIT)
		{
			*dh_groups |= PTS_DH_GROUP_IKE2;
			DBG2(DBG_PTS, format1, "optional ", diffie_hellman_group_names,
									dh_group, plugin_name);
		}
		else if (dh_group == MODP_1536_BIT)
		{
			*dh_groups |= PTS_DH_GROUP_IKE5;
			DBG2(DBG_PTS, format1, "optional ", diffie_hellman_group_names,
									dh_group, plugin_name);
		}
		else if (dh_group == MODP_2048_BIT)
		{
			*dh_groups |= PTS_DH_GROUP_IKE14;
			DBG2(DBG_PTS, format1, "optional ", diffie_hellman_group_names,
									dh_group, plugin_name);
		}
		else if (dh_group == ECP_256_BIT)
		{
			*dh_groups |= PTS_DH_GROUP_IKE19;
			DBG2(DBG_PTS, format1, "mandatory", diffie_hellman_group_names,
									dh_group, plugin_name);
		}
		else if (dh_group == ECP_384_BIT)
		{
			*dh_groups |= PTS_DH_GROUP_IKE20;
			DBG2(DBG_PTS, format1, "optional ", diffie_hellman_group_names,
									dh_group, plugin_name);
		}
	}
	enumerator->destroy(enumerator);

	if (*dh_groups & PTS_DH_GROUP_IKE19)
	{
		return TRUE;
	}
	else
	{
		DBG1(DBG_PTS, format2, "mandatory", diffie_hellman_group_names,
											ECP_256_BIT);
	}
	return FALSE;
}

/*
 * Defined in header.
 */
size_t asn1_length(chunk_t *blob)
{
	u_char n;
	size_t len;

	if (blob->len < 2)
	{
		DBG2(DBG_ASN, "insufficient number of octets to parse ASN.1 length");
		return ASN1_INVALID_LENGTH;
	}

	/* read length field, skip tag and length */
	n = blob->ptr[1];
	blob->ptr += 2;
	blob->len -= 2;

	if ((n & 0x80) == 0)
	{	/* single length octet */
		if (n > blob->len)
		{
			DBG2(DBG_ASN, "length is larger than remaining blob size");
			return ASN1_INVALID_LENGTH;
		}
		return n;
	}

	/* composite length, determine number of length octets */
	n &= 0x7f;

	if (n == 0 || n > blob->len)
	{
		DBG2(DBG_ASN, "number of length octets invalid");
		return ASN1_INVALID_LENGTH;
	}

	if (n > sizeof(len))
	{
		DBG2(DBG_ASN, "number of length octets is larger than limit of"
			 " %d octets", (int)sizeof(len));
		return ASN1_INVALID_LENGTH;
	}

	len = 0;

	while (n-- > 0)
	{
		len = 256*len + *blob->ptr++;
		blob->len--;
	}
	if (len > blob->len)
	{
		DBG2(DBG_ASN, "length is larger than remaining blob size");
		return ASN1_INVALID_LENGTH;
	}
	return len;
}

static void tea_thread_stop(int tid)
{
  THREAD_WORK *tw;
  int r;

  /* wait until we have exclusive access right on ttable */
  DBG("[tea] Thread %d killing scheduled.", tid);
  pthreadex_lock_get_exclusive_n(&ttable_lock, "kill-thread");

  /* going to kill thread */
  tw = ttable[tid];
  pthreadex_lock_release();

  if(tw != NULL)
  {
    DBG("[tea] Killing thread %d.", tid);

    /* consider it dead */
    ttable[tid] = NULL;

    /* allow thread to do the cleanup */
    DBG2("[tea] Approve cleanup...");
    pthreadex_flag_up(&(tw->cleanup_do));

    while((r = pthread_cancel(tw->pthread_id)) != 0 && errno == EINTR)
    {
      DBG("[tea] Cancel EINTR; repeating pthread_cancel() on %d", tid);
      errno = 0;
    }
    if(r != 0)
      ERR_ERRNO("[tea] Cannot cancel thread %d", tid);

    /* kill thread */
    while((r = pthread_detach(tw->pthread_id)) != 0 && errno == EINTR)
    {
      DBG("[tea] Detach EINTR; repeating pthread_detach() on  %d", tid);
      errno = 0;
    }
    if(r != 0)
      ERR_ERRNO("[tea] Cannot detach thread %d", tid);

    /* wait cleanup finishes */
    DBG2("[tea] Wait cleanup termination...");
    pthreadex_flag_wait(&(tw->cleanup_done));

    DBG("[tea] THREAD %d KILLED!", tid);

    /* destroy flags && free mem */
    pthreadex_flag_destroy(&(tw->mwaiting));
    pthreadex_flag_destroy(&(tw->cleanup_do));
    pthreadex_flag_destroy(&(tw->cleanup_done));
    free(tw);
  } else
    ERR("[tea] Thread %d does not exist or died voluntarely.", tid);
}