C++ inpw函数代码示例

void led_yellow_set_state( uint8_t state )
{
  if (state)
    outpw(P1DATA, (inpw(P1DATA) & ~0x1800) & ~0x200);
  else
    outpw(P1DATA, (inpw(P1DATA) & ~0x1800) | 0x200);
}

void capClkRatio(BOOL ratio)
{
	if(ratio==TRUE)
		outpw(REG_CAPFuncEnable,inpw(REG_CAPFuncEnable)|0x00100000);
	else
		outpw(REG_CAPFuncEnable,inpw(REG_CAPFuncEnable)&0xffEfffff);	
}

//*****************************************************************************
//
//! \brief ADC Interrupt Service Routine.According to the interrupt flags to call
//!  the corresponding callback function.
//!
//! \param  None   
//!
//! \return None  
//
//*****************************************************************************
void ADC_IRQHandler(void)
{
    if(ADC->SR_BITS.ADF==1)
    {
        if(g_ptADCCallBack)
            g_ptADCCallBack(g_pu32UserData[0]);
        
        /* clear the A/D conversion flag */
        /* "ADC->ADSR.ADF = 1;" is not recommended. It may clear CMPF0 and CMPF1. */
        outpw(ADC_ADSR, (inpw(ADC_ADSR)&(~0x7))|0x1);
    }
    
    if(ADC->SR_BITS.CMPF0==1)
    {
        if(g_ptADCMP0CallBack)
            g_ptADCMP0CallBack(g_pu32UserData[1]);
        
        /* clear the A/D compare flag 0 */
        /* "ADC->ADSR.CMPF0 = 1;" is not recommended. It may clear ADF and CMPF1. */
        outpw(ADC_ADSR, (inpw(ADC_ADSR)&(~0x7))|0x2);
    }
    
    if(ADC->SR_BITS.CMPF1==1)
    {
        if(g_ptADCMP1CallBack)
            g_ptADCMP1CallBack(g_pu32UserData[2]);
        
        /* clear the A/D compare flag 1 */
        /* "ADC->ADSR.CMPF1 = 1;" is not recommended. It may clear ADF and CMPF0. */
        outpw(ADC_ADSR, (inpw(ADC_ADSR)&(~0x7))|0x4);
    }
}

static void DELAY(int timeout)
{
	/* NOTE: We assue the timer 0 is ready  */
	int init_cnt, timer_init;
	int cur_cnt;
	int max_cnt;

	init_cnt = inpw(REG_TDR0);
	timer_init = inpw(REG_TICR0);
	
	max_cnt = 0;
	do
	{
		
		cur_cnt = inpw(REG_TDR0);
		if(cur_cnt > init_cnt)
			cur_cnt = init_cnt + (timer_init - cur_cnt);
		else
			cur_cnt = init_cnt - cur_cnt;
		
		/* NOTE: the timeout value must be smaller than init_cnt */
		if(cur_cnt >= timeout)
			break;

	}while(max_cnt++ < MAX_DELAY_LOOPS);
	
	dbg_printf("current system speed:%4d loops/us\n",max_cnt);

}

/*
	addr: memory address 
	len: byte count
	buf: buffer to put the read back data
*/
int usiRead(UINT32 addr, UINT32 len, UINT8 *buf)
{
	int volatile i;

	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0

	// read command
	outpw(REG_USI_Tx0, 03);
	usiTxLen(0, 8);
	usiActive();

	// address
	outpw(REG_USI_Tx0, addr);
	usiTxLen(0, 24);
	usiActive();

	// data
	for (i=0; i<len; i++)
	{
		outpw(REG_USI_Tx0, 0xff);
		usiTxLen(0, 8);
		usiActive();
		*buf++ = inpw(REG_USI_Rx0) & 0xff;
	}

	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0

	return USI_NO_ERR;
}

int usiEraseSector(UINT32 addr, UINT32 secCount)
{
	int volatile i;

	for (i=0; i<secCount; i++)
	{
		usiWriteEnable();

		outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0

		// erase command
		outpw(REG_USI_Tx0, 0xd8);
		usiTxLen(0, 8);
		usiActive();

		// address
		outpw(REG_USI_Tx0, addr+i*0x10000);	// 1 sector = 64KB
		usiTxLen(0, 24);
		usiActive();

		outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0

		// check status
		usiCheckBusy();
	}
	return USI_NO_ERR;
}

UINT16 usiReadID()
{
	UINT16 volatile id;

	outpw(REG_USI_SSR, inpw(REG_USI_SSR) | 0x01);	// CS0

	// command 8 bit
	outpw(REG_USI_Tx0, 0x90);
	usiTxLen(0, 8);
	usiActive();

	// address 24 bit
	outpw(REG_USI_Tx0, 0x000000);
	usiTxLen(0, 24);
	usiActive();

	// data 16 bit
	outpw(REG_USI_Tx0, 0xffff);
	usiTxLen(0, 16);
	usiActive();
	id = inpw(REG_USI_Rx0) & 0xffff;

	outpw(REG_USI_SSR, inpw(REG_USI_SSR) & 0xfe);	// CS0

	return id;
}

void Int_Handler_FastI2C(void)
#endif
{	
	unsigned int intst;
	intst=inpw(REG_FastSerialBusStatus);

	if ((intst&0x00000002)==0x02)
	{	
//k07055-1		if (_i2c_IrqHandlerTable[0]!=0)
//k07055-1			_i2c_IrqHandlerTable[0]();

		intst=inpw(REG_FastSerialBusStatus)|0x02;
		outpw(REG_FastSerialBusStatus,intst);

		++i2c_I2C_INT_CNT;
//		printf ("i2c_I2C_INT_CNT = %d\n", i2c_I2C_INT_CNT);

		if (_i2c_IrqHandlerTable[0]!=0)	//k07055-1
		_i2c_IrqHandlerTable[0]();		//k07055-1

//#ifdef OPT_FastI2C_INT_TEST
//		cntFastI2C=cntFastI2C+1;
//#endif	//OPT_FastI2C_INT_TEST
	}
#ifdef ECOS
	cyg_interrupt_acknowledge (vector);	//k01105-1

	return CYG_ISR_HANDLED;
#endif	//ECOS
}

void i2cEnableInterrupt (BOOL bIsEnableINT)
{	UINT32 regdata;

//k09144-1	sysSetInterruptType(IRQ_FI2C, LOW_LEVEL_SENSITIVE);	//k08184-1
#ifdef ECOS
    if (bIsEnableINT)		// enable I2C interrupt
	{	cyg_interrupt_create(IRQ_FI2C, 1, 0, Int_Handler_FastI2C, NULL, 
	                    &int_handle_I2C, &int_holder_I2C);
		cyg_interrupt_attach(int_handle_I2C);
		cyg_interrupt_unmask(IRQ_FI2C);
	}
	else
	{	cyg_interrupt_mask(IRQ_FI2C);
		cyg_interrupt_detach(int_handle_I2C);
	}
#else
	sysInstallISR(IRQ_LEVEL_1, IRQ_FI2C, (PVOID)Int_Handler_FastI2C);	//IRQ_FI2C=24
	if (bIsEnableINT)	sysEnableInterrupt(IRQ_FI2C);	//k03224-1
	else	sysDisableInterrupt (IRQ_FI2C);
#endif
	_i2c_bINT_EN=bIsEnableINT;	//k07195-1

	//enable sensor I2C engine's interrupt
	if (bIsEnableINT)
	{	regdata=inpw (REG_FastSerialBusCR)|0x02;
		outpw (REG_FastSerialBusCR,regdata);
	}
	//To clear interrupt status
	regdata=inpw (REG_FastSerialBusStatus)|0x03;
	outpw (REG_FastSerialBusStatus,regdata);

    /* enable I2C interrupt */
//k08204-1    sysEnableInterrupt(IRQ_FI2C);	//k03224-1
}

static u16_t mdio_read(u8_t addr, u8_t reg)
{
    outpw(REG_EMAC1_MIIDA, (addr << 8) | reg | 0xA0000);
    while (inpw(REG_EMAC1_MIIDA) & 0x20000);    // wait busy flag clear

    return inpw(REG_EMAC1_MIID);
}

/**
  * @brief This function reset the i2c interface and enable interrupt.
  * @param[in] param is interface number.
  * @return open status.
  * @retval 0 success.
  * @retval I2C_ERR_BUSY Interface already opened.
  * @retval I2C_ERR_NODEV Interface number out of range.
  */
int32_t i2cOpen(PVOID param)
{
    i2c_dev *dev;

    if( (uint32_t)param >= I2C_NUMBER)
        return I2C_ERR_NODEV;

    dev = (i2c_dev *)((uint32_t)&i2c_device[(uint32_t)param] );

    if( dev->openflag != 0 )        /* a card slot can open only once */
        return(I2C_ERR_BUSY);

    /* Enable engine clock */
    if((uint32_t)param == 0)
        outpw(REG_CLK_PCLKEN1, inpw(REG_CLK_PCLKEN1) | 0x1);
    else
        outpw(REG_CLK_PCLKEN1, inpw(REG_CLK_PCLKEN1) | 0x2);

    memset(dev, 0, sizeof(i2c_dev));
    dev->base = ((uint32_t)param) ? I2C1_BA : I2C0_BA;

    _i2cReset(dev);

    dev->openflag = 1;

    return 0;
}

static void plc_init(struct s_smc *smc, int p)
{
	int	i ;
#ifndef	MOT_ELM
	int	rev ;	/* Revision of PLC-x */
#endif	/* MOT_ELM */

	/* transit PCM state machine to MAINT state */
	outpw(PLC(p,PL_CNTRL_B),0) ;
	outpw(PLC(p,PL_CNTRL_B),PL_PCM_STOP) ;
	outpw(PLC(p,PL_CNTRL_A),0) ;

	/*
	 * if PLC-S then set control register C
	 */
#ifndef	MOT_ELM
	rev = inpw(PLC(p,PL_STATUS_A)) & PLC_REV_MASK ;
	if (rev != PLC_REVISION_A)
#endif	/* MOT_ELM */
	{
		if (smc->y[p].pmd_scramble) {
			outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_S) ;
#ifdef	MOT_ELM
			outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_S) ;
			outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_S) ;
#endif	/* MOT_ELM */
		}
		else {
			outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_U) ;
#ifdef	MOT_ELM
			outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_U) ;
			outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_U) ;
#endif	/* MOT_ELM */
		}
	}

	/*
	 * set timer register
	 */
	for ( i = 0 ; pltm[i].timer; i++)	/* set timer parameter reg */
		outpw(PLC(p,pltm[i].timer),pltm[i].para) ;

	(void)inpw(PLC(p,PL_INTR_EVENT)) ;	/* clear interrupt event reg */
	plc_clear_irq(smc,p) ;
	outpw(PLC(p,PL_INTR_MASK),plc_imsk_na); /* enable non active irq's */

	/*
	 * if PCM is configured for class s, it will NOT go to the
	 * REMOVE state if offline (page 3-36;)
	 * in the concentrator, all inactive PHYS always must be in
	 * the remove state
	 * there's no real need to use this feature at all ..
	 */
#ifndef	CONCENTRATOR
	if ((smc->s.sas == SMT_SAS) && (p == PS)) {
		outpw(PLC(p,PL_CNTRL_B),PL_CLASS_S) ;
	}
#endif
}

UINT8 MY_Read_GPIO7(void)
{
    outpw(REG_GPIO_OE,inpw(REG_GPIO_OE)|0x00000080);
    if ((inpw(REG_GPIO_STS)&0x00000080)==0x00000080)
        return 1;
    else 
        return 0;
}

void led_green_set_state( uint8_t state )
{
  outpw(ETHPPPTR,0x114); // –егистр SelfCTL CS8900A
  if(state)
    outpw(ETHPPDATAL, inpw(ETHPPDATAL) | 0x4000);
  else
    outpw(ETHPPDATAL, inpw(ETHPPDATAL) & ~0x4000);
}

void capPacketOut(T_CAP_SET* ptCapSet)
{	
	BOOL bIsPacOut;
	bIsPacOut = ptCapSet->bIsPacEnable;
	if(bIsPacOut)
		outpw(REG_CAPFuncEnable,inpw(REG_CAPFuncEnable)|0x00000100);
	else 
		outpw(REG_CAPFuncEnable,inpw(REG_CAPFuncEnable)&0xfffffeff);
}